JPS5442573B2 - - Google Patents

Info

Publication number
JPS5442573B2
JPS5442573B2 JP6996576A JP6996576A JPS5442573B2 JP S5442573 B2 JPS5442573 B2 JP S5442573B2 JP 6996576 A JP6996576 A JP 6996576A JP 6996576 A JP6996576 A JP 6996576A JP S5442573 B2 JPS5442573 B2 JP S5442573B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6996576A
Other versions
JPS52152132A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6996576A priority Critical patent/JPS52152132A/ja
Publication of JPS52152132A publication Critical patent/JPS52152132A/ja
Publication of JPS5442573B2 publication Critical patent/JPS5442573B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/503Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
JP6996576A 1976-06-14 1976-06-14 Carry siganl generator circuit Granted JPS52152132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6996576A JPS52152132A (en) 1976-06-14 1976-06-14 Carry siganl generator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6996576A JPS52152132A (en) 1976-06-14 1976-06-14 Carry siganl generator circuit

Publications (2)

Publication Number Publication Date
JPS52152132A JPS52152132A (en) 1977-12-17
JPS5442573B2 true JPS5442573B2 (ja) 1979-12-14

Family

ID=13417862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6996576A Granted JPS52152132A (en) 1976-06-14 1976-06-14 Carry siganl generator circuit

Country Status (1)

Country Link
JP (1) JPS52152132A (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5518706A (en) * 1978-07-24 1980-02-09 Hitachi Ltd Parallel adder circuit
US4471454A (en) * 1981-10-27 1984-09-11 Ibm Corporation Fast, efficient, small adder
US4523292A (en) * 1982-09-30 1985-06-11 Rca Corporation Complementary FET ripple carry binary adder circuit
JPS6039240A (ja) * 1983-08-10 1985-03-01 Mitsubishi Electric Corp 加算器
JPS60215238A (ja) * 1984-04-10 1985-10-28 Mitsubishi Electric Corp 加算器
US4675838A (en) * 1984-11-01 1987-06-23 Delaware Conditional-carry adder for multibit digital computer
IT1210751B (it) * 1987-05-20 1989-09-20 Cselt Centro Studi Lab Telecom Sommatore veloce in tecnologia c mos

Also Published As

Publication number Publication date
JPS52152132A (en) 1977-12-17

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