JPS54157425A - Information signal receiving device - Google Patents

Information signal receiving device

Info

Publication number
JPS54157425A
JPS54157425A JP6642578A JP6642578A JPS54157425A JP S54157425 A JPS54157425 A JP S54157425A JP 6642578 A JP6642578 A JP 6642578A JP 6642578 A JP6642578 A JP 6642578A JP S54157425 A JPS54157425 A JP S54157425A
Authority
JP
Japan
Prior art keywords
signal
clock
reception
circuit
transmitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6642578A
Other languages
English (en)
Other versions
JPS5830789B2 (ja
Inventor
Masayoshi Hirashima
Toshikatsu Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP53066425A priority Critical patent/JPS5830789B2/ja
Publication of JPS54157425A publication Critical patent/JPS54157425A/ja
Publication of JPS5830789B2 publication Critical patent/JPS5830789B2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Television Systems (AREA)
JP53066425A 1978-06-01 1978-06-01 情報信号受信装置 Expired JPS5830789B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53066425A JPS5830789B2 (ja) 1978-06-01 1978-06-01 情報信号受信装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53066425A JPS5830789B2 (ja) 1978-06-01 1978-06-01 情報信号受信装置

Publications (2)

Publication Number Publication Date
JPS54157425A true JPS54157425A (en) 1979-12-12
JPS5830789B2 JPS5830789B2 (ja) 1983-07-01

Family

ID=13315412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53066425A Expired JPS5830789B2 (ja) 1978-06-01 1978-06-01 情報信号受信装置

Country Status (1)

Country Link
JP (1) JPS5830789B2 (ja)

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NATIONAL TECHNICAL REPORT=1975 *

Also Published As

Publication number Publication date
JPS5830789B2 (ja) 1983-07-01

Similar Documents

Publication Publication Date Title
JPS54105920A (en) Picture display device
GB9414447D0 (en) Method and apparatus for accurate setting of time of day clock in a video receiver
GB2271492A (en) Apparatus for and method of synchronizing a clock signal
EP0493763B1 (en) Microprocessor controlled digital aft unit
JPS54157425A (en) Information signal receiving device
JPS51128571A (en) Portable electronic watch
JPS5545248A (en) Character-pattern signal receiving unit
GB2019054A (en) A Portable Time-Code Receiver Clock
GB1001441A (en) Television communication system
GB1393674A (en) Telephone image transmission system
JPS56106475A (en) Television receiver
JPS5731280A (en) Simultaneous display television receiver of colored plural screens
JPS5269226A (en) Color difference signal demodulator of pal system television image rec eiver
JPS5213724A (en) Still picture broadcast receiver
JPS56166675A (en) Television ghost eliminator
JPS57201390A (en) Character pattern information receiver
JPS5440515A (en) Color television system
JPS52100924A (en) Reception equipment for multiplied information signal
JPS5269216A (en) Still picture and voice transmitting system for stationary picture
JPS54156423A (en) Television receivers using digital ic memories
JPS51150912A (en) Pay television system
JPS5575382A (en) Video signal process method
JPS5684081A (en) Still picture receiver
JPS5625878A (en) Timing signal insertion and pickup unit for television video signal
JPS52136518A (en) Video signal processing circuit