JPS5347240A - Control system for intermediate buffer - Google Patents

Control system for intermediate buffer

Info

Publication number
JPS5347240A
JPS5347240A JP12171876A JP12171876A JPS5347240A JP S5347240 A JPS5347240 A JP S5347240A JP 12171876 A JP12171876 A JP 12171876A JP 12171876 A JP12171876 A JP 12171876A JP S5347240 A JPS5347240 A JP S5347240A
Authority
JP
Japan
Prior art keywords
intermediate buffer
control system
comparator
decrease
reduce
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12171876A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5643546B2 (cs
Inventor
Akira Hattori
Takamitsu Tsuchimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12171876A priority Critical patent/JPS5347240A/ja
Publication of JPS5347240A publication Critical patent/JPS5347240A/ja
Publication of JPS5643546B2 publication Critical patent/JPS5643546B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP12171876A 1976-10-09 1976-10-09 Control system for intermediate buffer Granted JPS5347240A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12171876A JPS5347240A (en) 1976-10-09 1976-10-09 Control system for intermediate buffer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12171876A JPS5347240A (en) 1976-10-09 1976-10-09 Control system for intermediate buffer

Publications (2)

Publication Number Publication Date
JPS5347240A true JPS5347240A (en) 1978-04-27
JPS5643546B2 JPS5643546B2 (cs) 1981-10-13

Family

ID=14818150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12171876A Granted JPS5347240A (en) 1976-10-09 1976-10-09 Control system for intermediate buffer

Country Status (1)

Country Link
JP (1) JPS5347240A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0032956B1 (en) * 1979-07-25 1987-09-30 Fujitsu Limited Data processing system utilizing hierarchical memory
US5361342A (en) * 1990-07-27 1994-11-01 Fujitsu Limited Tag control system in a hierarchical memory control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0032956B1 (en) * 1979-07-25 1987-09-30 Fujitsu Limited Data processing system utilizing hierarchical memory
US5361342A (en) * 1990-07-27 1994-11-01 Fujitsu Limited Tag control system in a hierarchical memory control system

Also Published As

Publication number Publication date
JPS5643546B2 (cs) 1981-10-13

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