JPS5343082Y2 - - Google Patents
Info
- Publication number
- JPS5343082Y2 JPS5343082Y2 JP6772872U JP6772872U JPS5343082Y2 JP S5343082 Y2 JPS5343082 Y2 JP S5343082Y2 JP 6772872 U JP6772872 U JP 6772872U JP 6772872 U JP6772872 U JP 6772872U JP S5343082 Y2 JPS5343082 Y2 JP S5343082Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6772872U JPS5343082Y2 (en:Method) | 1972-06-08 | 1972-06-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6772872U JPS5343082Y2 (en:Method) | 1972-06-08 | 1972-06-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4926469U JPS4926469U (en:Method) | 1974-03-06 |
| JPS5343082Y2 true JPS5343082Y2 (en:Method) | 1978-10-17 |
Family
ID=27962602
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6772872U Expired JPS5343082Y2 (en:Method) | 1972-06-08 | 1972-06-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5343082Y2 (en:Method) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54137794U (en:Method) * | 1978-03-11 | 1979-09-25 | ||
| JPS54137795U (en:Method) * | 1978-03-11 | 1979-09-25 | ||
| JPS58176528U (ja) * | 1982-05-21 | 1983-11-25 | 岩「淵」金属工業株式会社 | メツセンジヤ−ワイヤ−用電柱支持金具 |
-
1972
- 1972-06-08 JP JP6772872U patent/JPS5343082Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4926469U (en:Method) | 1974-03-06 |