JPS53121580A - Manufacture of mos-type integrated circuit device - Google Patents

Manufacture of mos-type integrated circuit device

Info

Publication number
JPS53121580A
JPS53121580A JP3668177A JP3668177A JPS53121580A JP S53121580 A JPS53121580 A JP S53121580A JP 3668177 A JP3668177 A JP 3668177A JP 3668177 A JP3668177 A JP 3668177A JP S53121580 A JPS53121580 A JP S53121580A
Authority
JP
Japan
Prior art keywords
mos
manufacture
integrated circuit
circuit device
type integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3668177A
Inventor
Yukio Yasuda
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3668177A priority Critical patent/JPS53121580A/en
Publication of JPS53121580A publication Critical patent/JPS53121580A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To obtain a region containing both the shallow and the deep areas and thus to obtain a short channel as desired when the source-drain region is formed through diffusion, by using the poly crystal Si layer containing large amount of impurities as the impurity diffusion layer and the oxidation film which contains the impurity and oxidized the Si layer partially.
COPYRIGHT: (C)1978,JPO&Japio
JP3668177A 1977-03-31 1977-03-31 Manufacture of mos-type integrated circuit device Pending JPS53121580A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3668177A JPS53121580A (en) 1977-03-31 1977-03-31 Manufacture of mos-type integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3668177A JPS53121580A (en) 1977-03-31 1977-03-31 Manufacture of mos-type integrated circuit device

Publications (1)

Publication Number Publication Date
JPS53121580A true JPS53121580A (en) 1978-10-24

Family

ID=12476579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3668177A Pending JPS53121580A (en) 1977-03-31 1977-03-31 Manufacture of mos-type integrated circuit device

Country Status (1)

Country Link
JP (1) JPS53121580A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079180A (en) * 1988-12-22 1992-01-07 Texas Instruments Incorporated Method of fabricating a raised source/drain transistor
US5663079A (en) * 1993-11-12 1997-09-02 Calogic Corporation Method of making increased density MOS-gated semiconductor devices
US5668027A (en) * 1991-10-16 1997-09-16 Nippon Steel Semiconductor Corporation Method of manufacturing a MOS transistor semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079180A (en) * 1988-12-22 1992-01-07 Texas Instruments Incorporated Method of fabricating a raised source/drain transistor
US5668027A (en) * 1991-10-16 1997-09-16 Nippon Steel Semiconductor Corporation Method of manufacturing a MOS transistor semiconductor device
US5663079A (en) * 1993-11-12 1997-09-02 Calogic Corporation Method of making increased density MOS-gated semiconductor devices
US5798549A (en) * 1993-11-12 1998-08-25 Calogic Corporation Conductive layer overlaid self-aligned MOS-gated semiconductor devices

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