JPS5216190A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5216190A
JPS5216190A JP50091887A JP9188775A JPS5216190A JP S5216190 A JPS5216190 A JP S5216190A JP 50091887 A JP50091887 A JP 50091887A JP 9188775 A JP9188775 A JP 9188775A JP S5216190 A JPS5216190 A JP S5216190A
Authority
JP
Japan
Prior art keywords
semiconductor
multiplewirings
integration
degree
improved
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50091887A
Other languages
Japanese (ja)
Inventor
Koichiro Satonaka
Masayoshi Yoshimura
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50091887A priority Critical patent/JPS5216190A/en
Publication of JPS5216190A publication Critical patent/JPS5216190A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Abstract

PURPOSE: In the semiconductor integrated circuit device having multiplewirings, the bonding pad is formed on the upper part of wiring layers other than the uppermost layer. Thus, the degree of integration is improved.
COPYRIGHT: (C)1977,JPO&Japio
JP50091887A 1975-07-30 1975-07-30 Semiconductor device Pending JPS5216190A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50091887A JPS5216190A (en) 1975-07-30 1975-07-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50091887A JPS5216190A (en) 1975-07-30 1975-07-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5216190A true JPS5216190A (en) 1977-02-07

Family

ID=14039058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50091887A Pending JPS5216190A (en) 1975-07-30 1975-07-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5216190A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61234050A (en) * 1985-04-10 1986-10-18 Sanyo Electric Co Ltd Semiconductor integrated circuit having multilayer interconnection

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61234050A (en) * 1985-04-10 1986-10-18 Sanyo Electric Co Ltd Semiconductor integrated circuit having multilayer interconnection

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