JPS51118372A - Solder for semiconductor unit - Google Patents

Solder for semiconductor unit

Info

Publication number
JPS51118372A
JPS51118372A JP50043697A JP4369775A JPS51118372A JP S51118372 A JPS51118372 A JP S51118372A JP 50043697 A JP50043697 A JP 50043697A JP 4369775 A JP4369775 A JP 4369775A JP S51118372 A JPS51118372 A JP S51118372A
Authority
JP
Japan
Prior art keywords
solder
semiconductor unit
tin
lead
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50043697A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5543609B2 (enrdf_load_stackoverflow
Inventor
Kenkichi Yamaji
Eeru Shiyureegeru Deiitoritsuhi
Hajime Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP50043697A priority Critical patent/JPS51118372A/ja
Publication of JPS51118372A publication Critical patent/JPS51118372A/ja
Publication of JPS5543609B2 publication Critical patent/JPS5543609B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP50043697A 1975-04-10 1975-04-10 Solder for semiconductor unit Granted JPS51118372A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50043697A JPS51118372A (en) 1975-04-10 1975-04-10 Solder for semiconductor unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50043697A JPS51118372A (en) 1975-04-10 1975-04-10 Solder for semiconductor unit

Publications (2)

Publication Number Publication Date
JPS51118372A true JPS51118372A (en) 1976-10-18
JPS5543609B2 JPS5543609B2 (enrdf_load_stackoverflow) 1980-11-07

Family

ID=12671011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50043697A Granted JPS51118372A (en) 1975-04-10 1975-04-10 Solder for semiconductor unit

Country Status (1)

Country Link
JP (1) JPS51118372A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5450269A (en) * 1977-09-28 1979-04-20 Nec Home Electronics Ltd Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50115771A (enrdf_load_stackoverflow) * 1974-02-21 1975-09-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50115771A (enrdf_load_stackoverflow) * 1974-02-21 1975-09-10

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5450269A (en) * 1977-09-28 1979-04-20 Nec Home Electronics Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS5543609B2 (enrdf_load_stackoverflow) 1980-11-07

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