JPS50109677A - - Google Patents

Info

Publication number
JPS50109677A
JPS50109677A JP1373874A JP1373874A JPS50109677A JP S50109677 A JPS50109677 A JP S50109677A JP 1373874 A JP1373874 A JP 1373874A JP 1373874 A JP1373874 A JP 1373874A JP S50109677 A JPS50109677 A JP S50109677A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1373874A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1373874A priority Critical patent/JPS50109677A/ja
Publication of JPS50109677A publication Critical patent/JPS50109677A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP1373874A 1974-02-04 1974-02-04 Pending JPS50109677A (US06605200-20030812-C00035.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1373874A JPS50109677A (US06605200-20030812-C00035.png) 1974-02-04 1974-02-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1373874A JPS50109677A (US06605200-20030812-C00035.png) 1974-02-04 1974-02-04

Publications (1)

Publication Number Publication Date
JPS50109677A true JPS50109677A (US06605200-20030812-C00035.png) 1975-08-28

Family

ID=11841588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1373874A Pending JPS50109677A (US06605200-20030812-C00035.png) 1974-02-04 1974-02-04

Country Status (1)

Country Link
JP (1) JPS50109677A (US06605200-20030812-C00035.png)

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