JPS4988077A - - Google Patents

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Publication number
JPS4988077A
JPS4988077A JP48132255A JP13225573A JPS4988077A JP S4988077 A JPS4988077 A JP S4988077A JP 48132255 A JP48132255 A JP 48132255A JP 13225573 A JP13225573 A JP 13225573A JP S4988077 A JPS4988077 A JP S4988077A
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JP
Japan
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Pending
Application number
JP48132255A
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Publication date
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Publication of JPS4988077A publication Critical patent/JPS4988077A/ja
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    • H—ELECTRICITY
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    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
JP48132255A 1972-12-11 1973-11-27 Pending JPS4988077A (ja)

Applications Claiming Priority (1)

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US00314056A US3811186A (en) 1972-12-11 1972-12-11 Method of aligning and attaching circuit devices on a substrate

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JPS4988077A true JPS4988077A (ja) 1974-08-22

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DE (1) DE2351056A1 (ja)
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GB1412363A (en) 1975-11-05
DE2351056A1 (de) 1974-06-20
FR2210081A1 (ja) 1974-07-05
FR2210081B1 (ja) 1978-09-08
US3811186A (en) 1974-05-21

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