JPS4951834A - - Google Patents

Info

Publication number
JPS4951834A
JPS4951834A JP47094371A JP9437172A JPS4951834A JP S4951834 A JPS4951834 A JP S4951834A JP 47094371 A JP47094371 A JP 47094371A JP 9437172 A JP9437172 A JP 9437172A JP S4951834 A JPS4951834 A JP S4951834A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP47094371A
Other languages
Japanese (ja)
Other versions
JPS5433498B2 (US20110158925A1-20110630-C00042.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9437172A priority Critical patent/JPS5433498B2/ja
Priority to US398339A priority patent/US3866188A/en
Priority to DE19732347228 priority patent/DE2347228A1/de
Priority to FR7333633A priority patent/FR2200581B1/fr
Priority to IT29122/73A priority patent/IT993311B/it
Publication of JPS4951834A publication Critical patent/JPS4951834A/ja
Publication of JPS5433498B2 publication Critical patent/JPS5433498B2/ja
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP9437172A 1972-09-19 1972-09-19 Expired JPS5433498B2 (US20110158925A1-20110630-C00042.png)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP9437172A JPS5433498B2 (US20110158925A1-20110630-C00042.png) 1972-09-19 1972-09-19
US398339A US3866188A (en) 1972-09-19 1973-09-18 Memory circuit
DE19732347228 DE2347228A1 (de) 1972-09-19 1973-09-19 Speicherschaltung
FR7333633A FR2200581B1 (US20110158925A1-20110630-C00042.png) 1972-09-19 1973-09-19
IT29122/73A IT993311B (it) 1972-09-19 1973-09-19 Circuito di memoria per elaboratori elettronici

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9437172A JPS5433498B2 (US20110158925A1-20110630-C00042.png) 1972-09-19 1972-09-19

Publications (2)

Publication Number Publication Date
JPS4951834A true JPS4951834A (US20110158925A1-20110630-C00042.png) 1974-05-20
JPS5433498B2 JPS5433498B2 (US20110158925A1-20110630-C00042.png) 1979-10-20

Family

ID=14108442

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9437172A Expired JPS5433498B2 (US20110158925A1-20110630-C00042.png) 1972-09-19 1972-09-19

Country Status (5)

Country Link
US (1) US3866188A (US20110158925A1-20110630-C00042.png)
JP (1) JPS5433498B2 (US20110158925A1-20110630-C00042.png)
DE (1) DE2347228A1 (US20110158925A1-20110630-C00042.png)
FR (1) FR2200581B1 (US20110158925A1-20110630-C00042.png)
IT (1) IT993311B (US20110158925A1-20110630-C00042.png)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4286330A (en) * 1976-04-07 1981-08-25 Isaacson Joel D Autonomic string-manipulation system
JPS55132593A (en) * 1979-04-02 1980-10-15 Fujitsu Ltd Refresh control method for memory unit
JPS55135392A (en) * 1979-04-04 1980-10-22 Nec Corp Memory circuit
US4758993A (en) * 1984-11-19 1988-07-19 Fujitsu Limited Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays
US7079422B1 (en) 2000-04-25 2006-07-18 Samsung Electronics Co., Ltd. Periodic refresh operations for non-volatile multiple-bit-per-cell memory
US6396744B1 (en) * 2000-04-25 2002-05-28 Multi Level Memory Technology Flash memory with dynamic refresh

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3748651A (en) * 1972-02-16 1973-07-24 Cogar Corp Refresh control for add-on semiconductor memory
US3790961A (en) * 1972-06-09 1974-02-05 Advanced Memory Syst Inc Random access dynamic semiconductor memory system

Also Published As

Publication number Publication date
US3866188A (en) 1975-02-11
IT993311B (it) 1975-09-30
JPS5433498B2 (US20110158925A1-20110630-C00042.png) 1979-10-20
FR2200581A1 (US20110158925A1-20110630-C00042.png) 1974-04-19
FR2200581B1 (US20110158925A1-20110630-C00042.png) 1977-05-27
DE2347228A1 (de) 1974-04-11

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