JPH11345894A - High frequency transistor device and substrate mounted with the high frequency transistor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency transistor which shows a proper high frequency characteristic caused by suppressing an inductance component low and of which freedom of substrate design is improved. SOLUTION: This device is constituted of a device side substrate which is constituted of a layer at least having a recess, pattern wirings 4a to 4d, 7a to 7d and 9a to 9d for gate electrodes, for drain electrodes and for source electrodes, which are provided along the surface of the device side substrate and a high frequency transistor 1, which is subjected to die bonding at the recess and is subjected to wire bonding with pattern electrodes for the gate electrodes, for the drain electrodes and for the source electrodes. The recess is set at a depth which contains the high frequency transistor 1 which is wire- bonded at a position lower than that of the device side substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a high-frequency transistor device used for a high-frequency circuit such as an amplifier or a transmitter,
In particular, the present invention relates to a high-frequency transistor device mounted on a substrate having a pattern wiring for transmitting various signals on one surface and a ground pattern wiring, and a substrate on which the high-frequency transistor device is mounted.

[0002]

2. Description of the Related Art Hitherto, various high-frequency transistor devices suitable for mounting on a substrate having various types of signal transmission pattern wiring on one side and a ground pattern wiring have been proposed. FIG. 9 is a diagram showing the structure of a conventional high-frequency transistor device 500. 9A is a view of the high-frequency transistor device 500 as viewed from above, and FIG.
13 is a sectional view taken along line GG ′ of the high-frequency transistor device 500 shown in FIG. The high-frequency transistor device 500 includes a gate electrode lead 501 and a drain electrode lead 50 on the lower surface of a package 505 in which the high-frequency transistor 504 is sealed.
2. It has source electrode leads 503a and 503b, and makes electrical connection with the wiring provided on the substrate through these leads. Each lead 501, 502, 503a, 5
03b is a side metal 506, 507, 508, 509 provided from the lower surface to the side surface of the package, respectively.
Connected to. The side metals 506 to 509 are wire-bonded to the gate electrode pad, the drain electrode pad, and the source electrode pad of the high-frequency transistor 504 to be sealed.

To increase the frequency of a high-frequency transistor device, it is preferable that the inductance component be small. However, since the side metals 506 to 509 of the high-frequency transistor device 500 are long and have many bent portions, they have a problem that they have a large inductance component and cause deterioration of characteristics of the high-frequency transistor device. Further, the leads 501, 502, 503a, and 503b connected to the side metals 506 to 509 further increase the inductance component, and further degrade the high frequency characteristics.

In order to solve the above-mentioned problem of the high-frequency transistor device 500, a pattern wiring wire-bonded to pads for a gate electrode, a drain electrode and a source electrode of the high-frequency transistor is used as it is as a surface electrode, and A high-frequency transistor having a structure that does not employ a side metal has been proposed. FIG.
FIG. 4 is a diagram showing a structure of a high-frequency transistor device 600 having no lead and side metal. (A) of FIG.
5A is a view of the high-frequency transistor device 600 as viewed from above, and FIG.
0 is a cross-sectional view taken along line HH ′. High-frequency transistor device 6
00 is a device-side substrate 601 made of alumina ceramic
The gate wiring 602 and the drain wiring 60 formed thereon
3. The source wiring 604 is formed as a gate electrode pad and a drain electrode pad of the high-frequency transistor 605, respectively.
Wire bonding is performed on the source electrode pad. The high-frequency transistor 605 is sealed by the device-side substrate 601 and the package 606.

[0005] The high-frequency transistor 6 employing the above configuration
00 does not require the side metals 506 to 509 and the leads 501 to 503 unlike the high-frequency transistor device 500, so that the inductance component can be suppressed low and good high-frequency characteristics can be obtained.

[0006]

FIG. 11 is a diagram showing a state in which the high-frequency transistor device 600 having the above configuration is mounted on an alumina ceramic substrate (hereinafter, referred to as a mounting substrate) 650. As shown in the drawing, the high-frequency transistor device 600 includes wirings 602 for gate, drain, and source electrodes on wirings provided on the mounting substrate 650.
It is mounted upside down so that 603 and 604 face each other. As shown by the dotted line, the mounting substrate 650 is provided with a concave portion 653 that can accommodate the package 606.

As described above, the high-frequency transistor device 600 includes the leads 501 to 503 and the side metals 506 to 509 like the high-frequency transistor device 500.
, The inductance component can be kept low. However, the high-frequency transistor device 6
00 is mounted on the mounting substrate 650 on which the recess 653 is mounted.
Is required, which causes a problem that the degree of freedom of mounting arrangement is reduced.

The above conventional high-frequency transistor device 50
0,600 and transmission line pattern wiring on the surface,
A high-frequency transistor device mounted on a mounting substrate having a ground pattern wiring on the back surface, wherein a gate electrode and a drain electrode are provided on the front surface, a source electrode serving as a ground terminal is provided on the back surface, and the device body is embedded in the mounting substrate. (Japanese Unexamined Patent Publication No. 5-90434, Japanese Unexamined Utility Model Publication No. 1-65512, etc.) have been proposed. In the high-frequency transistor device having this configuration, the inductance component is reduced by shortening the distance between the source electrode serving as the ground terminal and the ground pattern wiring provided on the back surface of the mounting substrate.

However, the high-frequency transistor device having the above-described structure is provided on one side with pattern wiring for transmitting various signals, and
When mounting on a mounting board with ground pattern wiring,
A via hole is required to lead the source electrode from the back surface to the front surface of the mounting substrate, resulting in unnecessary cost. In addition, the use of the via hole increases the distance between the source electrode and the ground pattern wiring, and increases the inductance component. Further, it becomes necessary to process a storage portion for embedding the device main body on the mounting substrate side, and the degree of freedom in mounting arrangement is reduced.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a high-frequency transistor device which exhibits good high-frequency characteristics by suppressing an inductance component and has a high degree of freedom in mounting arrangement, and a mounting board on which the high-frequency transistor device is mounted. And

[0011]

According to a first high-frequency transistor device of the present invention, a device-side substrate comprising at least one layer having a concave portion and a gate electrode disposed along the surface of the device-side substrate are provided. A pattern wiring for a drain electrode and a source electrode, and die-bonded to the recess,
A high-frequency transistor wire-bonded to the pattern electrodes for the gate electrode, the drain electrode, and the source electrode, wherein the recess has a depth for accommodating the wire-bonded high-frequency transistor at a position lower than the device-side substrate surface. It is characterized by being.

A second high-frequency transistor device according to the present invention is the first high-frequency transistor device described above, further comprising a cap for sealing the high-frequency transistor between a concave portion of the device-side substrate. .

A third high-frequency transistor device according to the present invention is the first or second high-frequency transistor device, wherein the pattern wiring for the gate electrode, the drain electrode and the source electrode provided on the device-side substrate comprises: A contact portion with a wiring on a substrate on which the high-frequency transistor device is mounted,
It is characterized in that it has a shape for smoothly connecting a connection portion of a wire extending from the high-frequency transistor.

A substrate according to the present invention has any one of the first to third high-frequency transistor devices mounted thereon.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-frequency transistor device according to the present invention is a high-frequency transistor device mounted on a substrate (hereinafter, referred to as a mounting substrate) provided with various types of signal transmission pattern wiring and ground pattern wiring on one surface. And a device for die-bonding the high-frequency transistor so that the high-frequency transistor wire-bonded to the pattern wiring for each electrode provided along the surface does not hinder the mounting of the high-frequency transistor device on a mounting substrate. A concave portion is provided on the side substrate.
Hereinafter, an embodiment of a high-frequency transistor device having the above features will be described.

(1-1) First Embodiment Hereinafter, a high-frequency transistor device 1 according to a first embodiment will be described.
00 will be described. High-frequency transistor device 100
Is a DBS operating at a driving frequency of 12 GHz, for example.
(Direct Broadcasting Satellite). FIG. 1 is a diagram showing a configuration of the high-frequency transistor device 100. FIG. 1A is a view of the high-frequency transistor device 100 as viewed from above, and FIG.
FIG. 2 is a cross-sectional view of the high-frequency transistor device 100 shown in FIG.

The high-frequency transistor 1 has an outer dimension of 0.4 mm.
× 0.4mm, 0.1mm thick G for high frequency semiconductor device
aAs chip, external dimensions 3 mm x 3 mm, thickness 0.8
A 5 mm alumina ceramic multilayer substrate (hereinafter referred to as a device side substrate) is die-bonded with an epoxy resin to a concave portion provided at the center. The device side substrate is 4
It is formed by two insulating layers 2, 3, 6, and 8. The insulating layers 3, 6, and 8 have rectangular openings that form the recesses. The opening of the insulating layer 6 is set to be smaller than the opening of the insulating layer 8. In addition, as a material of the device-side substrate, an insulating substrate such as a ceramic other than alumina may be used.

On the device-side substrate, pattern wirings 4a, 7a, 9a for the gate electrode, pattern wirings 4c, 7c, 9c for the drain electrode, and pattern wirings 4b, 4d, 7b for the source electrode are formed along the surface thereof. 7d, 9b and 9d are provided. Each electrode pad of the high-frequency transistor 1 has a corresponding pattern wiring 4a, 4b,
4c and 4d are bonded by a gold wire having a diameter of 0.25 μm.

In the above structure, the concave portions formed by the openings of the insulating layers 3, 6, 8 are turned upside down with respect to the high-frequency transistor device, and each of the electrode pattern wirings 9a, 9b, 9c,
Each of the electrode pattern wirings 9a, 9b, 9b, 9c is provided on the surface of the device-side substrate so that the wire-bonded high-frequency transistor 1 is not obstructed when connecting the wiring 9d to the wiring on the mounting substrate 20 (see FIG. 3). The depth is set to be lower than 9c and 9d.

FIG. 2 shows a 0.13 mm-thick alumina ceramic cap 10 on a step formed by the difference in the size of the opening between the insulating layer 6 and the insulating layer 8 of the high-frequency transistor device 100 shown in FIG. FIG. 2 is a view showing a state in which is adhered by an epoxy resin 11.

FIG. 2A is a top view of the high-frequency transistor device 100, and FIG. 2B is a cross-sectional view of the high-frequency transistor device 100 shown in FIG.
By sealing the high-frequency transistor 1 using the cap 10, malfunction of the circuit due to intrusion of dust or the like can be prevented and handling convenience can be improved.

FIG. 3 shows a 0.5 m-thick pattern wiring pattern wiring and ground pattern wiring on one side.
FIG. 3 is a cross-sectional view showing a state in which the high-frequency transistor device 100 shown in FIG. 2 is mounted on a mounting substrate 20 made of Teflon. The pattern electrodes 9a, 9b, 9c, 9d (only 9a and 9c are shown in the drawing) of the high-frequency transistor device 100 are connected to the wirings 21a, 21b, 21c, 21d provided on the mounting substrate 20 (in the drawing, 2
1a and 21c only) and AuSn solders 22a and 22a
They are electrically connected by 1b, 21c and 22d. In the high-frequency transistor device 100, the pattern electrodes 9a, 9b,
The high-frequency transistor 1 wire-bonded is housed at a position lower than the surfaces 9c and 9d. Also, cap 1
The thickness of 0 is set so as not to affect the connection by AuSn solder between each of the pattern electrodes 9a, 9b, 9c, 9d and the wirings 21a, 21b, 21c, 21d. No special processing is required other than wiring for connection. Thereby, the processing cost of the mounting substrate 20 can be reduced, and the degree of freedom in the arrangement of the high-frequency transistor device 100 on the mounting substrate 20 can be improved.

(1-2) Modified Example FIG. 4 is a diagram showing a configuration of a high-frequency transistor device 150 which is a first modified example of the high-frequency transistor device 100. FIG. (B) is CC 'sectional drawing of the high frequency transistor device 150 shown to (a). In the high-frequency transistor device 100, a structure in which a total of three insulating layers are stacked on the insulating layer 2 is employed. On the other hand, in the high-frequency transistor device 150, the structure (the insulating layers 3, 6, and 8) above the insulating layer 2 of the high-frequency transistor device 100 is configured by one insulating layer 15. Other configurations are the same as those of the high-frequency transistor 100. In addition, as shown by a dotted line, it is preferable to seal the high-frequency transistor 1 using the cap 10. This can prevent malfunction due to intrusion of dust and the like, and can improve handling convenience.

FIG. 5 is a diagram showing a configuration of a high-frequency transistor device 160 which is a second modification of the high-frequency transistor device 100. FIG.
60 is a top view of the high frequency transistor device 160 shown in FIG. The high-frequency transistor device 160 which is a second modification of the high-frequency transistor device 100 has two insulating layers 2 used in the high-frequency transistor device 150 which is the first modification.
And 15 are configured using one insulating layer 16. For other configurations, the high-frequency transistor 10
Same as 0. As shown by the dotted line, the cap 1
It is preferable to seal the high-frequency transistor 1 by using 0. This can prevent malfunction due to intrusion of dust and the like, and can improve handling convenience.

(2) Second Embodiment Hereinafter, a high-frequency transistor device 3 according to a second embodiment will be described.
00 will be described. FIG. 6 shows a high-frequency transistor 3
FIG. 2 is a diagram showing a configuration of a 00. FIG. 6A is a view of the high-frequency transistor device 300 as viewed from above, and FIG. 6B is a diagram illustrating EE ′ of the high-frequency transistor device 100 shown in FIG.
It is sectional drawing. The high-frequency transistor 301 has an outer dimension of 0.1 mm.
This is a GaAs chip for a high-frequency semiconductor device having a size of 4 mm × 0.4 mm and a thickness of 0.1 mm. High frequency transistor 301
Is die-bonded with an epoxy-based resin to a concave part having a depth of 0.4 mm provided at the center of an apparatus-side substrate 302 made of alumina ceramic having an outer size of 3 mm × 3 mm and a thickness of 0.85 mm. The depth of the concave portion may be any value as long as the wire-bonded high-frequency transistor is located at a position lower than the surface of the device-side substrate.

The gate electrode pattern wiring 304 and the source electrode pattern wiring 3 are formed along the surface of the device-side substrate 302.
05 and 307, and pattern wiring 3 for drain electrode
06 is provided. Each of the above-mentioned pattern wirings has a corresponding electrode pad of the high-frequency transistor 301 and a diameter of 0.25.
Bonded by a gold wire of μm.

As shown in FIG. 6B, the high-frequency transistor 301 is bonded to the central concave portion of the device-side substrate 302 and is provided at a position lower than the surface on which the pattern wirings 304 to 307 are provided. . Therefore, the mounting substrate 350 (see FIG. 8) on which the high-frequency transistor 300 is mounted does not require any special processing other than wiring. This increases the degree of freedom in mounting arrangement.

FIG. 6 (b) shows P
1, P2, P3, and P4 have corners. For this reason, the pattern wirings 304, 305, 306, and 307 for the electrodes provided along the surface of the device-side substrate do not have bent portions, and contact with the wiring provided on the mounting substrate 350 (see FIG. 8). And a connection portion of a wire extending from the high-frequency transistor 301 is smoothly connected. Therefore, the high-frequency transistor device 300 can suppress the inductance component lower than the high-frequency transistors 100, 150, and 160.

FIG. 7 shows the high-frequency transistor device 30 shown in FIG.
FIG. 4 is a diagram showing a state in which a cap 310 made of alumina ceramic having a thickness of 0.1 μm is attached to a concave portion 0 with an epoxy resin 311. FIG. 7A is a view of the high-frequency transistor 300 as viewed from above, and FIG. 7B is a view FF ′ of the high-frequency transistor device 300 shown in FIG.
It is sectional drawing. In this manner, by sealing the high-frequency transistor 301 with the cap 310, malfunction due to intrusion of dust or the like into the high-frequency transistor 301 can be prevented, and handling convenience can be improved.

FIG. 8 is a sectional view showing a state in which the high-frequency transistor 300 is mounted on a mounting substrate 350 made of Teflon having a thickness of 0.5 mm. Pattern wiring 304, 305, 30 included in high-frequency transistor device 300
6,307 (only 304 and 306 are shown in the drawing)
Are wirings 351 and 351 provided on the mounting substrate 350.
352, 353, 354 (351 and 353 in the drawings)
Only shown) and AuSn solder 361, 352, 353, 3
64 (only 361 and 363 are shown in the drawing). The high-frequency transistor 300 includes pattern wirings 304, 305, 306,
Since the height difference between the cap 307 and the cap 310 is about 0.4 mm, mounting can be performed without providing a concave portion on the mounting substrate 350 side. Therefore, the processing cost of the mounting substrate 350 can be reduced, and the degree of freedom in the arrangement of the high-frequency transistor device 300 on the mounting substrate 350 can be improved.

[0031]

According to the first high-frequency transistor device of the present invention, each electrode pad of the high-frequency transistor is directly wire-bonded to the pattern wiring provided on the device-side substrate, and these pattern wirings are used as electrodes. ,
The inductance component can be kept low. Also,
By bonding the high-frequency transistor to a predetermined recess provided on the device-side substrate, the pattern wiring of each electrode of the high-frequency transistor device and the wiring on the mounting substrate can be provided without providing a recess for accommodating the high-frequency transistor on the mounting substrate. Can be connected.

In the second high-frequency transistor device of the present invention, by sealing the high-frequency transistor device with a cap, it is possible to prevent malfunction of the high-frequency transistor due to intrusion of dust and to improve convenience in handling. it can.

In the third high-frequency transistor device of the present invention, the concave portion provided on the device-side substrate is formed with a curved surface, and the pattern wiring of each electrode is formed in a smooth shape.
The inductance component of the pattern wiring can be further reduced.

Further, the substrate on which the first to third high-frequency transistor devices are mounted can be formed without providing a recess for accommodating the high-frequency transistor on the mounting substrate, and by providing the pattern wiring of each electrode of the high-frequency transistor device and the mounting substrate. Since the high-frequency transistor device is connected to the upper wiring, there is an advantage that the degree of freedom of arrangement of the high-frequency transistor device is high and the manufacturing cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a high-frequency transistor device according to a first embodiment;

FIG. 2 is a diagram illustrating a configuration of the high-frequency transistor device according to the first embodiment;

FIG. 3 is a cross-sectional view showing a state where the high-frequency transistor device according to the first embodiment is mounted on a mounting substrate.

FIG. 4 is a diagram showing a configuration of a modification of the high-frequency transistor device according to the first embodiment;

FIG. 5 is a diagram illustrating a configuration of a modification of the high-frequency transistor device according to the first embodiment;

FIG. 6 is a diagram illustrating a configuration of a high-frequency transistor device according to a second embodiment;

FIG. 7 is a diagram illustrating a configuration of a high-frequency transistor device according to a second embodiment;

FIG. 8 is a cross-sectional view of a state where the high-frequency transistor device according to the second embodiment is mounted on a mounting substrate.

FIG. 9 is a diagram showing a configuration of a conventional high-frequency transistor device.

FIG. 10 is a diagram showing a configuration of a conventional high-frequency transistor device.

FIG. 11 is a cross-sectional view showing a state where a conventional high-frequency transistor device is mounted on a mounting container plate.

[Explanation of symbols]

1,301,504,605 high frequency transistor,
2,3,6,8,15,16 Insulating layer constituting device side substrate, 302 device side substrate, 4a, 4b, 4c, 4d,
7a, 7b, 7c, 7d, 9a, 9b, 9c, 9d Pattern wiring, 5a, 5b, 5c, 5d Gold wire, 10
Cap, 20, 350, 650 Mounting substrate, 21
a, 21c, 351, 353 Substrate wiring, 100, 15
0, 160, 300, 500 High-frequency transistor device, 501, 502, 503a, 503b Lead, 5
06,507,508,509 Side metal

Claims (4)

[Claims] A device-side substrate comprising at least one layer having a concave portion; and a gate electrode disposed along the surface of the device-side substrate;
Pattern wiring for a drain electrode and a source electrode; and die bonding to the recess, for the gate electrode,
A high-frequency transistor wire-bonded to a pattern electrode for a drain electrode and a source electrode, wherein the recess is deep enough to accommodate the high-frequency wire-bonded transistor at a position lower than the device-side substrate surface. High-frequency transistor device. 2. The high-frequency transistor device according to claim 1, further comprising: a cap that seals the high-frequency transistor between a concave portion of the device-side substrate. 3. The high-frequency transistor device according to claim 1, wherein the pattern wiring for the gate electrode, the drain electrode, and the source electrode of the device-side substrate mounts the high-frequency transistor device. A high-frequency transistor device having a shape that smoothly connects a contact portion with a wiring on a substrate to be connected and a connection portion of a wire extending from the high-frequency transistor. 4. A substrate on which the high-frequency transistor device according to claim 1 is mounted.