JPH112828A - Liquid crystal image display device and its manufacture - Google Patents

Liquid crystal image display device and its manufacture

Info

Publication number
JPH112828A
JPH112828A JP15144997A JP15144997A JPH112828A JP H112828 A JPH112828 A JP H112828A JP 15144997 A JP15144997 A JP 15144997A JP 15144997 A JP15144997 A JP 15144997A JP H112828 A JPH112828 A JP H112828A
Authority
JP
Japan
Prior art keywords
insulating layer
liquid crystal
scanning line
forming
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15144997A
Other languages
Japanese (ja)
Inventor
Kiyohiro Kawasaki
清弘 川崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15144997A priority Critical patent/JPH112828A/en
Publication of JPH112828A publication Critical patent/JPH112828A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To improve aperture rate by forming a counter electrode in a grating shape on scanning lines and signal lines across a thick insulating layer. SOLUTION: When a terminal electrode 24 is formed for a scanning line 8, an opening part 22 is formed in the thick transparent insulating layer 21 and after a 1st silicon nitride layer 13 as a gate insulating layer in the opening part 22 is removed, the terminal electrode 24 of the scanning line 8 and terminal electrode 5 of a signal line 7 are formed of a 3rd metal layer, so that the opening part can be formed in the insulating layer only once. Here, the terminal electrode 24 of the scanning line 8 and the terminal electrode 5 of the signal line 7 is not made independent, but connected by a thin pattern 25 and then the scanning line 8 and signal line 7 short-circuit, so an electrostatic measure is taken in a liquid crystal cell forming process. Thus, the counter electrode is formed in the grating shape on the scanning lines 8 and signal lines 7 across the thick transparent insulating layer 21 to evade the concentration of a charging and a discharging current of the liquid crystal cell in the row direction of the counter electrode, which can be made thin.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はスイッチ素子として
薄膜半導体素子を用いて構成される液晶画像表示装置、
とりわけ視野角の拡大に関連した技術に深く関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal image display device comprising a thin film semiconductor element as a switch element.
In particular, it is deeply related to the technology related to the expansion of the viewing angle.

【0002】[0002]

【従来の技術】非晶質シリコンを半導体材料とする薄膜
トランジスタをスイッチ素子として単位絵素毎に内蔵し
たアクティブ型の液晶画像表示装置は、生産性向上の取
組も相まって基板サイズの拡大が急激に進展し、現状で
は 550×650 mm 以上の大きさのガラス基板の採用に
より画面サイズが20型(50cm)を越えるものまで
商品化されようとしている。
2. Description of the Related Art An active type liquid crystal image display device in which a thin film transistor using amorphous silicon as a semiconductor material is incorporated in each pixel as a switching element is rapidly expanding in substrate size in combination with efforts to improve productivity. However, at present, the adoption of a glass substrate having a size of 550 × 650 mm or more is being commercialized to a screen size exceeding 20 inches (50 cm).

【0003】図5はこのような液晶パネル1の斜視図を
示し、一方の透明性絶縁基板、例えばガラス基板2上に
は走査線と信号線との交点毎にスイッチ素子としての薄
膜トランジスタと絵素電極とが2次元のマトリクスに配
列されて画像表示部が構成されている。信号線7の先端
部に形成された端子電極5には、例えばフィルムキャリ
ア4を用いたTCP実装により信号線7に映像信号が供
給され、走査線8の先端部の端子電極24(後述する
が、ここでは図示せず)には例えば半導体チップ3を直
接接続するCOG実装により走査線8に走査信号が供給
され、画像表示部に画像が表示される。ここでは便宜上
2種類の実装方式を同時に図示しているが、実際にはい
ずれかの方式が適宜選択して採用される。6は画像表示
部上に対向するもう1枚のガラス基板で、2枚のガラス
基板2,6によって挟持される厚さ数μmの空間に液晶
が充填され光学素子として機能する。多くの場合、液晶
と接する対向ガラス基板6の内表面には単位絵素毎また
は信号線毎に対応した有機薄膜よりなる着色層が付与さ
れてカラー画像表示されるので、対向ガラス基板6は別
名カラーフィルタと称されることが多い。
FIG. 5 is a perspective view of such a liquid crystal panel 1. On one transparent insulating substrate, for example, a glass substrate 2, a thin film transistor as a switching element and a pixel are provided at each intersection of a scanning line and a signal line. The electrodes are arranged in a two-dimensional matrix to form an image display unit. A video signal is supplied to the signal line 7 by, for example, TCP mounting using the film carrier 4 to the terminal electrode 5 formed at the distal end of the signal line 7, and the terminal electrode 24 at the distal end of the scanning line 8 (to be described later). (Not shown here), a scanning signal is supplied to the scanning line 8 by COG mounting for directly connecting the semiconductor chip 3, for example, and an image is displayed on an image display unit. Here, for the sake of convenience, two types of mounting methods are shown at the same time, but in practice any one of the methods is appropriately selected and adopted. Reference numeral 6 denotes another glass substrate facing the image display unit, and a liquid crystal is filled in a space having a thickness of several μm sandwiched between the two glass substrates 2 and 6 to function as an optical element. In many cases, a colored layer made of an organic thin film corresponding to each unit pixel or each signal line is provided on the inner surface of the opposing glass substrate 6 which is in contact with the liquid crystal, and a color image is displayed. It is often called a color filter.

【0004】走査線8と走査線先端部の端子電極24,
信号線7と信号線先端部の端子電極5は必ずしもそれぞ
れ同一の導電性部材で構成される必要はなく、走査線8
や信号線7への開口部形成と導電性薄膜の被着形成工程
が付加されれば選択の自由度は高い。
The scanning line 8 and the terminal electrodes 24 at the tip of the scanning line,
The signal line 7 and the terminal electrode 5 at the distal end of the signal line need not necessarily be formed of the same conductive member.
If the steps of forming an opening in the signal line 7 and forming a conductive thin film are added, the degree of freedom of selection is high.

【0005】図6はスイッチ素子として絶縁ゲート型ト
ランジスタ9を用いたアクティブ型液晶画像表示装置の
等価回路を示し、7は信号線、8は走査線、10は液晶
セルである。実線で描かれた素子類は液晶画像表示装置
を構成する一方のガラス基板2上に形成され、点線で描
かれた全ての液晶セル10に共通な対向電極11は従来
の液晶画像表示装置ではもう一方の対向ガラス基板6上
に形成されていたが、後述するIPS方式の液晶画像表
示装置では同一のガラス基板2上に形成される。絶縁ゲ
ート型トランジスタ9のOFF抵抗あるいは液晶セル1
0の抵抗が低い場合や表示画像の階調性を重視する場合
には、負荷としての液晶セル10の時定数を大きくする
ための補助の蓄積容量12を液晶セル10に並列に加え
るなどの回路的工夫が加味される。
FIG. 6 shows an equivalent circuit of an active type liquid crystal image display device using an insulated gate transistor 9 as a switch element, wherein 7 is a signal line, 8 is a scanning line, and 10 is a liquid crystal cell. The elements drawn by solid lines are formed on one glass substrate 2 constituting the liquid crystal image display device, and the common electrode 11 common to all the liquid crystal cells 10 drawn by dotted lines is no longer used in the conventional liquid crystal image display device. Although formed on one counter glass substrate 6, it is formed on the same glass substrate 2 in an IPS type liquid crystal image display device described later. OFF resistance of insulated gate transistor 9 or liquid crystal cell 1
When the resistance of 0 is low or when the gradation of a display image is emphasized, a circuit such as adding an auxiliary storage capacitor 12 in parallel with the liquid crystal cell 10 to increase the time constant of the liquid crystal cell 10 as a load. Ingenuity is added.

【0006】図7は液晶材料としてTN(ツイスト・ネ
マチック)型のものを用い、上下の透明電極41,42
が形成された2枚のガラス板43,44で従来の液晶セ
ルを構成した場合の視野角の変化量を示した概念図で、
液晶分子50の液晶セルの厚み方向の対称性の悪さが原
因で視野角が狭い欠点があった。
FIG. 7 shows a case where a TN (twisted nematic) type liquid crystal material is used and upper and lower transparent electrodes 41 and 42 are used.
FIG. 7 is a conceptual diagram showing the amount of change in viewing angle when a conventional liquid crystal cell is constituted by two glass plates 43 and 44 on which are formed.
There is a disadvantage that the viewing angle is narrow due to poor symmetry of the liquid crystal molecules 50 in the thickness direction of the liquid crystal cell.

【0007】これに対して図8に示したように、同じT
N型の液晶材を用いても1枚のガラス基板45上に対向
して平行する櫛形の電極47,48を配置しすると、液
晶分子50の液晶セルの厚み方向の対称性が良くなり視
野角が格段と拡大される。図8では下側の一方のガラス
基板45面上で液晶分子50が電圧の印加によって回転
することからこのような駆動方式をIPS(In Plain
Switchig)と称している。なお、46は液晶セルを構
成するためのもう一方の対向ガラス基板またはカラーフ
ィルタである。
On the other hand, as shown in FIG.
Even if an N-type liquid crystal material is used, if the comb-shaped electrodes 47 and 48 are arranged in parallel on one glass substrate 45, the symmetry of the liquid crystal molecules 50 in the thickness direction of the liquid crystal cell is improved, and the viewing angle is increased. Is greatly expanded. In FIG. 8, since the liquid crystal molecules 50 are rotated on the lower one glass substrate 45 by application of a voltage, such a driving method is called IPS (In Plain).
Switchig). Reference numeral 46 denotes another counter glass substrate or a color filter for forming a liquid crystal cell.

【0008】図9はIPS方式による液晶画像表示装置
を構成するアクティブ基板の単位絵素の平面図、図10
は図9のA−A’線上の断面図を示し、その製造工程を
以下に簡単に記載する。
FIG. 9 is a plan view of a unit picture element of an active substrate constituting a liquid crystal image display device according to the IPS system.
Shows a cross-sectional view taken along the line AA 'in FIG. 9, and the manufacturing process thereof will be briefly described below.

【0009】先ず、図10(a)に示したように耐熱性
と透明性が高い絶縁性基板としてのガラス基板2、例え
ばコーニング社製の商品名1737の一主面上に、例え
ばSPTなどの真空製膜装置を用いて膜厚 0.2 μm
程度の第1の金属層として、例えばCr薄膜を被着し、
微細加工技術により走査線も兼ねるゲート電極8と対向
電極11とを選択的に形成する。
First, as shown in FIG. 10A, a glass substrate 2 as an insulating substrate having high heat resistance and high transparency, for example, on one main surface of a product name 1737 manufactured by Corning Incorporated, such as SPT 0.2 μm film thickness using vacuum film forming equipment
For example, as a first metal layer, a Cr thin film is applied,
The gate electrode 8 also serving as a scanning line and the counter electrode 11 are selectively formed by fine processing technology.

【0010】次に、図10(b)に示したようにガラス
基板2の全面にPCVD装置を用いてゲート絶縁層とな
る第1のシリコン窒化層(SiNx)13、不純物をほ
とんど含まず絶縁ゲート型トランジスタのチャネルとな
る第1の非晶質シリコン層(a−Si)14および第2
のシリコン窒化層15の3種類の薄膜層を、例えば膜厚
0.3-0.05-0.1 μmで順次被着し、微細加工技術によ
りゲート電極8上の第2のシリコン窒化層15を選択的
に残して15’とし、第1の非晶質シリコン層14を露
出する。
Next, as shown in FIG. 10B, a first silicon nitride layer (SiNx) 13 serving as a gate insulating layer is formed on the entire surface of the glass substrate 2 by using a PCVD apparatus, and the insulating gate is substantially free of impurities. Amorphous silicon layer (a-Si) 14 and second
The three types of thin film layers of the silicon nitride layer 15
Then, the second silicon nitride layer 15 on the gate electrode 8 is selectively left to 15 'by a fine processing technique to expose the first amorphous silicon layer 14. .

【0011】次に、同じくPCVD装置を用いて全面に
不純物として、例えば燐を含む第2の非晶質シリコン層
16を例えば 0.05 μmの膜厚で被着し、図示はしな
いが走査線8への電気的接続に必要なガラス基板2の周
辺部での走査線8上の選択的開口部形成を行った後、図
10(c)に示したようにSPTなどの真空製膜装置を
用いて膜厚 0.3 μm程度の第2の金属層として、例
えばAL薄膜を被着し、微細加工技術により信号線(ソ
ース配線)7と絵素(ドレイン)電極17とを選択的に
形成する。この時には、前記電極や配線を形成するため
に用いられた感光性樹脂パターンとAL薄膜層とをマス
クとして第2と第1の非晶質シリコン層16,14をも
除去して第1のシリコン窒化層13を露出させる。絶縁
ゲート型トランジスタがオフセット構造とならないため
にはソース・ドレイン配線(電極)7,17はゲート電
極8と一部平面的に重なった位置関係で形成される。な
お、走査線8上の開口部を含んで信号線7と同時にゲー
ト配線(図示せず)を作製することも一般的である。
Next, a second amorphous silicon layer 16 containing, for example, phosphorus as an impurity is deposited to a thickness of, for example, 0.05 μm on the entire surface by using a PCVD apparatus. After selectively forming openings on the scanning lines 8 at the periphery of the glass substrate 2 necessary for electrical connection of the substrate, as shown in FIG. 10C, using a vacuum film forming apparatus such as SPT. As a second metal layer having a thickness of about 0.3 μm, for example, an AL thin film is applied, and a signal line (source wiring) 7 and a picture element (drain) electrode 17 are selectively formed by a fine processing technique. At this time, the second and first amorphous silicon layers 16 and 14 are also removed by using the photosensitive resin pattern and the AL thin film layer used for forming the electrodes and wirings as a mask to remove the first silicon. The nitride layer 13 is exposed. In order that the insulated gate transistor does not have an offset structure, the source / drain wirings (electrodes) 7 and 17 are formed in a positional relationship that partially overlaps the gate electrode 8 in a planar manner. It is also common to form a gate wiring (not shown) simultaneously with the signal line 7 including the opening on the scanning line 8.

【0012】この状態でもアクティブ基板として動作は
可能であるが、液晶セルに直流成分が侵入して高温動作
あるいは長期連続動作に対して液晶が劣化し、黒く着色
する信頼性上の課題を回避するため、図10(d)に示
したようにさらにガラス基板2の全面に透明性の絶縁
層、例えば第3のシリコン窒化層18をやはりPCVD
装置を用いて 0.3 μm程度被着してアクティブ基板
として完成する。もちろん、走査線8や信号線7に電気
信号を供給できるようにガラス基板2の周辺部にて走査
線8や信号線7の端子電極上のパシベーション絶縁層で
ある第3のシリコン窒化層18は選択的に除去されて端
子電極は露出している。
Even in this state, the liquid crystal cell can operate as an active substrate. However, a direct current component enters the liquid crystal cell, and the liquid crystal is deteriorated due to high temperature operation or continuous operation for a long period of time. Therefore, as shown in FIG. 10D, a transparent insulating layer, for example, a third silicon nitride layer 18 is further formed on the entire surface of the glass substrate 2 by PCVD.
An active substrate is completed by depositing about 0.3 μm using an apparatus. Of course, the third silicon nitride layer 18 which is a passivation insulating layer on the terminal electrodes of the scanning lines 8 and the signal lines 7 is provided around the glass substrate 2 so that an electric signal can be supplied to the scanning lines 8 and the signal lines 7. The terminal electrode is exposed by being selectively removed.

【0013】なお上記した製造工程では理解を容易にす
るため、液晶画像表示装置としての構成は最低限度の構
成因子について説明している。そのため、例えば絶縁ゲ
ート型トランジスタの耐熱性を高めるにソース・ドレイ
ン配線7、17と不純物を含みソース・ドレインとなる
第2の非晶質シリコン層16’との間にCr,Mo,T
iあるいはこれらのシリサイドなどの耐熱バリア金属を
介在させる技術や、ゲート金属層8を多層化して抵抗値
を下げたり、あるいは走査線8と信号線7との間の層間
短絡を防止する技術などについては説明を省略した。ま
た液晶セルを構成するスペーサやシール材について、さ
らに液晶セルとして動作させるために必要な配向膜、偏
光板などの部材についても、および裏面光源などの光学
素子として必要な構成因子についても説明を省略してい
る。
In the above-described manufacturing process, the configuration of the liquid crystal image display device is described with respect to the minimum constituent factors for easy understanding. Therefore, for example, in order to improve the heat resistance of the insulated gate transistor, Cr, Mo, T are formed between the source / drain wirings 7 and 17 and the second amorphous silicon layer 16 ′ containing impurities and serving as the source / drain.
i, or a technique of interposing a heat-resistant barrier metal such as a silicide thereof, a technique of reducing the resistance value by multiplying the gate metal layer 8, or a technique of preventing an interlayer short circuit between the scanning line 8 and the signal line 7. Omitted the description. In addition, descriptions of spacers and sealing materials constituting a liquid crystal cell, members for an alignment film, a polarizing plate, and the like necessary for operating the liquid crystal cell, and constituent factors required for an optical element such as a back light source are omitted. doing.

【0014】図9に示した金属よりなる絵素(ドレイ
ン)電極17と対向電極11とを同一の基板上で櫛形状
に対向させるIPS方式の単位絵素は、従来の透明絵素
電極と同じく透明な対向電極とを別々の透明基板上でサ
ンドイッチ状に対向させる単位絵素と比較すると開口率
は前者で40%以下、後者で60%以上と圧倒的に低
く、明るい画像が得られない。その理由は、1)絵素電
極17と対向電極11とが金属薄膜で構成される、2)
絵素電極17と対向電極11そのものは表示に寄与せ
ず、絵素電極17と対向電極11との間の透明領域が表
示に寄与するからであり、したがって高い開口率を得る
ためには絵素電極17と対向電極11とをできるだけ微
細化する必要がある。
The unit pixel of the IPS system in which the pixel (drain) electrode 17 and the counter electrode 11 made of metal shown in FIG. 9 are opposed in a comb shape on the same substrate is the same as the conventional transparent pixel electrode. When compared with a unit pixel in which a transparent counter electrode is opposed to a transparent substrate in a sandwich manner on a separate transparent substrate, the former has an overwhelmingly low aperture ratio of 40% or less, and the latter has an overwhelmingly low 60% or more, and a bright image cannot be obtained. The reasons are 1) the picture element electrode 17 and the counter electrode 11 are composed of a metal thin film, 2)
This is because the picture element electrode 17 and the counter electrode 11 themselves do not contribute to the display, and the transparent area between the picture element electrode 17 and the counter electrode 11 contributes to the display. The electrode 17 and the counter electrode 11 need to be miniaturized as much as possible.

【0015】絵素電極17を微細化することは露光機の
解像力限界と食刻精度の問題であるが、対向電極11は
液晶セルを充放電する電流が行(横)方向に絵素毎に積
算されていくので表示画素数の増大および表示画面の拡
大に対しては極めて重要な意味を持っている。対向電極
の抵抗値による電圧降下の増大を防止する意味で、少な
くとも対向電極11を行(横)方向に細長に、図9では
上下方向にパターン幅を細くすることには設計上の限界
が存在する。
Although miniaturization of the pixel electrode 17 is a problem of the resolution limit of the exposure device and the etching accuracy, the counter electrode 11 is provided with a current for charging and discharging the liquid crystal cell in a row (lateral) direction for each pixel. Since the integration is performed, it has a very important meaning for increasing the number of display pixels and the display screen. In order to prevent an increase in the voltage drop due to the resistance value of the counter electrode, there is a design limitation in making the counter electrode 11 slender in the row (horizontal) direction and in FIG. 9 to reduce the pattern width in the vertical direction. I do.

【0016】液晶セルの時定数を長くするために補助容
量12を導入した場合には、補助容量12を充放電する
電流も加算されるので対向電極11のパターン幅を逆に
上下方向に広げる必要がある。なお、図9では絵素(ド
レイン)電極17と対向電極11とがゲート絶縁層およ
び第1と第2の非晶質シリコン層とを介して重なった領
域19が補助容量12を構成している。
When the auxiliary capacitor 12 is introduced to increase the time constant of the liquid crystal cell, a current for charging and discharging the auxiliary capacitor 12 is also added, so that the pattern width of the counter electrode 11 must be increased in the vertical direction. There is. In FIG. 9, a region 19 where the picture element (drain) electrode 17 and the counter electrode 11 overlap with each other via the gate insulating layer and the first and second amorphous silicon layers constitutes the auxiliary capacitance 12. .

【0017】[0017]

【発明が解決しようとする課題】視野角は広いが開口率
が低く明るい画像が得にくいIPS方式の液晶画像表示
装置は、結局は裏面光源を強力にして明るい画像を得る
ことで実用化することが優先され、消費電力の観点から
も大きな課題を有している。
An IPS type liquid crystal image display device having a wide viewing angle but a low aperture ratio and difficult to obtain a bright image is to be put to practical use by eventually obtaining a bright image with a strong back light source. Has priority, and there is a major problem from the viewpoint of power consumption.

【0018】本発明は上記した現状に鑑みなされたもの
で、開口率の高いIPS方式の液晶画像表示装置を提供
することを目的とする。
The present invention has been made in view of the above situation, and has as its object to provide an IPS type liquid crystal image display device having a high aperture ratio.

【0019】[0019]

【課題を解決するための手段】本発明は、一主面上に絶
縁ゲート型トランジスタと、前記絶縁ゲート型トランジ
スタのドレインに接続された絵素電極と、前記絵素電極
とは所定の距離を隔てて形成された対向電極とを少なく
とも各々1個は有する単位絵素が二次元のマトリクスに
配列された第1の透明性絶縁基板と、第2の透明性絶縁
基板またはカラーフィルタとの間に液晶を充填してなる
液晶画像表示装置において、前記第1の透明性絶縁基板
上に形成された厚い透明絶縁層を介して走査線上と信号
線上とに格子状の対向電極が形成されることを特徴とす
るものである。
According to the present invention, there is provided an insulated gate transistor on one main surface, a pixel electrode connected to a drain of the insulated gate transistor, and a predetermined distance from the pixel electrode. A first transparent insulating substrate in which unit picture elements each having at least one counter electrode formed at a distance are arranged in a two-dimensional matrix, and a second transparent insulating substrate or a color filter; In a liquid crystal image display device filled with liquid crystal, a grid-like counter electrode is formed on a scanning line and a signal line via a thick transparent insulating layer formed on the first transparent insulating substrate. It is a feature.

【0020】このように、行(横)方向への充放電電流
の集中を回避するために対向電極が十字状に形成される
結果、充放電電流は上下左右方向に分散して流れるので
対向電極のパターン幅を狭めることが可能となる。また
厚い絶縁層を介して走査線や信号線上に形成されるの
で、対向電極の実効的な抵抗値の低減に加えて表示に寄
与する領域が拡大し、さらに開口率が高くなる。
As described above, the counter electrode is formed in a cross shape in order to avoid concentration of the charging / discharging current in the row (horizontal) direction. As a result, the charging / discharging current flows dispersedly in the vertical and horizontal directions. Can be narrowed. In addition, since it is formed on the scanning line or the signal line via the thick insulating layer, the area which contributes to the display is increased in addition to the reduction of the effective resistance value of the counter electrode, and the aperture ratio is further increased.

【0021】[0021]

【発明の実施の形態】本発明の請求項1に記載の発明
は、一主面上に絶縁ゲート型トランジスタと、前記絶縁
ゲート型トランジスタのドレインに接続された絵素電極
と、前記絵素電極とは所定の距離を隔てて形成された対
向電極とを少なくとも各々1個は有する単位絵素が二次
元のマトリクスに配列された第1の透明性絶縁基板と、
第2の透明性絶縁基板またはカラーフィルタとの間に液
晶を充填してなる液晶画像表示装置において、前記第1
の透明性絶縁基板上に形成された厚い透明絶縁層を介し
て前記走査線上と前記信号線上とに格子状の対向電極が
形成されるとともに、走査線と信号線の端子電極形成位
置上の前記厚い透明絶縁層に形成された開口部を含んで
走査線と信号線の端子電極が前記対向電極と同一工程で
形成されてなることを特徴とするものである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is directed to an insulated gate transistor on one main surface, a picture element electrode connected to a drain of the insulated gate transistor, and the picture element electrode. And a first transparent insulating substrate in which unit picture elements having at least one counter electrode formed at a predetermined distance are arranged in a two-dimensional matrix,
In a liquid crystal image display device in which a liquid crystal is filled between a second transparent insulating substrate and a color filter,
A grid-like counter electrode is formed on the scanning line and the signal line via a thick transparent insulating layer formed on a transparent insulating substrate of The terminal electrodes of the scanning lines and the signal lines including the openings formed in the thick transparent insulating layer are formed in the same step as the counter electrodes.

【0022】本発明の請求項2に記載の発明は、透明性
絶縁基板上に、1層以上の第1の金属層よりなる絶縁ゲ
ート型トランジスタのゲートを兼ねる走査線を形成する
工程と、少なくともゲート絶縁層とチャネルとなる半導
体層とソース・ドレインとなる不純物を含む半導体層と
を形成する工程と、1層以上の第2の金属層よりなる信
号(ソース)線とドレイン電極とを形成する工程と、全
面に厚い透明絶縁層を形成する工程と、走査線と信号線
の端子電極形成位置上の前記厚い透明絶縁層に開口部を
形成する工程と、前記走査線上の開口部内の絶縁層を除
去して走査線を選択的に露出する工程と、前記厚い絶縁
層上で走査線上と信号線上とに格子状の対向電極と、前
記開口部を含んで走査線と信号線の端子電極とを1層以
上の第3の金属層で形成する工程とを含むことを特徴と
するものである。
According to a second aspect of the present invention, there is provided a method for forming a scanning line serving also as a gate of an insulated gate type transistor comprising at least one first metal layer on a transparent insulating substrate; A step of forming a gate insulating layer, a semiconductor layer serving as a channel, and a semiconductor layer containing impurities serving as sources and drains; and forming a signal (source) line and a drain electrode formed of one or more second metal layers. Forming a thick transparent insulating layer on the entire surface, forming an opening in the thick transparent insulating layer on the position where the scanning and signal line terminal electrodes are formed, and forming an insulating layer in the opening on the scanning line. Removing and selectively exposing the scanning lines, grid-like counter electrodes on the scanning lines and the signal lines on the thick insulating layer, and terminal electrodes of the scanning lines and the signal lines including the openings. To one or more third metal layers Is characterized in that a step of forming.

【0023】このように対向電極を厚い透明絶縁層を介
して走査線を信号線上とに格子状に配置することによ
り、対向電極の行方向への液晶セルの充放電電流の集中
を回避できるので、対向電極を細くすることができ、開
口率を向上できる。また、絵素電極と対向電極との間の
表示に寄与する領域が拡大されてさらに開口率を向上で
きる。また透明絶縁層への開口部形成を合理化できるた
め、従来の製造方法に比較して製造工程が長くなる欠点
を補える。
By arranging the scanning electrodes on the signal lines and the signal lines in a grid pattern through the thick transparent insulating layer as described above, concentration of the charge / discharge current of the liquid crystal cell in the row direction of the counter electrodes can be avoided. In addition, the counter electrode can be made thinner, and the aperture ratio can be improved. Further, the area between the picture element electrode and the counter electrode which contributes to the display is enlarged, and the aperture ratio can be further improved. Further, since the formation of the opening in the transparent insulating layer can be rationalized, it is possible to compensate for the disadvantage that the manufacturing process is longer than in the conventional manufacturing method.

【0024】以下本発明の実施形態について図1〜図4
を参照しながら説明する。なお、便宜上従来例と同一ま
たは相当する部位には同じ符号を付与する。 (実施の形態)図1は本発明の実施形態によるアクティ
ブ基板の単位絵素の平面配置図、図2、図3はその製造
工程図であり、図2(a)〜(c)、図3(a),
(b)は図1のB−B’線上の断面図、図3(c)は図
1のC−C’線上の断面図を示す。本発明による液晶画
像表示装置用半導体装置は、従来とほぼ同一の製造工程
を経て作製されるが、製造工程が増加しないよう一部製
造工程が合理化されており、図2、図3に示した図1の
B−B’線上の断面図を参照しながら製造工程の詳細に
ついて記述する。
Hereinafter, an embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. For the sake of convenience, the same reference numerals are given to the same or corresponding parts as in the conventional example. (Embodiment) FIG. 1 is a plan view of a unit picture element of an active substrate according to an embodiment of the present invention, and FIGS. 2 and 3 are manufacturing process diagrams thereof, which are shown in FIGS. (A),
FIG. 3B is a cross-sectional view taken along line BB ′ of FIG. 1, and FIG. 3C is a cross-sectional view taken along line CC ′ of FIG. Although the semiconductor device for a liquid crystal image display device according to the present invention is manufactured through substantially the same manufacturing process as the conventional one, a part of the manufacturing process is rationalized so that the number of manufacturing processes is not increased. The details of the manufacturing process will be described with reference to the cross-sectional view taken along the line BB 'of FIG.

【0025】先ず、図2(a)に示したようにガラス基
板2の一主面上に、例えばSPTなどの真空製膜装置を
用いて膜厚 0.2 μm程度の第1の金属層例えば、C
r薄膜を被着し微細加工技術により走査線も兼ねるゲー
ト電極8と蓄積電極20とを選択的に形成する。
First, as shown in FIG. 2A, a first metal layer having a thickness of about 0.2 μm, for example, C, is formed on one main surface of the glass substrate 2 by using a vacuum film forming apparatus such as SPT.
A gate electrode 8 and a storage electrode 20 which also serve as scanning lines are selectively formed by depositing an r thin film and using a fine processing technique.

【0026】次に、図2(b)に示したようにガラス基
板2の全面にPCVD装置を用いてゲート絶縁層となる
第1のシリコン窒化層(SiNx)13、不純物をほと
んど含まず絶縁ゲート型トランジスタのチャネルとなる
第1の非晶質シリコン層(a−Si)14および第2の
シリコン窒化層15の3種類の薄膜層を、例えば膜厚0.
3-0.05-0.1 μmで順次被着し、微細加工技術によりゲ
ート電極8上の第2のシリコン窒化層を選択的に残して
15’とし、第1の非晶質シリコン層14を露出する。
Next, as shown in FIG. 2B, a first silicon nitride layer (SiNx) 13 serving as a gate insulating layer is formed on the entire surface of the glass substrate 2 by using a PCVD apparatus, The three types of thin film layers, i.e., a first amorphous silicon layer (a-Si) 14 and a second silicon nitride layer 15 which are to be channels of a type transistor, are formed to a thickness of, for example, 0.5.
The first amorphous silicon layer 14 is exposed by 3-0.05-0.1 μm, and the second amorphous silicon nitride layer on the gate electrode 8 is selectively left at 15 ′ by a fine processing technique.

【0027】次に、図2(c)に示したように同じくP
CVD装置を用いて全面に不純物として、例えば燐を含
む第2の非晶質シリコン層16を例えば 0.05 μmの
膜厚で被着する。ここまでは、従来例と全く同一の製造
工程である。
Next, as shown in FIG.
Using a CVD apparatus, a second amorphous silicon layer 16 containing, for example, phosphorus as an impurity is deposited on the entire surface with a thickness of, for example, 0.05 μm. Up to this point, the manufacturing process is exactly the same as the conventional example.

【0028】次なる工程では従来例と異なり、信号線と
ドレイン電極の形成がなされる。そのためには図3
(a)に示したように、SPTなどの真空製膜装置を用
いて膜厚0.3 μm程度の第2の金属層として例えばA
L薄膜を被着し、微細加工技術により信号線(ソース配
線)7とドレイン電極17とを選択的に形成する。この
時には、AL薄膜および前記電極を形成するために用い
られた感光性樹脂パターンをマスクとして第2と第1の
非晶質シリコン層16,14をも除去して第1のシリコ
ン窒化層13を露出させる。
In the next step, unlike the conventional example, a signal line and a drain electrode are formed. Figure 3
As shown in (a), a second metal layer having a film thickness of about 0.3 μm is formed using a vacuum film forming apparatus such as SPT.
An L thin film is deposited, and a signal line (source wiring) 7 and a drain electrode 17 are selectively formed by a fine processing technique. At this time, the second and first amorphous silicon layers 16 and 14 are also removed by using the photosensitive resin pattern used for forming the AL thin film and the electrodes as a mask to remove the first silicon nitride layer 13. Expose.

【0029】なお、第2の金属層を1層以上とする理由
は、ひとつには薄膜トランジスタの耐熱性を高めるため
にバリア金属層を介在させる結果、信号線の低抵抗のた
めにはバリア金属層+Al層で2層構成になることが挙
げられる。ふたつには図4(b)にも示したように開口
部23内で露出している信号線7の表面が、ゲート絶縁
層13の除去時に不要な反応で除去または変質されない
ように適当な金属でカバーする結果、信号線7としては
バリア金属層+Al層+適当な金属層という3層構成に
なりうるからである。
The reason why the number of the second metal layers is one or more is that a barrier metal layer is interposed for improving the heat resistance of the thin film transistor. The + Al layer may have a two-layer structure. In two cases, as shown in FIG. 4B, the surface of the signal line 7 exposed in the opening 23 is made of an appropriate metal so that the surface of the signal line 7 is not removed or deteriorated by an unnecessary reaction when the gate insulating layer 13 is removed. As a result, the signal line 7 can have a three-layer structure of a barrier metal layer + an Al layer + a suitable metal layer.

【0030】そして図3(b)と図4(a),(b)に
示したように全面に透明性の高い絶縁層21を厚く、例
えば2〜3μm程度被着し、画像表示部外の領域で走査
線8と信号線7の端子電極を形成する位置に開口部2
2,23を形成して信号線7を一部露出する。この時に
透明絶縁層21に感光性(例えば日本合成ゴム製の商品
名オプトマー:PC302)のものを用いれば写真食刻
工程の合理化が出来ることは言うまでもない。さらに開
口部22内のゲート絶縁層13を選択的に除去して走査
線8を部分的に露出した後、第3の金属層として例えば
膜厚 0.3 μm程度のAL薄膜を被着し、微細加工技
術により開口部22,23を含んで走査線8の端子電極
24と信号線7の端子電極5と、走査線8上と信号線7
上とに格子状の対向電極11’を形成して本発明の実施
形態による画像表示装置用半導体装置が完成する。
Then, as shown in FIGS. 3B, 4A and 4B, a highly transparent insulating layer 21 having a thickness of, for example, about 2 to 3 μm is applied to the entire surface, and The opening 2 is formed at a position where the terminal electrodes of the scanning line 8 and the signal line 7 are formed in the region.
2 and 23 are formed to partially expose the signal line 7. At this time, it is needless to say that the photo-etching process can be rationalized by using a photosensitive (for example, product name: Optmer: PC302 made by Japan Synthetic Rubber) for the transparent insulating layer 21. Further, after selectively removing the gate insulating layer 13 in the opening 22 to partially expose the scanning line 8, an AL thin film having a thickness of, for example, about 0.3 μm is deposited as a third metal layer, The terminal electrodes 24 of the scanning lines 8 and the terminal electrodes 5 of the signal lines 7, including the openings 22 and 23,
A grid-like counter electrode 11 'is formed on the upper side and the semiconductor device for an image display device according to the embodiment of the present invention is completed.

【0031】図4は画像表示部外に形成される端子電極
の平面図とそのD−D’,E−E’線上の断面図を示し
たもので、図4(a)は走査線8側の端子電極24、図
4(b)は信号線7側の端子電極5に対応している。
FIG. 4 shows a plan view of a terminal electrode formed outside the image display section and a cross-sectional view thereof along the line DD ′ and EE ′. FIG. 4 (b) corresponds to the terminal electrode 5 on the signal line 7 side.

【0032】なお、絶縁層21をこのように厚く被着す
る必然性は、対向電極11’が絶縁層21を介して走査
線8や信号線7と形成する静電容量を無視できるだけ小
さくしたいためで、なぜならこれらの静電容量は全て走
査線8や信号線7の負荷容量を増大させて、結局は駆動
回路の消費電力を増大させるからである。ちなみに一般
的なシリコン窒化層を用いてこのように厚い膜厚の絶縁
層を形成することは、製膜に要する時間、膜内部に発生
する内部応力などの観点からは実用に耐えられず、上記
したように塗布・硬化型の樹脂が最適と思われる。
The reason why the insulating layer 21 is so thickly applied is that the capacitance formed by the counter electrode 11 ′ with the scanning line 8 and the signal line 7 via the insulating layer 21 is to be minimized. This is because these capacitances all increase the load capacitance of the scanning lines 8 and the signal lines 7 and eventually increase the power consumption of the driving circuit. By the way, using a general silicon nitride layer to form such a thick insulating layer is not practical in terms of the time required for film formation, internal stress generated inside the film, etc. As described above, a coating / curing type resin seems to be optimal.

【0033】対向電極11’の形成に当たり、絶縁ゲー
ト型トランジスタ9上にも対向電極11’を延長して形
成すると光シールド機能が付与されることは言うまでも
ないだろう。また対向電極11’を反射率の低い金属、
例えばCr,Ti,Moなどで形成または積層化すると
これらの電極からの反射光が低減して表示画像のコント
ラスト比が向上することも明かであり、従来のカラーフ
ィルタで用いられたBM(ブラック・マトリス)機能を
アクティブ基板2上に形成することも可能となる。
It goes without saying that, when the counter electrode 11 'is formed on the insulated gate transistor 9 by extending the counter electrode 11', a light shielding function is provided. The opposite electrode 11 'is made of a metal having a low reflectance.
For example, it is also clear that when formed or laminated with Cr, Ti, Mo, or the like, the reflected light from these electrodes is reduced and the contrast ratio of the displayed image is improved. It is also possible to form a matrices function on the active substrate 2.

【0034】従来の製造方法では、ゲート絶縁層である
第1のシリコン窒化層13に開口部を形成して走査線の
端子電極を形成するとともに、パシベーション絶縁層で
ある第3のシリコン窒化層18に開口部を形成して走査
線と信号線の端子電極を露出させていた。すなわち2回
の開口部形成工程が必要であったが、本発明の実施形態
による製造方法では製造工程の増加を回避するため、走
査線8への端子電極24の形成に当たり、厚い透明絶縁
層21に形成された開口部22を形成し、開口部22内
のゲート絶縁層である第1のシリコン窒化層13を除去
してから第3の金属層で走査線8の端子電極24と信号
線7の端子電極5とを形成することにより、絶縁層への
開口部形成は1回で済ませることが可能である。
In the conventional manufacturing method, an opening is formed in the first silicon nitride layer 13 as a gate insulating layer to form a terminal electrode of a scanning line, and the third silicon nitride layer 18 as a passivation insulating layer is formed. An opening is formed in the substrate to expose terminal electrodes of the scanning line and the signal line. That is, two opening forming steps are required. However, in the manufacturing method according to the embodiment of the present invention, in order to avoid an increase in the number of manufacturing steps, when forming the terminal electrode 24 on the scanning line 8, the thick transparent insulating layer 21 After the first silicon nitride layer 13 as the gate insulating layer in the opening 22 is removed, the terminal electrode 24 of the scanning line 8 and the signal line 7 are formed with the third metal layer. By forming the terminal electrode 5 described above, it is possible to form the opening in the insulating layer only once.

【0035】なお、図4において詳細は省略するが、走
査線8の端子電極24と信号線7の端子電極5とを独立
させず細いパターン25で接続しておけば、走査線8と
信号線7とが短絡されるので、液晶セル化工程での静電
気対策となることは言うまでもないだろう。
Although the details are omitted in FIG. 4, if the terminal electrode 24 of the scanning line 8 and the terminal electrode 5 of the signal line 7 are connected by a thin pattern 25 without being independent, the scanning line 8 and the signal line 7 is short-circuited, so it goes without saying that it is a countermeasure against static electricity in the liquid crystal cell forming process.

【0036】[0036]

【発明の効果】以上説明したように、本発明によるIP
S型の液晶画像表示装置においては、対向電極の行方向
への液晶セルの充放電電流の集中を回避するため、対向
電極を厚い絶縁層を介して走査線と信号線上とに格子状
に形成している。このため、液晶セルの充放電電流は周
囲方向に分散して対向電極の抵抗値は著しく低下したの
と等価の効果があり、単位絵素間で対向電極を接続する
対向電極のパターン幅を細くすることができて開口率が
向上する。
As described above, the IP according to the present invention is
In an S-type liquid crystal image display device, in order to avoid concentration of charging / discharging current of a liquid crystal cell in a row direction of a counter electrode, the counter electrode is formed in a grid pattern on a scanning line and a signal line via a thick insulating layer. doing. For this reason, the charge / discharge current of the liquid crystal cell is dispersed in the peripheral direction, which has an effect equivalent to a significant decrease in the resistance value of the counter electrode, and the pattern width of the counter electrode connecting the counter electrode between unit picture elements is reduced. The aperture ratio can be improved.

【0037】また、厚い絶縁層を介して対向電極を走査
線上と信号線上とに配置することで絵素電極と対向電極
との間の表示に寄与する領域が拡大され、やはり開口率
が向上する。
Further, by arranging the counter electrode on the scanning line and the signal line via the thick insulating layer, a region contributing to display between the picture element electrode and the counter electrode is enlarged, and the aperture ratio is also improved. .

【0038】加えて、厚い絶縁層に平坦性が付加される
と、厚く平坦な絶縁層上に対向電極が存在するため、配
向膜の配向処理が均一化され易くコントラスト比が向上
する効果も期待できる。
In addition, when flatness is added to the thick insulating layer, the counter electrode is present on the thick and flat insulating layer, so that the alignment treatment of the alignment film is easily uniformized and the effect of improving the contrast ratio is expected. it can.

【0039】金属よりなる対向電極を付加するため、従
来の製造方法に比較して製造工程が長くなる欠点は絶縁
層への開口部形成を合理化することで補われており、工
業的にも価値のある発明と言える。
The disadvantage that the production process is longer than that of the conventional production method due to the addition of the counter electrode made of metal has been compensated for by rationalizing the formation of the opening in the insulating layer, and is of industrial value. It can be said that there is a certain invention.

【0040】以上の説明からも明らかなように、厚い絶
縁層の導入に関わるデバイス構造と製造方法が発明の主
眼点であり、配線材料の差異は何等本発明の制約を受け
ず、走査線や信号線の材料や構成あるいは積層化に関し
ても、また蓄積容量の有無や構成に関しても全く同様に
本発明の制約を受けないことは明白であろう。
As is clear from the above description, the device structure and the manufacturing method related to the introduction of the thick insulating layer are the main points of the present invention. It will be apparent that the present invention is not limited to the material and configuration or the lamination of the signal lines, nor to the existence or configuration of the storage capacitor.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態によるアクティブ基板の単位
絵素の平面図
FIG. 1 is a plan view of a unit pixel of an active substrate according to an embodiment of the present invention.

【図2】本発明の実施形態による製造工程断面図で、図
1のB−B’線上の断面図
FIG. 2 is a cross-sectional view illustrating a manufacturing process according to the embodiment of the present invention, which is a cross-sectional view taken along line BB ′ of FIG. 1;

【図3】図2に続く製造工程断面図で、図1のB−B’
およびC−C’線上の断面図
FIG. 3 is a cross-sectional view of the manufacturing process following FIG. 2;
And a cross-sectional view along the line CC ′

【図4】本発明の実施形態によるアクティブ基板の端子
電極部の平面図および断面図
FIG. 4 is a plan view and a sectional view of a terminal electrode portion of an active substrate according to an embodiment of the present invention.

【図5】液晶パネルの斜視図FIG. 5 is a perspective view of a liquid crystal panel.

【図6】アクティブ型液晶画像表示装置の等価回路図FIG. 6 is an equivalent circuit diagram of an active liquid crystal image display device.

【図7】従来方式のTN液晶セルの視野角依存性を説明
する概念図
FIG. 7 is a conceptual diagram illustrating the viewing angle dependence of a conventional TN liquid crystal cell.

【図8】IPS方式のTN液晶セルの視野角依存性を説
明する基本原理図
FIG. 8 is a basic principle diagram for explaining the viewing angle dependence of an IPS type TN liquid crystal cell.

【図9】従来のIPS方式によるアクティブ基板の単位
絵素の平面図
FIG. 9 is a plan view of a unit pixel of an active substrate according to a conventional IPS method.

【図10】図9のA−A’線上の工程断面図FIG. 10 is a sectional view taken along the line A-A ′ of FIG. 9;

【符号の説明】[Explanation of symbols]

1 液晶パネル 2 (アクティブ)ガラス基板 3 半導体チップ 4 フィルムキャリア 5 信号線の端子電極 6 対向ガラス基板(カラーフィルタ) 7 信号線(ソース配線) 8 走査線(ゲート電極) 9 絶縁ゲート型トランジスタ 10 液晶セル 11,11’ 対向電極 12 液晶セル 13 第1のシリコン窒化層(ゲート絶縁層) 14 第1の非晶質シリコン層 15 第2のシリコン窒化層(エッチング・ストッパ) 16 (不純物を含む)第2の非晶質シリコン層 17,17’ ドレイン(絵素)電極 18 第3のシリコン窒化層(パシベーション絶縁層) 20 蓄積電極 21 厚い透明絶縁層 22 走査線への接続のための開口部 23 信号線への接続のための開口部 24 走査線の端子電極 25 静電気対策の短絡線 DESCRIPTION OF SYMBOLS 1 Liquid crystal panel 2 (Active) glass substrate 3 Semiconductor chip 4 Film carrier 5 Terminal electrode of signal line 6 Opposite glass substrate (color filter) 7 Signal line (source wiring) 8 Scanning line (gate electrode) 9 Insulated gate transistor 10 Liquid crystal Cell 11, 11 'Counter electrode 12 Liquid crystal cell 13 First silicon nitride layer (gate insulating layer) 14 First amorphous silicon layer 15 Second silicon nitride layer (etching stopper) 16 (including impurities) 2 amorphous silicon layer 17, 17 'drain (picture element) electrode 18 third silicon nitride layer (passivation insulating layer) 20 storage electrode 21 thick transparent insulating layer 22 opening for connection to scanning line 23 signal Opening for connection to line 24 Terminal electrode of scanning line 25 Short-circuit line for countermeasures against static electricity

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 一主面上に絶縁ゲート型トランジスタ
と、前記絶縁ゲート型トランジスタのドレインに接続さ
れた絵素電極と、前記絵素電極とは所定の距離を隔てて
形成された対向電極とを少なくとも各々1個は有する単
位絵素が二次元のマトリクスに配列された第1の透明性
絶縁基板と、第2の透明性絶縁基板またはカラーフィル
タとの間に液晶を充填してなる液晶画像表示装置におい
て、前記第1の透明性絶縁基板上に形成された厚い透明
絶縁層を介して前記走査線上と前記信号線上とに格子状
の対向電極が形成されるとともに、走査線と信号線の端
子電極形成位置上の前記厚い透明絶縁層に形成された開
口部を含んで走査線と信号線の端子電極が前記対向電極
と同一工程で形成されてなることを特徴とする液晶画像
表示装置。
1. An insulated gate transistor on one main surface, a pixel electrode connected to a drain of the insulated gate transistor, and a counter electrode formed at a predetermined distance from the pixel electrode. A liquid crystal image formed by filling a liquid crystal between a first transparent insulating substrate in which unit picture elements each having at least one of them is arranged in a two-dimensional matrix and a second transparent insulating substrate or a color filter In the display device, a grid-like counter electrode is formed on the scanning line and the signal line via a thick transparent insulating layer formed on the first transparent insulating substrate, and the scanning line and the signal line are separated. A liquid crystal image display device, wherein terminal electrodes for a scanning line and a signal line are formed in the same step as the counter electrode, including an opening formed in the thick transparent insulating layer on a terminal electrode forming position.
【請求項2】 透明性絶縁基板上に、1層以上の第1の
金属層よりなる絶縁ゲート型トランジスタのゲートを兼
ねる走査線を形成する工程と、少なくともゲート絶縁層
とチャネルとなる半導体層とソース・ドレインとなる不
純物を含む半導体層とを形成する工程と、1層以上の第
2の金属層よりなる信号(ソース)線とドレイン電極と
を形成する工程と、全面に厚い透明絶縁層を形成する工
程と、走査線と信号線の端子電極形成位置上の前記厚い
透明絶縁層に開口部を形成する工程と、前記走査線上の
開口部内の絶縁層を除去して走査線を選択的に露出する
工程と、前記厚い絶縁層上で走査線上と信号線上とに格
子状の対向電極と、前記開口部を含んで走査線と信号線
の端子電極とを1層以上の第3の金属層で形成する工程
とを含む画像表示用半導体装置の製造方法。
2. A step of forming a scanning line also serving as a gate of an insulated gate transistor including at least one first metal layer on a transparent insulating substrate, and forming at least a gate insulating layer and a semiconductor layer serving as a channel. A step of forming a semiconductor layer containing impurities serving as a source and a drain, a step of forming a signal (source) line and a drain electrode made of one or more second metal layers, and a step of forming a thick transparent insulating layer over the entire surface. Forming, forming an opening in the thick transparent insulating layer on the position where the scanning and signal line terminal electrodes are formed, and selectively removing the insulating layer in the opening on the scanning line to select the scanning line. An exposing step, a grid-like counter electrode on the scanning line and the signal line on the thick insulating layer, and one or more third metal layers including a scanning line and a terminal electrode of the signal line including the opening. For image display including the step of forming with A method for manufacturing a semiconductor device.
JP15144997A 1997-06-10 1997-06-10 Liquid crystal image display device and its manufacture Pending JPH112828A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15144997A JPH112828A (en) 1997-06-10 1997-06-10 Liquid crystal image display device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15144997A JPH112828A (en) 1997-06-10 1997-06-10 Liquid crystal image display device and its manufacture

Publications (1)

Publication Number Publication Date
JPH112828A true JPH112828A (en) 1999-01-06

Family

ID=15518845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15144997A Pending JPH112828A (en) 1997-06-10 1997-06-10 Liquid crystal image display device and its manufacture

Country Status (1)

Country Link
JP (1) JPH112828A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001194685A (en) * 2000-01-06 2001-07-19 Hitachi Ltd Liquid crystal display device
KR100804345B1 (en) * 2001-09-28 2008-02-15 샤프 가부시키가이샤 Substrate for liquid crystal display device and liquid crystal display device using the same
JP2009151094A (en) * 2007-12-20 2009-07-09 Ips Alpha Technology Ltd Display device
JP2010085998A (en) * 1998-12-31 2010-04-15 Samsung Electronics Co Ltd Thin film transistor substrate for liquid crystal display device and manufacturing method thereof
CN101806982A (en) * 2009-02-16 2010-08-18 Nec液晶技术株式会社 The electronic installation and the manufacture method thereof of liquid crystal display device and this device of use
US8451395B2 (en) 2009-01-23 2013-05-28 Mitsubishi Electric Corporation Thin-film transistor array substrate, method of manufacturing the same, and liquid crystal display device
KR20140118876A (en) * 2013-03-29 2014-10-08 가부시키가이샤 재팬 디스프레이 Liquid crystal display device and electronic apparatus

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010085998A (en) * 1998-12-31 2010-04-15 Samsung Electronics Co Ltd Thin film transistor substrate for liquid crystal display device and manufacturing method thereof
JP2001194685A (en) * 2000-01-06 2001-07-19 Hitachi Ltd Liquid crystal display device
KR100804345B1 (en) * 2001-09-28 2008-02-15 샤프 가부시키가이샤 Substrate for liquid crystal display device and liquid crystal display device using the same
JP2009151094A (en) * 2007-12-20 2009-07-09 Ips Alpha Technology Ltd Display device
US8451395B2 (en) 2009-01-23 2013-05-28 Mitsubishi Electric Corporation Thin-film transistor array substrate, method of manufacturing the same, and liquid crystal display device
CN101806982A (en) * 2009-02-16 2010-08-18 Nec液晶技术株式会社 The electronic installation and the manufacture method thereof of liquid crystal display device and this device of use
US8427620B2 (en) 2009-02-16 2013-04-23 Nlt Technologies, Ltd. Liquid crystal display device and electronic apparatus using the same and manufacturing method thereof
US20130182208A1 (en) * 2009-02-16 2013-07-18 Nec Lcd Technologies, Ltd. Liquid crystal display device and electronic apparatus using the same
US8941803B2 (en) 2009-02-16 2015-01-27 Nlt Technologies, Ltd. Liquid crystal display device and electronic apparatus using the same
KR20140118876A (en) * 2013-03-29 2014-10-08 가부시키가이샤 재팬 디스프레이 Liquid crystal display device and electronic apparatus

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