JPH11260751A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it applicable to a MOS device intended for a high speed operation or power device intended for a high current switching, by contg. a gas in specified depth region in a single crystal semiconductor substrate. SOLUTION: A gap 202 is formed in specified section of a single crystal Si 201 at specified depth and opens at a side face of the single crystal Si 201, the opening thereof has an open shape communicating with both side faces of a substrate at least after cutting every chip, a cooling medium e.g. He, ammonia or freon gas is filled and circulated in the gap 202. This makes a very efficient heat radiation possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a substrate having a single-crystal silicon-insulator structure and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a single crystal silicon-insulator substrate (S
ilicon-On-Insulator, SOI
As a manufacturing method, a single-crystal silicon thin film is bonded to a quartz substrate, or oxygen ions are implanted into the single-crystal silicon substrate, and then a quartz region is formed in the single-crystal silicon substrate by annealing. A method for forming the layer has been known.

FIGS. 9A to 9C are cross-sectional views showing an example of a conventional method for manufacturing a semiconductor device. In this example, a method is shown in which oxygen ions are implanted into a single crystal silicon substrate and then a quartz region is formed in the single crystal silicon substrate by annealing.

FIG. 9A shows a single crystal silicon substrate 901.
In this step, oxygen ions 902 are implanted using an ion implantation apparatus.

FIG. 9B is a view showing a silicon region 903 implanted with oxygen ions, which is formed by the above-described process.

By the above-described ion implantation step, a silicon region 903 having a peak at a predetermined depth in the single-crystal silicon substrate 901 and implanted with oxygen ions having a distribution in the depth region before and after the peak is formed. The distribution in the depth direction of the concentration of oxygen ions in the silicon region 903 into which oxygen ions have been implanted is shown in the figure as a graph.

FIG. 9C shows that the semiconductor device obtained in the above-described process is subjected to a thermal process, and the oxygen ions in the silicon region 903 into which the oxygen ions have been implanted are reacted with silicon, which is a raw material of the substrate, to form silicon dioxide. To form a silicon dioxide thin film 90
4. Furthermore, in the heat process at this time,
The silicon on the surface side of the silicon dioxide thin film 904 is single-crystallized from an amorphous state, and the single-crystal silicon in that portion has the insulating silicon dioxide thin film 904 directly therebelow, so that it becomes a region where an SOI device can be formed.

[0008]

In these methods, the obtained single crystal silicon thin film is formed on a quartz substrate. Quartz has a thermal conductivity that is at least two orders of magnitude lower than that of single crystal silicon. Therefore, the temperature rise due to the power consumed inside is extremely large as compared with devices formed on a normal single-crystal silicon substrate, and MOS devices for high-speed operation and power devices for high-current switching In practice, there is a very large limitation.

In order to avoid this problem, a method of epitaxially growing single crystal silicon on sapphire having higher thermal conductivity than quartz has been known. However, sapphire substrates are extremely expensive per se, and those with large diameters are difficult to obtain.

In order to solve this problem, a method of epitaxially growing sapphire on a single-crystal silicon substrate and then epitaxially growing single-crystal silicon thereon has been proposed by the IEICE Technical Report SDM92-.
117, it is quite difficult to obtain a good single crystal because the lattice constants differ by 4% or more.

In view of the above, the present invention solves the above-mentioned conventional problems and provides a MOS device for high-speed operation,
It is an object of the present invention to provide a means for manufacturing an SOI substrate suitable for a power device for large current switching.

[0012]

In order to solve such a conventional problem, a semiconductor device according to the present invention is characterized in that it has a structure in which a gas is contained in a certain depth region in a single crystal semiconductor substrate. And

Alternatively, a structure may be used in which the gap is passed outside the substrate instead of the region containing the gas.

[0014]

FIG. 1 is a perspective view showing one embodiment of a semiconductor device according to the present invention.

In a specific section within a specific depth range of the single crystal silicon substrate 101, a space 102 containing helium gas is provided.
Are formed.

FIG. 2 is a perspective view showing one embodiment of a semiconductor device according to the present invention.

A void region 202 is formed in a specific section in a specific depth range of the single crystal silicon substrate 201. The void region 202 is open on the side surface of the single-crystal silicon substrate 201, and the opening is open at least on both sides of the substrate after cutting out for each chip.

FIGS. 3A to 3C are perspective views showing an example of a method of manufacturing the semiconductor device according to the present invention shown in FIG.

FIG. 3A shows a step of implanting helium ions into the single-crystal silicon substrate 301, which is partially masked by the resist 302, using an ion implantation apparatus.

FIG. 3B is a view showing the silicon region 303 implanted with helium ions, formed by the above-described process.

By the above-described ion implantation step, a silicon region 303 having a peak at a predetermined depth in the single crystal silicon substrate 301 and implanted with helium ions having a distribution in a depth region before and after the peak is formed. The distribution of helium ion concentration in the depth direction in the silicon region 301 into which helium ions have been implanted is shown in the figure as a graph.

FIG. 3C shows that after removing the resist 302 of the semiconductor device obtained in the above-described process, a heat process is performed to gasify the helium ions in the silicon region 303 into which the helium ions have been implanted, thereby forming a helium gas. This is a step of forming a void 304 having Further, in the heat step at this time, silicon on the surface side from the void 304 containing helium gas is monocrystallized from an amorphous state, and the single crystal silicon in that portion has the void 304 containing insulating helium gas immediately below. Thus, the region becomes where an SOI device can be formed.

FIGS. 4A to 4C are perspective views showing one example of a method of manufacturing the semiconductor device according to the present invention shown in FIG.

FIG. 4A shows a step of implanting helium ions into the single-crystal silicon substrate 401, which is partially masked by the resist 402, using an ion implantation apparatus.

FIG. 4B is a diagram showing the helium ion-implanted silicon region 403 formed by the above-described process.

By the above-described ion implantation step, a silicon region 403 having a peak at a predetermined depth in the single crystal silicon substrate 401 and implanted with helium ions having a distribution in the depth region before and after the peak is formed. The distribution of the concentration of helium ions in the silicon region 403 into which helium ions have been implanted in the depth direction is shown as a graph.

FIG. 4C shows that after removing the resist 402 of the semiconductor device obtained in the above-described process, a heat process is performed to gasify the helium ions in the silicon region 403 into which the helium ions have been implanted, thereby forming a void 404. Is a step of forming Further, in the heat step at this time, the silicon on the surface side from the gap 404 is monocrystallized from an amorphous state, and the single crystal silicon in that portion is immediately below the insulating gap 4.
Since the semiconductor device has the semiconductor device 04, it becomes a region where an SOI device can be formed.

FIGS. 5A to 5C are perspective views showing an example of a method for manufacturing the semiconductor device according to the present invention shown in FIG.

FIG. 5A shows a step of implanting fluorine ions into a single-crystal silicon substrate 501, which is partially masked by a resist 502, using an ion implantation apparatus.

FIG. 5B is a view showing the silicon region 503 in which fluorine ions have been implanted, formed by the above-described process.

By the above-described ion implantation step, a silicon region 503 having a peak at a predetermined depth in the single crystal silicon substrate 501 and implanted with fluorine ions having a distribution in the depth region before and after the peak is formed. The distribution of the concentration of fluorine ions in the silicon region 503 into which fluorine ions have been implanted in the depth direction is shown as a graph in the figure.

FIG. 5C shows that after removing the resist 502 of the semiconductor device obtained in the above-described process, a heat process is performed, and the fluorine ions in the silicon region 503 implanted with the fluorine ions react with the single crystal silicon. This is a step of forming a void 504 by gasification. Further, in the heat step at this time, silicon on the surface side from the gap 504 is single-crystallized from an amorphous state, and the single-crystal silicon in that portion has an insulating gap 504 immediately below, so that an SOI device can be formed. Area.

The voids thus obtained are characterized in that extremely efficient heat radiation can be achieved by circulating the voids with a cooling medium, for example, helium gas, ammonia gas, freon gas or the like. .

FIGS. 6A to 6C are perspective views showing an example of a method of manufacturing the semiconductor device according to the present invention shown in FIG.

FIG. 6A shows a step of implanting helium ions into a single-crystal silicon substrate 601 having a partial section masked by a resist 602 using an ion implantation apparatus.

FIG. 6B is a view showing the silicon region 603 implanted with helium ions, formed by the above-described process.

By the above-described ion implantation process, a silicon region 603 having a peak at a predetermined depth in the single-crystal silicon substrate 601 and implanted with helium ions having a distribution in a depth region before and after the peak is formed. The distribution of the concentration of helium ions in the silicon region 601 into which helium ions have been implanted in the depth direction is shown as a graph in the figure.

FIG. 6C shows that after removing the resist 602 of the semiconductor device obtained in the above-described process, a heat process is performed to gasify the helium ions in the silicon region 603 into which the helium ions have been implanted, thereby forming a helium gas. This is a step of forming a void 604 having Further, in a heat step of forming the epitaxial silicon layer 605, silicon on the surface side from the space 604 containing helium gas is monocrystallized from an amorphous state, and the single crystal silicon in that portion is formed by insulative helium gas immediately below. The presence of the void 604 makes it possible to form an SOI device.

FIGS. 7A to 7C are perspective views showing an example of a method for manufacturing the semiconductor device according to the present invention shown in FIG.

FIG. 7A shows a step of implanting helium ions into the single-crystal silicon substrate 701, which is partially masked by the resist 702, using an ion implantation apparatus.

FIG. 7B is a view showing the silicon region 703 implanted with helium ions, formed by the above-described process.

By the above-described ion implantation step, a silicon region 703 having a peak at a predetermined depth in the single crystal silicon substrate 701 and implanted with helium ions having a distribution in a depth region before and after the peak is formed. The distribution of the concentration of helium ions in the silicon region 703 into which helium ions have been implanted in the depth direction is shown as a graph.

FIG. 7C shows that after removing the resist 702 of the semiconductor device obtained in the above-described process, a heat process is performed to gasify the helium ions in the silicon region 703 into which the helium ions have been implanted, thereby forming a void 704. Is a step of forming Further, in a heat step of forming the epitaxial silicon layer 705, silicon on the surface side from the gap 704 is monocrystallized from an amorphous state, and the single crystal silicon in that portion has an insulating gap 704 immediately below. This is an area where an SOI device can be formed.

FIGS. 8A to 8C are perspective views showing an example of a method of manufacturing the semiconductor device according to the present invention shown in FIG.

FIG. 8A shows a step of implanting fluorine ions into a single crystal silicon substrate 801 of which a part is masked by a resist 802, using an ion implantation apparatus.

FIG. 8B is a diagram showing the silicon region 803 implanted with fluorine ions, which is formed by the above-described process.

By the above-described ion implantation step, a silicon region 803 having a peak at a predetermined depth in the single crystal silicon substrate 801 and implanted with fluorine ions having a distribution in a depth region before and after the peak is formed. The distribution of the concentration of fluorine ions in the silicon region 803 into which fluorine ions have been implanted in the depth direction is shown as a graph in the figure.

FIG. 8 (c) shows that after removing the resist 802 of the semiconductor device obtained in the above-described process, a heat process is performed to cause fluorine ions in the silicon region 803 into which fluorine ions have been implanted to react with silicon. Gasification and void 80
4. Further, in a thermal step of forming the epitaxial silicon layer 805, silicon on the surface side from the gap 804 is monocrystallized from an amorphous state, and the single crystal silicon in that portion is directly below the insulating gap 8
Since the semiconductor device has the semiconductor device 04, it becomes a region where an SOI device can be formed.

The voids thus obtained are characterized in that extremely efficient heat radiation can be achieved by circulating the voids with a cooling medium such as helium gas, ammonia gas, freon gas or the like. This is the same as in the previous embodiment.

In the embodiment of the present invention, helium is used as a raw material as an implanted ion to be a gas for filling the void. However, other elements such as hydrogen, nitrogen, neon, argon, krypton, xenon, and radon are used. Obviously, the same effect can be obtained even when used, and they are also included in the category of the present invention.

Similarly, in the present invention, fluorine is used as an implanted ion which forms a void by reacting with silicon and gasifying it. However, the same effect can be obtained by using another element such as chlorine or germanium. Obviously.
When germanium is used, it is applied that germanium oxide obtained by oxidation can be easily sublimated at around 1000 degrees.

Furthermore, although single crystal silicon was used as a substrate material as a representative, other semiconductor materials, germanium,
It should be added that even if gallium arsenide, indium arsenide, indium phosphide, gallium aluminum arsenide or the like is used, the effect is not changed at all.

The surface of the SOI substrate thus formed has a wavy shape under the influence of a void hidden under the water surface, but can be easily planarized by using a chemical mechanical polishing method (CMP method) or the like. Therefore, even if there is a need, it can be dealt with.

Further, even when the depth of ion implantation cannot be made so large, there is a feature that a single crystal thin film having a desired thickness can be formed by performing epitaxial growth after forming a void.

Further, in the wiring formed on this structure, a gas having a lower dielectric constant than silicon dioxide is used as the insulating layer of the SOI structure, so that the wiring parasitic capacitance is remarkably reduced and higher frequency propagation becomes possible. There is also a feature.

[0056]

By using the semiconductor device according to the present invention, the problem of heat dissipation, which has been a problem in the conventional SOI substrate, has been drastically solved. Furthermore, since the parasitic capacitance is smaller than that of the conventional SOI structure, higher-speed elements and wiring can be realized.

[Brief description of the drawings]

FIG. 1 is a perspective view showing one embodiment of a semiconductor device according to the present invention.

FIG. 2 is a perspective view showing one embodiment of a semiconductor device according to the present invention.

FIG. 3 is a perspective view showing one example of a method for manufacturing the semiconductor device according to the present invention shown in FIG. 1;

FIG. 4 is a perspective view showing one example of a method for manufacturing the semiconductor device according to the present invention shown in FIG. 2;

FIG. 5 is a perspective view showing one example of a method for manufacturing the semiconductor device according to the present invention shown in FIG. 2;

6 is a perspective view showing one example of a method for manufacturing the semiconductor device according to the present invention shown in FIG. 1;

FIG. 7 is a perspective view showing an example of the method for manufacturing the semiconductor device according to the present invention shown in FIG. 2;

FIG. 8 is a perspective view showing an example of the method for manufacturing the semiconductor device according to the present invention shown in FIG. 2;

FIG. 9 is a sectional view showing an example of a method for manufacturing a semiconductor device according to a conventional technique.

[Explanation of symbols]

 Reference Signs List 101 single-crystal silicon substrate 102 void having helium gas 201 single-crystal silicon substrate 202 void region 301 single-crystal silicon substrate 302 resist 303 silicon region implanted with helium ions 304 void having helium gas 401 single-crystal silicon substrate 402 resist 403 helium Ion-implanted silicon region 404 Void 501 Single-crystal silicon substrate 502 Resist 503 Fluorine ion-implanted silicon region 504 Void 601 Single-crystal silicon substrate 602 Resist 603 Helium ion-implanted silicon region 604 Void having helium gas 605 Epitaxial silicon layer 701 Single crystal silicon substrate 702 Resist 703 Silicon region implanted with helium ions 704 Void 705 Epitaxy Shall silicon layer 801 single crystal silicon substrate 802 resist 803 fluorine ions implanted silicon region 804 gap 805 epitaxial silicon layer 901 single crystal silicon substrate 902 oxygen ions 903 oxygen ion implanted silicon region 904 of silicon dioxide thin film

Claims (8)

[Claims] 1. A semiconductor device having a gas-containing void in a specific section at a specific depth of a single crystal silicon substrate. 2. The semiconductor device according to claim 1, wherein a specific section of the single crystal silicon substrate at a specific depth has a gap communicating with the outside of the substrate. 3. A step of introducing a gas-containing void in a specific section at a specific depth of a single-crystal silicon substrate using an ion implantation method, and applying the gas ion by heat application. 2. The method according to claim 1, further comprising the steps of: transforming silicon into gas molecules; and monocrystallizing silicon immediately above the gas. 4. A step of introducing the gas using an ion implantation method to form a void communicating with the outside of the single crystal silicon substrate in a specific section at a specific depth, and applying the gas by applying heat. 3. The method for manufacturing a semiconductor device according to claim 2, wherein a step of transforming gas ions into gas molecules and a step of single-crystallizing silicon immediately above the gas are used. 5. A material which reacts with silicon and is gasified is formed by ion implantation to form a void communicating with the outside of a single crystal silicon substrate in a specific section at a specific depth. 3. The method for manufacturing a semiconductor device according to claim 2, wherein a step of promoting the reaction by applying heat and a step of single-crystallizing silicon immediately above the region are used. 6. A step of introducing a gas-containing void in a specific section at a specific depth of a single-crystal silicon substrate using an ion implantation method, and applying the gas ion by applying heat. 2. The method according to claim 1, further comprising the steps of: transforming GaN into gas molecules; and performing epitaxial growth on silicon immediately above the gas. 7. A step of introducing the gas using an ion implantation method to form a void communicating with the outside of the single crystal silicon substrate in a specific section at a specific depth, and applying heat by applying heat. 3. The method according to claim 2, wherein a step of transforming gaseous ions into gaseous molecules and a step of performing epitaxial growth on silicon immediately above the region are used. 8. A material which reacts with silicon and is gasified is introduced by ion implantation to form a void communicating with the outside of the single crystal silicon substrate in a specific section at a specific depth at a specific depth. 3. The method for manufacturing a semiconductor device according to claim 2, wherein a step of promoting the reaction by applying heat and a step of performing epitaxial growth on silicon immediately above the region are used.