JPH11242460A - Plasma display panel driving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance a display characteristic by making voltages of scanning pulses different according to lines to be scanned to prevent an erroneous discharge. SOLUTION: In an address period, scanning pulses (selection write pulses) SPs are successively impressed on row electrodes Y1 to Yn. Pixel data pulses DP1 to DPn in accordance with pixel data of respective scanning lines are successively impressed on column electrodes D1 to Dm in synchronization with the impressing timings of the scanning pulses SPs. Voltages of the scanning pulses SPs are made different according to lines to be scanned. That is, voltage values of scanning pulses to be applied on row electrodes Y2 to Yn corresponding to lines to be scanned thereafter (for example, the second row and succeeding rows) are made larger as compared with the voltage value of the scanning pulse SP to be applied on the row electrode Y1 corresponding to a line to be scanned at first (for example, the first row).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for driving a plasma display panel (PDP).

[0002]

2. Description of the Related Art In recent years, as display devices have become larger, thinner display devices have been required, and various thin display devices have been provided. ACPDP is known as one of them. Pertaining A
The CPDP includes a column electrode (address electrode) and a row electrode (sustain electrode) that is orthogonal to the column electrode and constitutes one row (one scan line) in pairs. Each of the column electrode and row electrode pair is a discharge space. , A discharge cell (pixel) is formed at each intersection of the column electrode and the row electrode pair. The row electrode is composed of a transparent electrode and a bus electrode laminated on the transparent electrode.

FIG. 4 is a diagram showing the application timing of various drive pulses according to the selective write address method of the ACDP. In FIG. 4, first, a reset pulse RPx of a positive polarity is applied to all the row electrodes X (X1 to Xn), and at the same time, a reset pulse RPy of a negative polarity is applied to the row electrodes Y1 to Y.
n to discharge all the pixels simultaneously to form wall charges, and then apply an erasing pulse EP to the row electrode X.
Is applied to erase the wall charges and initialize all pixels (simultaneous reset period).

Next, a scanning pulse (selective writing pulse) S
P is sequentially applied to the row electrodes Y1 to Yn, and pixel data pulses DP1 to DPn corresponding to pixel data of each scanning line are sequentially generated in synchronization with the application timing of the scanning pulse SP.
It is applied to the column electrodes D1 to Dm. Pixel data pulse DP1
ＤＰDPn is the first column of each row (scan line), respectively.
It is composed of a plurality of pulses generated based on the corresponding pixel data of each of the m-th column. The pixel to which the pixel data pulse is applied in synchronization with the application of the scanning pulse SP is discharged to form a wall charge and becomes a lit pixel, while the pixel to which the pixel data pulse is not applied does not generate a discharge, so that a wall charge is formed. (Address period).

Next, a sustain pulse IPx and a sustain pulse IPy are applied alternately to the row electrodes X1 to Xn and the row electrodes Y1 to Yn simultaneously on all the lines. At this time, only the lighting pixels in which the wall charges are accumulated are sustained pulses IPx and IPx.
Each time y is applied, discharge light emission occurs (sustain discharge period).

Next, an erase pulse EP is applied to the row electrodes Y1 to Yn.
To eliminate the wall charges and initialize the wall charge state of all pixels (wall charge erasing period).

As described above, image display is performed by repeatedly performing the simultaneous reset period, the address period, the sustain discharge period, and the wall charge erasing period (main erasing period) as one display cycle.

[0008]

The time required for the address period is determined by the product of the time required to scan one line and the number of lines, and becomes longer as the panel size increases. Then, as the address period becomes longer, the number of priming particles (charged particles and excited particles existing in the discharge space) generated in the simultaneous reset period decreases. When the number of priming particles decreases as time elapses in the address period as described above, the selective discharge in the line scanned at the end is less likely to occur than the selective discharge in the line scanned first, and the address operation becomes unstable. Become.

The present invention has been made to solve the above problems, and has as its object to prevent erroneous discharge and improve display characteristics.

[0010]

According to the first aspect of the present invention,
A row electrode corresponding to a matrix display line and covered with a dielectric layer, and a column electrode arranged in a direction orthogonal to the row electrode and forming a pixel at each intersection portion, A reset period in which the wall charge state of the pixel is initialized at the same time, a scanning pulse is sequentially applied to row electrodes corresponding to a plurality of lines, and a pixel data pulse is applied to a column electrode to turn on and off pixels according to pixel data. A plasma display panel that performs display using a selected address period and a sustain discharge period for simultaneously applying a sustaining pulse to the row electrodes corresponding to all the lines selected in the address period to maintain the lighted and unlit pixels. In a driving method, a voltage value of a scan pulse is changed according to a line to be scanned.

According to a second aspect of the present invention, in the method for driving a plasma display panel according to the first aspect,
The voltage value of the scan pulse applied to the row electrode corresponding to the subsequently scanned line is increased compared to the voltage value of the scan pulse applied to the row electrode corresponding to the first scanned line in the address period It is characterized by the following.

[0012]

In the present invention, the voltage value of the scan pulse applied in the address period is made different depending on the line to be scanned, so that a stable selective discharge is performed even if the priming particles generated in the simultaneous reset period are reduced. be able to.

[0013]

Next, a preferred embodiment of the present invention will be described. FIG. 1 is a perspective view showing a structure of a surface discharge type PDP driven by a driving method of a plasma display panel according to the present invention. As shown in FIG.
On the inner surface of the glass substrate 1 on the display surface side of the pair of glass substrates 1 and 2 opposed to each other via the discharge space 7 of P11, a pair of row electrodes X and Y, , Y, and a protective layer 6 made of MgO that covers the dielectric layer 5. The row electrodes X and Y are each composed of a transparent electrode 4 made of a wide band-shaped transparent conductive film and a bus electrode (metal film) 3 made of a narrow band-shaped metal film laminated to supplement the conductivity. It is composed of

On the other hand, on the inner surface of the glass substrate 2 on the back side, a plurality of address electrodes A are arranged in a direction orthogonal to the row electrodes X and Y, and a stripe-shaped partition (rib) is provided between each address electrode A. ) 10 are provided, and the address electrodes A
To form a phosphor layer 8. A rare gas is injected and sealed in the discharge space 7.

Pixel cells (discharge cells) are formed around the intersections of the row electrodes X and Y and the address electrodes A, and a matrix display is possible.

Next, the PD according to the first embodiment of the present invention will be described.
A method of driving P will be described. FIG. 2 is a diagram showing an example of a driving waveform (an example applied to a selective write addressing method) according to a driving method according to the first embodiment for driving the PDP of FIG. In FIG. 2, first, a positive reset pulse R
At the same time as applying Px to all the row electrodes X (X1 to Xn), a reset pulse RPy of negative polarity is applied to the row electrodes Y1 to Yn.
To discharge all the pixels to once form wall charges, and then apply an erasing pulse EP to the row electrodes X to erase the wall charges and initialize all the pixels. In this state, many priming particles exist in the discharge space. (Simultaneous reset period)

Next, a scanning pulse (selective writing pulse) S
P is sequentially applied to the row electrodes Y1 to Yn, and pixel data pulses DP1 to DPn corresponding to pixel data of each scanning line are sequentially generated in synchronization with the application timing of the scanning pulse SP.
It is applied to the column electrodes D1 to Dm. Pixel data pulse DP1
ＤＰDPn is the first column of each row (scan line), respectively.
It is composed of a plurality of pulses generated based on the corresponding pixel data of each of the m-th column. The pixel to which the pixel data pulse is applied in synchronization with the application of the scanning pulse SP is discharged to form a wall charge and becomes a lit pixel, while the pixel to which no pixel data pulse is applied does not generate a discharge, so that a wall charge is formed. Instead, the pixel is turned off. As described above, by selectively generating the address discharge in accordance with the pixel data, the lit and unlit pixels are selected (address period).

Here, a scanning pulse (selective writing pulse)
The voltage value of SP is made different depending on the line to be scanned. That is, the first line to be scanned (for example, the first line)
Scan pulse SP applied to row electrode Y1 corresponding to row
, The voltage value of the scan pulse applied to the row electrodes Y2 to Yn corresponding to the line to be scanned thereafter (for example, the second and subsequent rows) is increased.

The number of priming particles (charged particles and excited particles existing in the discharge space) generated during the simultaneous reset period decreases with the lapse of time in the address period. By increasing the voltage value of the scan pulse SP applied to (the line scanned later than the line scanned first), erroneous discharge is prevented, and stable selective discharge is performed.

Next, the sustain pulse IPx and the sustain pulse IPy are applied alternately to the row electrodes X1 to Xn and the row electrodes Y1 to Yn simultaneously on all the lines. At this time, only the lighting pixels in which the wall charges are accumulated are sustained pulses IPx and IPx.
Each time y is applied, discharge light emission occurs (sustain discharge period).

Next, the erase pulse EP is applied to the row electrodes Y1 to Yn.
To eliminate the wall charges and initialize the wall charge state of all pixels (wall charge erasing period).

As described above, in the first embodiment, the simultaneous reset period, the address period, the sustain discharge period, and the wall charge erasing period (main erasing period) are defined as one display cycle, and the display cycle is repeatedly performed. Excellent image display is performed.

Next, the PD according to the second embodiment of the present invention will be described.
A method of driving P will be described. FIG. 3 is a diagram showing an example of a driving waveform (an example applied to a selective erase addressing method) according to a driving method according to the second embodiment for driving the PDP of FIG. In the case of FIG. 3, first, the reset pulse RP of the negative polarity
At the same time as applying x to all the row electrodes X (X1 to Xn) as sustain electrodes, a reset pulse RPy of positive polarity is applied to each of the row electrodes Y1 to Yn. By applying such a reset pulse, a discharge is generated between all the row electrode pairs. Due to such discharge, charged particles are generated in each pixel cell,
After the end of the discharge, wall charges are accumulated and formed in all the pixels. In this state, many priming particles exist in the discharge space (simultaneous reset period).

Next, a scan pulse (selective erase pulse) SP
Are sequentially applied to the row electrodes Y1 to Yn and the scanning pulse S
Pixel data pulses DP1 to DPn corresponding to the pixel data of each scanning line are sequentially applied to the column electrodes D1 to Dm in synchronization with the application timing of P. Pixel data pulse DP1
DPn is composed of a plurality of pulses generated based on the corresponding pixel data of each of the first to m-th columns of each row (scanning line). The pixel to which the pixel data pulse is applied in synchronization with the application of the scanning pulse SP is discharged and the wall charge formed during the simultaneous reset period is erased to become a lit pixel, while the pixel to which no pixel data pulse is applied is discharged. Does not occur, the wall charges formed during the simultaneous reset period remain as they are and become unlit pixels. As described above, by selectively generating the erasing discharge according to the pixel data, the lit and unlit pixels are selected (address period).

Here, the scanning pulse (selective erasing pulse) S
The voltage value of P is made different according to the line scanned in the same manner as in the first embodiment. That is, the row electrode Y1 corresponding to the line (eg, the first row) scanned first.
, The voltage value of the scan pulse applied to the row electrodes Y2 to Yn corresponding to the line to be scanned thereafter (for example, the second and subsequent rows) is made larger than the voltage value of the scan pulse SP applied to.

The number of priming particles (charged particles and excited particles existing in the discharge space) generated during the simultaneous reset period decreases with the lapse of time in the address period. By increasing the voltage value of the scan pulse SP applied to (the line scanned later than the line scanned first), erroneous discharge is prevented, and stable selective discharge is performed.

After that, various driving operations are performed in the sustain discharge period and the wall charge erasing period as in the first embodiment described above, but the description is omitted here, so that the description is omitted here.

In each of the above-described embodiments, the voltage value of the scan pulse applied in the address period may be set so as to gradually increase in the order of scanning, or may be set in a stepwise manner for each of a plurality of lines. You may set so that it may become large.

[0029]

According to the present invention, a stable selective discharge can be performed by increasing the voltage value of the scan pulse applied to the line to be scanned when the number of priming particles generated during the simultaneous reset period is reduced. And display characteristics can be improved.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a structure of a surface discharge type PDP driven by a method of driving a plasma display panel according to the present invention.

FIG. 2 is a diagram illustrating an example of a driving waveform (an example applied to a selective write addressing method) according to the driving method according to the first embodiment of the present invention.

FIG. 3 is a diagram showing an example of a driving waveform (an example applied to a selective erase addressing method) according to a driving method according to a second embodiment of the present invention.

FIG. 4 is a diagram showing application timings of various drive pulses by a conventional ACDP's selective write addressing method.

[Explanation of symbols]

 1, 2 ... glass substrate 3 ... bus electrode (metal film) 4 ... transparent electrode 5 ... dielectric layer 6 ... protective layer 7 ... · Discharge space 8 ····· Phosphor layer 10 ··· Partition wall 11 ··· PDP

Claims (2)

[Claims] 1. A row electrode corresponding to a matrix display line and covered with a dielectric layer, and a column electrode arranged in a direction orthogonal to the row electrode and forming a pixel at each intersection, A reset period for simultaneously initializing the wall charge states of all pixels on a plurality of lines, and sequentially applying a scan pulse to a row electrode corresponding to the plurality of lines and applying a pixel data pulse to the column electrode to form a pixel data. An address period for selecting a light-on and a light-off pixel according to a sustain discharge period for simultaneously applying a sustaining pulse to row electrodes corresponding to all lines selected in the address period to maintain the light-on and light-off pixels. A method for driving a plasma display panel that performs display by using a plasma, wherein a voltage value of the scan pulse is changed according to a line to be scanned. Method of driving the I spray panel. 2. A scanning pulse applied to a row electrode corresponding to a subsequently scanned line as compared with a voltage value of a scanning pulse applied to a row electrode corresponding to a first scanned line in the address period. 2. The method of driving a plasma display panel according to claim 1, wherein the voltage value is increased.