JPH11220167A - Semiconductor light-emitting device and manufacture thereof - Google Patents

Semiconductor light-emitting device and manufacture thereof

Info

Publication number
JPH11220167A
JPH11220167A JP2179998A JP2179998A JPH11220167A JP H11220167 A JPH11220167 A JP H11220167A JP 2179998 A JP2179998 A JP 2179998A JP 2179998 A JP2179998 A JP 2179998A JP H11220167 A JPH11220167 A JP H11220167A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
light
emitting
semiconductor
side
surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2179998A
Other languages
Japanese (ja)
Other versions
JP3708319B2 (en )
Inventor
Yasuhiko Fukuda
康彦 福田
Original Assignee
Matsushita Electron Corp
松下電子工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device, wherein uniformizing of the attitude of light-emitting elements causes stable light-orientation property and less molding processes leads to improved productivity. SOLUTION: A semiconductor light-emitting element 1 of flip-chip type is mounted on a Zener diode 7 for electrostatic protection, and p-side and n-side electrodes 3 and 2 of the semiconductor light-emitting element 1 are connected for conduction, to electrodes 7b and 7a of the Zener diode 7, with a surface of a side opposite to the mounting surface side as a main light extracting surface. Here, the p-side and p-side electrodes 3 and 2 are formed on the surfaces of a p-type layer 1c and n-type layer 1b of the semiconductor light-emitting element 1, respectively, and depending on the thickness of these electrodes 3 and 2, a gap with out shorting interference among the semiconductor light- emitting element 1, the mounting surface, and its electrode is formed.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明は、たとえば青色発光ダイオード等の光デバイスに利用される窒化ガリウム系化合物を利用したフリップチップ型の半導体発光装置に係り、特に配光性の向上を可能とした半導体発光装置及びその製造方法に関する。 The present invention relates to, for example relates to a semiconductor light-emitting device of the flip chip type using a blue light emitting diode gallium nitride-based compound used for an optical device such as was especially possible to improve the light distribution the semiconductor light emitting device and a manufacturing method thereof.

【0002】 [0002]

【従来の技術】GaN,GaAlN,InGaN及びI BACKGROUND OF THE INVENTION GaN, GaAlN, InGaN and I
nAlGaN等の窒化ガリウム系化合物の半導体の製造では、その表面において半導体膜を成長させるための結晶基板として、一般的には絶縁性のサファイアが利用される。 In semiconductor manufacturing gallium nitride based compound of such NAlGaN, as a crystal substrate for growing a semiconductor film at its surface, is generally utilized sapphire insulating. このサファイアのような絶縁性の結晶基板を用いる場合では、結晶基板側から電極を出すことができないので、半導体層に設けるp,nの電極は結晶基板と対向する側の一面に形成されることになる。 In the case of using an insulating crystal substrates such as sapphire, it is not possible to issue electrode from the crystal substrate side, p provided on the semiconductor layer, n electrodes being formed on one surface of the side facing the crystal substrate become.

【0003】たとえば、GaN系化合物半導体を利用した発光素子は、絶縁性の基板としてサファイア基板を用いてその上面にn型層及びp型層を有機金属気相成長法によって積層形成し、p型層の一部をエッチングしてn For example, the light emitting device using a GaN-based compound semiconductor, the n-type layer and the p-type layer is laminated by MOCVD on its upper surface with a sapphire substrate as the insulating substrate, the p-type n the part of the layer is etched
型層を露出させ、これらのn型層とp型層のそれぞれにn側電極及びp側電極を形成するというものがその基本的な構成である。 Exposing the mold layer, those that form the n-side electrode and the p-side electrode for each of these n-type layer and the p-type layer is at its basic configuration. そして、p側電極を透明電極とした場合であれば、これらのp側及びn側の電極にそれぞれボンディングパッド部を形成して、リードフレームや基板にそれぞれワイヤボンディングされる。 Then, in the case where the p-side electrode and the transparent electrode, to form a bonding pad portion each of these p-side and n-side electrodes are respectively wire bonded to the lead frame or substrate.

【0004】一方、サファイア基板側から光を取り出すようにしたフリップチップ型の半導体発光素子では、p On the other hand, a flip-chip type semiconductor light emitting device so as to extract light from the sapphire substrate side, p
側電極を透明電極としないままでこのp側及びn側の電極のそれぞれにマイクロバンプを形成し、これらのマイクロバンプを基板またはリードフレームのp側及びn側に接続する構成が採用されている。 Each of the p-side and n-side electrode without the side electrode and the transparent electrode to form a micro-bumps, the configuration of these micro bumps connected to the p-side and n-side of the substrate or the lead frame is employed .

【0005】図3はフリップチップ型の半導体発光素子を利用したLEDランプの概略を示す縦断面図である。 [0005] FIG. 3 is a longitudinal sectional view schematically showing the LED lamp using a flip-chip type semiconductor light emitting device.

【0006】図において、発光素子1は、絶縁性の透明なサファイア基板1aの表面に、たとえばGaNバッファ層,n型GaN層,InGaN活性層,p型AlGa [0006] In Figure, the light-emitting element 1, the surface of the insulating transparent sapphire substrate 1a, for example, a GaN buffer layer, n-type GaN layer, InGaN active layer, p-type AlGa
N層及びp型GaN層を順に積層し、InGaN活性層を発光層としたものである。 Laminating the N layer and the p-type GaN layer in this order, in which an InGaN active layer form a light emitting layer. そして、n型GaN層の上面にn側電極20が、及びp型GaN層の上面にはp側電極30がそれぞれ蒸着法によって形成され、更にこれらのn側電極20及びp側電極30の上にはそれぞれマイクロバンプ4,5を形成している。 Then, the n-side electrode 20 on the upper surface of the n-type GaN layer, and the upper surface of the p-type GaN layer p-side electrode 30 is formed by the respective evaporation, further on these n-side electrode 20 and the p-side electrode 30 forming a micro-bump 4,5 respectively to.

【0007】発光素子1を搭載するリードフレーム6のマウント部6aには、発光素子1に外部から静電気が印加されないようにしてその破壊を防止するために、静電気保護素子としてツェナーダイオード7を設ける。 [0007] mounting portion 6a of the lead frame 6 for mounting the light emitting element 1, as static electricity from the outside to the light emitting element 1 is not applied in order to prevent its destruction, provided a Zener diode 7 as the electrostatic protection element. このツェナーダイオード7は、導電性のAgペースト8によってマウント部6aに接着固定され、その上面にはp側及びn側の電極7a,7bをそれぞれ形成したものである。 The Zener diode 7 is bonded and fixed to the mount portion 6a of a conductive Ag paste 8, on the upper surface thereof is obtained by forming p-side and n-side electrodes 7a, 7b, respectively.

【0008】発光素子1は、サファイア基板1aが上面を向く姿勢としてツェナーダイオード7の上に搭載され、n側及びp側のマイクロバンプ4,5をそれぞれツェナーダイオード7の電極7a,7bに接合することによって電気的に導通させる。 [0008] light-emitting element 1, the sapphire substrate 1a is mounted on the Zener diode 7 as the posture facing the upper surface, bonding the micro bumps 4,5 of the n-side and p-side electrode 7a of the Zener diode 7, respectively, and 7b connecting electrically by. そして、リードフレーム6 Then, the lead frame 6
の上端部を含めて発光素子1の全体がエポキシ樹脂9によって封止され、図示の形状のLEDランプが構成される。 Entire upper end light-emitting element 1, including the are sealed by an epoxy resin 9, LED lamp shown shape is formed.

【0009】発光素子1への通電があるときには、半導体積層膜中のInGaN活性層が発光層となり、この発光層からの光がサファイア基板1a及びp側電極30の両方向へ向かう。 [0009] When there is power to the light emitting element 1, InGaN active layer becomes a light emitting layer in the semiconductor laminated film, light from the light emitting layer is directed in both directions of the sapphire substrate 1a and the p-side electrode 30. そして、p側電極30を光透過しない反射型の積層膜としておくことにより、サファイア基板1aの上面からの発光輝度を最大としてこの面を主光取出し面とすることができる。 Then, by keeping the laminated film of the reflective type that does not light transmitted through the p-side electrode 30, it is possible to this surface as a main light extracting surface of the light emission luminance from the upper surface of the sapphire substrate 1a as a maximum.

【0010】このようなLEDランプの製造においては、マイクロバンプ4,5と電極7a,7bとを電気的に導通させるとともに発光素子1をツェナーダイオード7の上に固定するため、たとえば導電性の接着剤を用いたり、超音波加熱圧着による接合が必要である。 [0010] In the manufacture of such LED lamps, for fixing the light emitting element 1 on the Zener diode 7 causes electrical conduction microbump 4,5 and the electrode 7a, and 7b, for example, a conductive adhesive agent or used, is required joining by ultrasonic thermocompression bonding. そして、超音波加熱圧着法による場合では、マイクロバンプ4,5の先端を電極7a,7bの表面に突き当てた状態として加熱及び荷重を加えた状態で超音波を印加し、これらの部材どうしの溶融固化による接合が行われる。 Then, in the case by ultrasonic thermocompression bonding method, an ultrasonic wave is applied while applying heat and load in a state where abutting the tip of the micro-bump 4,5 electrode 7a, the surface of 7b, the two or more of these members bonding by melting and solidifying is carried out.

【0011】 [0011]

【発明が解決しようとする課題】マイクロバンプ4,5 The present invention is to provide a micro bump 4, 5
の機能は、電極7a,7bとの導通接続だけでなく、発光素子1の下面とツェナーダイオード7の上面との間にクリアランスを持たせることにより、これらの発光素子1とツェナーダイオード7との間の短絡を防止することである。 Between the features, the electrodes 7a, not only conductive connection between 7b, by providing a clearance between the lower surface and the upper surface of the Zener diode 7 of the light emitting element 1, and the light-emitting element 1 and the Zener diode 7 it is to prevent a short circuit. したがって、マイクロバンプ4,5は或る程度の高さ寸法を持つように形成することが必要であり、通常の場合では50μm程度の長さが最適とされている。 Therefore, the micro bump 4 and 5 must be formed to have a height of about one, in the case of normal length of about 50μm is the optimum.

【0012】ところが、マイクロバンプ4,5をn側電極20及びp側電極30に形成する方法は、Auワイヤの先端を球状にしてこの部分を電極上に押圧し、超音波と熱で球状部をつぶしながら電極上に溶着させた後、A [0012] However, a method of forming a micro-bumps 4 and 5 n-side electrode 20 and the p-side electrode 30, and the tip of the Au wire spherical pressing this portion on the electrode, the spherical portions with ultrasonic and heat after welding on the electrode while squashed, a
uワイヤを引っ張ってその幹部で切断するというものであり、その成形方法からスタッドバンプと呼ばれることが多い。 u is intended that pulling the wire is cut at its stem is often referred to as a stud bump from the molding process. このようなスタッドバンプでは、たとえば蒸着法等による成膜方法とは異なって、高さ寸法すなわちn In such a stud bump, for example differs from the film deposition method of vapor deposition or the like, the height dimension or n
側及びp側の電極からの突き出し長さにばらつきを生じやすい。 Susceptible to variation in projection length from the side and p-side electrodes. したがって、図3に示す発光素子1の例でも、 Thus, in the example of the light emitting device 1 shown in FIG. 3,
マイクロバンプ4,5の長さが不揃いになってしまう恐れがある。 There is a possibility that the length of the micro-bump 4 and 5 becomes irregular.

【0013】このようにマイクロバンプ4,5の長さが一様でないと、発光素子1をツェナーダイオード7の上に搭載して圧着接合したとき、発光素子1の姿勢が傾いてしまう。 [0013] The length of the thus micro bumps 4 and 5 is not uniform, when a light-emitting element 1 was compression bonding is mounted on the Zener diode 7, thereby tilting attitude of the light emitting element 1. たとえば、マイクロバンプ4のほうが他方のマイクロバンプ5よりも短いと、発光素子1は右下がりの姿勢となってその発光層も同じ姿勢をとることになる。 For example, if more of the micro-bump 4 is shorter than the other micro bumps 5, the light emitting element 1 will take the same posture that the light emitting layer becomes downward-sloping position. したがって、発光素子1の向きはマイクロバンプ4,5が揃っていないと、様々に変わってしまうことになり、多数のLEDランプの配列によるパネル等の場合では、各発光素子1からの配光性に一様性がなくなり、 Therefore, if the direction of the light emitting element 1 is not equipped with micro bumps 4 and 5 will be will change to different, in the case of the panel due sequences of a number of LED lamp, the light distribution from the light-emitting elements 1 there is no uniformity in,
表示画像に好ましくない影響を及ぼすことになる。 It would undesirably affect the displayed image.

【0014】また、マイクロバンプ4,5自身は、発光素子1とツェナーダイオード7との間の短絡防止に十分貢献するが、各発光素子1のそれぞれについてこれらのマイクロバンプ4,5を形成する必要がある。 Further, the micro-bump 4,5 itself is sufficiently contribute to short circuit prevention between the light emitting element 1 and the Zener diode 7, necessary to form these micro-bump 4,5 for each of the light emitting element 1 there is. したがって、n側電極20やp側電極30を金属蒸着法によって成膜した一次製品に対して、マイクロバンプ4,5の付加という工程が必要となり、生産性及び歩留り向上の障害ともなる。 Thus, the n-side electrode 20 and the p-side electrode 30 to the primary product formed by metal vapor deposition, process is required that the addition of micro-bumps 4,5 is also an obstacle to productivity and yield improvement.

【0015】このように従来のマイクロバンプを用いる発光素子の搭載面側への接合構造では、発光素子の姿勢の乱れによる配光性の劣化を招くほか、マイクロバンプ形成用の高価なAuを消費してしまうという問題がある。 [0015] Consumption As described above, in the joint structure to the mounting surface of the light emitting device using the conventional micro-bump, in addition to leading to light distribution of the degradation due to disturbance of the orientation of the light-emitting element, an expensive Au for micro bump formation there is a problem that to become.

【0016】本発明において解決すべき課題は、発光素子の姿勢の均一化によって配光性を安定させるとともに成形工数も少なくして、生産性の向上が可能な半導体発光装置を提供することにある。 The problem to be solved in the present invention is to at least molding steps with stabilizing the light distribution by uniformizing the orientation of the light-emitting element is to provide a semiconductor light emitting device capable of improving productivity .

【0017】 [0017]

【課題を解決するための手段】本発明は、基板またはリードフレーム等の基材の搭載面にフリップチップ型の半導体発光素子を搭載し、この半導体発光素子のp側及びn側の電極を搭載面側の対応する電極に導通接続し、前記搭載面側と反対側の面を主光取出し面とするGaN系の半導体発光装置において、前記p側及びn側の電極を、前記半導体発光素子のp型層及びn型層のそれぞれの表面に金属蒸着膜によって形成し、これらの電極の厚さによって半導体発光素子と搭載面及びその電極との間に短絡干渉がない隙間を形成可能としてなることを特徴とする。 The present invention SUMMARY OF THE INVENTION is equipped with a flip-chip type semiconductor light-emitting element mounting surface of the substrate such as the substrate or a lead frame, mounting a p-side and n-side electrodes of the semiconductor light emitting element and conductively connected to the corresponding electrode surface side, the GaN-based semiconductor light-emitting device according to the mounting surface opposite to the surface of the main light emitting surface, the electrodes of the p-side and n-side, of the semiconductor light emitting element formed by a metal deposition film on each surface of the p-type layer and the n-type layer, it becomes a possible form a gap no short interference between the mounting surface and the electrode and the semiconductor light emitting device by the thickness of these electrodes the features.

【0018】このような構成では、マイクロバンプを形成しないまま、発光素子のp側及びn側の電極によってできる間隔を発光素子と搭載面側との間の短絡干渉の防止に利用でき、しかも電極は金属蒸着膜によって形成されるので、その肉厚を均一にして発光素子の姿勢を一様に揃えることができる。 [0018] In this structure, without forming a micro-bumps, available space that can be the p-side and n-side electrode of the light emitting element to prevent a short circuit interference between the mounting surface and the light emitting element, moreover electrode since being formed by a metal deposition film, it is possible to align the orientation of the light emitting elements uniformly in the its thickness uniform.

【0019】また、本発明の製造方法は、p側及びn側の電極を搭載面側の対応する電極に対して300〜35 Moreover, the production method of the present invention, the electrode of the p-side and n-side with respect to the corresponding electrode of the mounting surface 300 to 35
0℃の温度雰囲気で加熱圧着して半導体発光素子を搭載面に接合することを特徴とする。 Thermocompression bonding at a temperature atmosphere of 0 ℃ characterized by bonding the semiconductor light-emitting element mounting surface.

【0020】この製造方法では、加熱温度を300〜3 [0020] In this manufacturing method, the heating temperature 300-3
50℃とすることで、発光素子であるGaN系LEDに対して、特性の劣化や外見上の変色等の異常を生じることなく電極間はAu−Snの共晶により安定した接合を行うことができる。 With 50 ° C., with respect to GaN-based LED is a light emitting element, among abnormalities without incurring the electrodes such as discoloration on the deterioration and appearance characteristics is possible to perform stable bonding by eutectic of Au-Sn it can.

【0021】 [0021]

【発明の実施の形態】請求項1に記載の発明は、基板またはリードフレーム等の基材の搭載面にフリップチップ型の半導体発光素子を搭載し、この半導体発光素子のp The invention described in DETAILED DESCRIPTION OF THE INVENTION Claim 1 is equipped with a flip-chip type semiconductor light-emitting element mounting surface of the substrate such as the substrate or a lead frame, p of the semiconductor light emitting element
側及びn側の電極を搭載面側の対応する電極に導通接続し、前記搭載面側と反対側の面を主光取出し面とするG Conductive connecting side and n-side electrodes to the corresponding electrode of the mounting surface, a main light extraction surface opposite to the surface and the mounting surface G
aN系の半導体発光装置において、前記p側及びn側の電極を、前記半導体発光素子のp型層及びn型層のそれぞれの表面に金属蒸着膜によって形成し、これらの電極の厚さによって半導体発光素子と搭載面及びその電極との間に短絡干渉がない隙間を形成可能としてなるものであり、マイクロバンプを形成しないまま、発光素子のp In the semiconductor light-emitting device of aN system, the electrodes of the p-side and n-side, formed by a metal deposition film on each surface of the p-type layer and the n-type layer of the semiconductor light emitting element, a semiconductor by the thickness of these electrodes are those made as capable of forming a gap no short interference between the light emitting element mounting surface and the electrode, without forming the micro bumps, p of the light-emitting element
側及びn側の電極によってできる間隔を発光素子と搭載面側との間の短絡干渉の防止に利用できるとともに、電極の肉厚を均一にして発光素子の姿勢を一様に揃えるという作用を有する。 An effect that it is possible to use in prevention and in the thickness of the electrode uniformly uniformly align the orientation of the light-emitting element of short interference between the intervals can be by the side and n-side electrode and the light emitting element and the mounting surface .

【0022】請求項2の発明は、p側及びn側の電極の厚さを10〜20μmとしてなる請求項1記載の半導体発光装置であり、このような電極の厚さであれば、発光素子と搭載面側との短絡干渉を確実に防止するという作用を有する。 The invention of claim 2 is the thickness of the p-side and n-side electrode is a semiconductor light emitting device according to claim 1 comprising a 10 to 20 [mu] m, if the thickness of the electrode, the light emitting element It has the effect that to reliably prevent the short circuit interference between the mounting surface and.

【0023】請求項3の発明は、p側及びn側の電極をそれぞれTiとAuとの積層膜とし、前記搭載面側の対応する電極をAuとSnとの合金としてなる請求項1または2記載の半導体発光装置であり、TiはAuの付着力強化材料であり、Auは基板またはリードフレームの電極をAuとSnの合金とすることで、熱圧着時のAu The invention of claim 3, the electrodes of the p-side and n-side, respectively a laminated film of Ti and Au, a corresponding electrode of the mounting surface comprising an alloy of Au and Sn claim 1 or 2 a semiconductor light emitting device according, Ti is the adhesion reinforcing materials Au, Au is that the electrode of the substrate or a lead frame and an alloy of Au and Sn, Au during thermocompression bonding
との共晶温度を低くできるという作用を有する。 Has an effect of eutectic temperature can be lowered with.

【0024】請求項4に記載の発明は、前記基板の上に静電気保護素子を搭載して前記基材に導通させ、前記静電気保護素子の上に前記半導体発光素子をp側及びn側の電極が逆極性となる関係として搭載接合してなる請求項1から3のいずれかに記載の半導体発光装置であり、 [0024] According to a fourth aspect of the invention, equipped with a electrostatic protection element is electrically connected to the substrate on the substrate, electrodes of the semiconductor light-emitting device of the p-side and n-side on the electrostatic protection element There is a semiconductor light emitting device according to claim 1 formed by mounting the junction 3 of the relation of opposite polarity,
静電気保護素子によって半導体発光素子の静電破壊が防止されるという作用を有する。 Has an effect of electrostatic breakdown is prevented semiconductor light emitting element by electrostatic protection element.

【0025】請求項5の発明は、請求項1〜4のいずれかに記載の半導体発光装置の製造方法であって、前記p The invention of claim 5 is a method for manufacturing a semiconductor light emitting device according to claim 1, wherein the p
側及びn側の電極を搭載面側の対応する電極に対して3 3 side and n-side electrode with respect to the corresponding electrode of the mounting surface
00〜350℃の温度雰囲気で加熱圧着して半導体発光素子を搭載面に接合する半導体発光装置の製造方法であり、発光素子であるGaN系LEDに対して、特性の劣化や外見上の変色等の異常を生じることがなく、電極間はAu−Snの共晶による安定した接合を行うことができるという作用を有する。 Bonded under heat at a temperature atmosphere of 00 to 350 ° C. is a method for manufacturing a semiconductor light-emitting device for bonding the semiconductor light-emitting element mounting surface, with respect to GaN-based LED is a light emitting element, discoloration on deterioration and appearance characteristics such as without causing the abnormal, the inter-electrode has an effect that it is possible to perform stable bonding by eutectic of Au-Sn.

【0026】以下に、本発明の実施の形態の具体例を図面を参照しながら説明する。 [0026] Hereinafter, with reference to the drawings a specific example embodiment of the present invention. 図1は本発明の一実施の形態による半導体発光装置の要部の拡大図、図2は発光素子の斜視図である。 Figure 1 is an enlarged view of a main part of a semiconductor light emitting device according to an embodiment of the present invention, FIG 2 is a perspective view of a light emitting device. なお、発光素子はn側及びp側の電極の形状以外の構成は従来例のものと同じであってツェナーダイオードも同様であり、電極以外について同一部材には共通の符号で指示し、その詳細な説明は省略する。 Incidentally, the light emitting device structure other than the shape of the n-side and p-side electrodes are also same as a Zener diode with the conventional example, the same members except for the electrode indicated by the same reference numerals, and detailed Do description thereof is omitted.

【0027】図2において、発光素子1はサファイア基板1aの上面にn型層1b及びp型層1cを形成するとともに、これらのn型層1b及びp型層1cの上面にはそれぞれn側電極2及びp側電極3を形成している。 [0027] In FIG. 2, the light emitting element 1 to form a n-type layer 1b and the p-type layer 1c on the upper surface of the sapphire substrate 1a, each of the upper surfaces of the n-type layer 1b and the p-type layer 1c n-side electrode to form a 2 and a p-side electrode 3. そして、p型層1cの表面にはたとえばNi,Ptの積層膜またはSb,Ptの積層膜からなる銀白色の光反射膜1dを形成することにより、発光層からの光をこの光反射膜1dからサファイア基板1a方向に反射させるようにすることで、サファイア基板1aの下面を主光取出し面とすることができる。 Then, the surface of the p-type layer 1c such as Ni, laminated film or Sb of Pt, by forming a silver-white light reflection film 1d consisting of a laminated film of Pt, the light reflection film 1d light from the light-emitting layer from by so as to reflect the sapphire substrate 1a direction, it is possible to the lower surface of the sapphire substrate 1a and the main light extraction surface.

【0028】n側電極2及びp側電極3は、たとえばT [0028] n-side electrode 2 and the p-side electrode 3, for example, T
iとAuの合金を材料として蒸着法によって形成されたものであり、その高さ寸法は10〜20μm程度である。 I and Au alloy has been formed by vapor deposition as a materials, its height is about 10 to 20 [mu] m. そして、サファイア基板1aの底面を水平面上に位置させたとき、これらのn側及びp側の電極2,3の上端面の高さは正確に一致して同一平面内に含まれるように成形する。 Then, when the bottom surface of the sapphire substrate 1a is positioned on a horizontal plane, the height of the upper end surface of the n-side and p-side electrodes 2 and 3 is shaped to be included within the same plane exactly match . このような成形は、金属を用いた蒸着法であれば高い精度で可能であり、n側及びp側の電極2, Such molding, if an evaporation method using a metal is possible with high accuracy, n-side and p-side electrodes 2,
3の上端面を平滑で一様な平面として形成することができる。 The 3 upper end surface of the can be formed as a smooth and uniform surface.

【0029】ツェナーダイオード7の上面に形成するp [0029] p is formed on the upper surface of the Zener diode 7
側及びn側の電極7a,7bの金属材料としては、発光素子1のn側及びp側の電極2,3を加熱圧着法によって接合することから、AuとSnの合金が好適である。 Side and n-side electrode 7a, as the metal material 7b, the electrodes 2 and 3 of the n-side and p-side light-emitting element 1 to be joined by thermocompression bonding method, an alloy of Au and Sn are preferred.
この場合、AuとSnの最適比率は、Au:Sn= In this case, the optimum ratio of Au and Sn is, Au: Sn =
(3:9)〜(3:11)程度であり、電極7a,7b (3: 9) to (3:11) is about, electrodes 7a, 7b
の厚さは5μm程度とすることが好ましい。 The thickness of preferably about 5 [mu] m.

【0030】発光素子1は、従来構造のものと同様に、 [0030] Similar to the light emitting element 1, the conventional structure that,
サファイア基板1aをマウント部6aの搭載面と逆向きにして図1に示すようにツェナーダイオード7の上面に搭載される。 It is mounted on the upper surface of the Zener diode 7, as shown in FIG. 1 by the sapphire substrate 1a on the mounting surface in the opposite direction from the mounting portion 6a. このとき、n側電極2及びp側電極3はツェナーダイオード7のp側及びn側の電極7a,7bに直に加熱圧着法によって接合される。 At this time, the n-side electrode 2 and the p-side electrode 3 is p-side and n-side electrode 7a of the Zener diode 7 are joined by direct thermocompression bonding method 7b.

【0031】この加熱圧着による発光素子1のn側及びp側の電極2,3とツェナーダイオード7の電極7a, The light emitting device 1 according to the thermocompression bonding n-side and p-side electrodes 2 and 3 and of the Zener diode 7 electrodes 7a,
7bとの接合は、加熱温度が300〜350℃の範囲であって加圧力は10g〜20g程度の範囲であればよい。 Bonding between 7b is pressure in the range the heating temperature is 300 to 350 ° C. may be in a range of about 10G~20g. このような条件であれば、AuとSnの共晶がn側及びp側の電極2,3の表面で一様に進行するので、n With such a condition, since the eutectic Au and Sn uniformly proceeds in the surface of the n-side and p-side electrodes 2,3, n
側及びp側の電極2,3の接合端面がたとえば円弧状の凸面等に変形することが防止され、発光素子1の姿勢が傾くことを防止できる。 It is possible to prevent the joining end face of the electrodes 2, 3 on the side and p-side is deformed, for example arcuate convex etc., can prevent the posture of the light emitting element 1 is inclined. また、この温度範囲であれば、 In addition, if this temperature range,
発光素子であるGaN系LEDの特性が劣化することのない加熱圧着が可能である。 Characteristics of GaN-based LED is a light-emitting element is capable of thermocompression bonding that no deteriorated.

【0032】ここで、従来のGaN系化合物半導体発光素子におけるp側及びn側の電極の厚さは1〜2μm程度であり、したがって本発明においてはp側及びn側の電極2,3の厚さは従来構造に比べると10倍程度大きい。 [0032] Here, the thickness of the p-side and n-side electrodes in a conventional GaN-based compound semiconductor light-emitting device is about 1 to 2 [mu] m, thus the thickness of the electrodes 2 and 3 of the p-side and n-side in the present invention It is about 10 times greater than the conventional structure. そして、従来例で示したマイクロバンプ4,5の厚さは約30μm程度であって、発光素子1とツェナーダイオード7との間の間隔を保って短絡を防止するのに十分な厚みを持つ。 Then, the thickness of the micro-bumps 4 and 5 shown in the conventional example and was about 30 [mu] m, with a thickness sufficient to prevent a short circuit at a distance between the light emitting element 1 and the Zener diode 7.

【0033】一方、本発明においては、n側電極2を2 On the other hand, in the present invention, the n-side electrode 2 2
0μmの厚さ及びp側電極3を10μmの厚さとした場合、従来のマイクロバンプ4,5による隙間よりは小さいが、最小でp側電極3によって10μmの隙間を確保することができる。 If a thickness of 0μm and the p-side electrode 3 and the thickness of 10 [mu] m, but smaller than the gap of the conventional micro bump 4 and 5 can be secured a gap 10 [mu] m by p-side electrode 3 at the minimum. そして、この10μm程度の隙間であれば、発光素子1とツェナーダイオード7との間の接触を避けることができ、短絡についての問題は生じない。 Then, if the gap of about the 10 [mu] m, it is possible to avoid contact between the light emitting element 1 and the Zener diode 7, there is no problem for short.

【0034】また、TiとAuの合金を材料とする発光素子1のn側及びp側の電極2,3と、AuとSnとの合金であるツェナーダイオード7の電極7a,7bとの加熱圧着であれば、300℃〜350℃という比較的低温で均一にAuとSnの共晶による接合を行うことができるとともに、光反射膜1dとの接合もTiにより付着強度を強く保つことができる。 Further, heat-pressed between the n-side and p-side electrodes 2 and 3 of the light-emitting element 1 to the alloy of Ti and Au as the material, the electrode 7a of the Zener diode 7, which is an alloy of Au and Sn, and 7b if, it is possible to perform relatively uniform bonding by eutectic of Au and Sn at a low temperature of 300 ° C. to 350 ° C., adhesive strength also joined by Ti the light reflection film 1d can be maintained strongly.

【0035】以上の構成において、発光素子1に金属蒸着法によって形成したn側及びp側の電極2,3は、ツェナーダイオード7との接合端面までの長さを高精度で製作できるので、電極7a,7bの表面に突き合わせして接合したとき、発光素子1の姿勢が傾くことが防止される。 [0035] In the above configuration, n-side and p-side electrodes 2 and 3 formed by metal vapor deposition in the light-emitting element 1, since a length of up to joining end face of the Zener diode 7 can be manufactured with high accuracy, the electrodes 7a, when joined by butt surfaces of 7b, thereby preventing the posture of the light emitting element 1 is inclined. そして、n側及びp側の電極2,3の接合端面も一様な平坦面として形成することで、電極7a,7bに対して適正な接合が可能となり、発光素子1の傾斜を更に一層効果的になくすことができる。 The joining end face of the n-side and p-side electrodes 2 and 3 also by forming as a uniform flat surface, the electrode 7a, it is possible to properly joined to 7b, further more effectively the tilt of the light-emitting element 1 it can be eliminated in the manner.

【0036】更に、加熱圧着による熱や圧力の負荷条件を、n側及びp側の電極2,3の接合端面がたとえば突き出し方向に膨出変形することがない範囲に設定することで、これらの電極2,3の接合端の平坦度を高く維持できる。 Furthermore, the load conditions of heat and pressure by heat pressing, by joining end face of the n-side and p-side electrodes 2 and 3 is set in a range never bulging deformation example in the projecting direction, of the flatness of the joint end of the electrodes 2 and 3 can be maintained high.

【0037】したがって、発光素子1をツェナーダイオード7に対して正しい姿勢として接合でき、多数の発光素子1を配列するディスプレイパネルであっても、配光性に優れた鮮明な画像を再生することができる。 [0037] Therefore, it joined the right attitude emitting element 1 with respect to the Zener diode 7, be a display panel to arrange a number of the light emitting element 1, it is possible to reproduce a clear image with excellent light distribution it can.

【0038】なお、以上の実施の形態では、発光素子をツェナーダイオードに搭載する例を示したが、リードフレームや基板に搭載する場合でも本発明が適用できることは無論である。 [0038] In the above embodiment, an example of mounting the light emitting element to the Zener diode, it is naturally applicable even present invention may be mounted on the lead frame or substrate.

【0039】 [0039]

【発明の効果】請求項1の発明では、肉厚としたp側及びn側の電極を干渉短絡防止のための隙間を形成するのに兼用するので、従来のようにマイクロバンプを形成する工程がなくなり、製造歩留りの向上が図れる。 In the claims 1 invention, according to the present invention, since also serves as a p-side and n-side electrodes and the thickness to form a gap for interference short-circuit prevention, forming a micro-bumps as in the prior art It is eliminated, thereby improving the manufacturing yield. また、 Also,
電極を金属蒸着膜によって形成するので、その肉厚及び接合端面の精度を高く維持することができ、発光素子の姿勢の乱れのないアセンブリが可能となる。 Since an electrode is formed by metal vapor deposition film, its thickness and the accuracy of the joining end face higher it is possible to maintain undisturbed assembly posture of the light emitting element becomes possible.

【0040】請求項2の発明では、p側及びn側の電極の厚さを10〜20μmとすることで、発光素子と搭載面側との間の短絡を確実に防止できる。 [0040] In the present invention of claim 2, the thickness of the p-side and n-side electrode by a 10 to 20 [mu] m, can be surely prevent a short circuit between the mounting surface and the light emitting element.

【0041】請求項3の発明では、p側及びn側の電極の材料をTiとAuの積層膜とすることで、発光素子との付着強度及び基板またはリードフレーム側のAuとS [0041] In the invention of claim 3, the material of the p-side and n-side electrode by a laminated film of Ti and Au, the adhesion strength between the light emitting element and the substrate or the lead frame side Au and S
nとの合金からなる電極と比較的低温で熱圧着が可能になり、製造上での歩留りの向上が図られる。 Relatively thermocompression bonding at a low temperature and an electrode made of an alloy of n becomes possible, improving the yield in manufacturing can be improved.

【0042】請求項4の発明では、静電気保護素子を備えることによって、静電耐圧が低いGaN系の半導体発光素子の静電耐圧を上げることができ、過電流等による静電破壊が防止される。 [0042] In a fourth aspect of the present invention, by providing an electrostatic protection element, it is possible to increase the electrostatic breakdown voltage of the semiconductor light-emitting device of the electrostatic withstand voltage is low GaN-based, electrostatic breakdown due to overcurrent or the like can be prevented .

【0043】請求項5の発明では、加熱温度を300℃ [0043] In the present invention of claim 5, the heating temperature 300 ° C.
〜350℃とすることで、GaN系発光素子の特性を劣化させることなく、しかも電極間はAu,Snの一様な共晶による安定した接合が得られる。 With to 350 ° C., without degrading the characteristics of the GaN-based light emitting device, moreover inter-electrode is Au, stable bonding by uniform eutectic Sn is obtained.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明の一実施の形態を示す図であって、マウント部上のツェナーダイオードに発光素子を加熱圧着した状態を示す図 [1] A diagram showing an embodiment of the present invention, showing a state in which heat pressing the light-emitting element to the Zener diode on the mounting portion

【図2】発光素子の概要を示す斜視図 Figure 2 is a perspective view showing an outline of a light emitting element

【図3】従来のフリップチップ型の発光素子を備えたL [3] with a conventional flip-chip type light-emitting element L
EDランプの概略縦断面図 Schematic longitudinal sectional view of the ED lamp

【符号の説明】 DESCRIPTION OF SYMBOLS

1 発光素子 1a サファイア基板 1b n型層 1c p型層 1d 光反射膜 2 n側電極 3 p側電極 4,5 マイクロバンプ 6 リードフレーム 6a マウント部 7 ツェナーダイオード 7a,7b 電極 8 Agペースト 9 エポキシ樹脂 First light emitting device 1a sapphire substrate 1b n-type layer 1c p-type layer 1d light reflecting film 2 n-side electrode 3 p-side electrode 4, 5 micro bumps 6 leadframe 6a mount portion 7 Zener diode 7a, 7b electrode 8 Ag paste 9 Epoxy resin

Claims (5)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 基板またはリードフレーム等の基材の搭載面にフリップチップ型の半導体発光素子を搭載し、この半導体発光素子のp側及びn側の電極を搭載面側の対応する電極に導通接続し、前記搭載面側と反対側の面を主光取出し面とするGaN系の半導体発光装置において、前記p側及びn側の電極を、前記半導体発光素子のp型層及びn型層のそれぞれの表面に金属蒸着膜によって形成し、これらの電極の厚さによって半導体発光素子と搭載面及びその電極との間に短絡干渉がない隙間を形成可能としてなる半導体発光装置。 1. A mounting a flip chip type semiconductor light-emitting element mounting surface of the substrate or substrate such as a lead frame, electrically connected to the corresponding electrode of the p-side and n-side electrodes of the semiconductor light-emitting element mounting surface side connect, in the semiconductor light-emitting device of the GaN-based mainly light extraction surface opposite to the surface and the mounting surface side, the electrodes of the p-side and n-side, the p-type layer and the n-type layer of the semiconductor light emitting element on each surface formed by the metal deposition film, the semiconductor light-emitting device comprising a can form a gap no short interference between these semiconductor light emitting element and the mounting surface and the electrode by the thickness of the electrode.
  2. 【請求項2】 前記p側及びn側の電極の厚さを10〜 2. A 10 to the thickness of the p-side and n-side electrode
    20μmとしてなる請求項1記載の半導体発光装置。 The semiconductor light emitting device according to claim 1 comprising a 20 [mu] m.
  3. 【請求項3】 前記p側及びn側の電極をそれぞれTi Wherein each electrode of the p-side and n-side Ti
    とAuとの積層膜とし、前記搭載面側の対応する電極をAuとSnとの合金としてなる請求項1または2記載の半導体発光装置。 And a laminated film with Au, the semiconductor light-emitting device according to claim 1 or 2, wherein comprising as an alloy of the corresponding electrode of the mounting surface with Au and Sn.
  4. 【請求項4】 前記基板の上に静電気保護素子を搭載して前記基材に導通させ、前記静電気保護素子の上に前記半導体発光素子をp側及びn側の電極が逆極性となる関係として搭載接合してなる請求項1から3のいずれかに記載の半導体発光装置。 4. A is conducted to the substrate by mounting the electrostatic protection element on the substrate, as the semiconductor light-emitting element is p-side and n-side electrodes become opposite polarity relationship on the electrostatic protection element the semiconductor light emitting device according to claim 1 comprising incorporating junction 3.
  5. 【請求項5】 請求項1〜4のいずれかに記載の半導体発光装置の製造方法であって、前記p側及びn側の電極を搭載面側の対応する電極に対して300〜350℃の温度雰囲気で加熱圧着して半導体発光素子を搭載面に接合する半導体発光装置の製造方法。 5. A method for manufacturing a semiconductor light emitting device according to any one of claims 1 to 4, of 300 to 350 ° C. The electrodes of the p-side and n-side with respect to the corresponding electrode of the mounting surface the method of manufacturing a semiconductor light-emitting device for bonding the semiconductor light-emitting device on the mounting surface by thermocompression bonding at a temperature atmosphere.
JP2179998A 1998-02-03 1998-02-03 Semiconductor light-emitting device Expired - Fee Related JP3708319B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2179998A JP3708319B2 (en) 1998-02-03 1998-02-03 Semiconductor light-emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2179998A JP3708319B2 (en) 1998-02-03 1998-02-03 Semiconductor light-emitting device

Publications (2)

Publication Number Publication Date
JPH11220167A true true JPH11220167A (en) 1999-08-10
JP3708319B2 JP3708319B2 (en) 2005-10-19

Family

ID=12065111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2179998A Expired - Fee Related JP3708319B2 (en) 1998-02-03 1998-02-03 Semiconductor light-emitting device

Country Status (1)

Country Link
JP (1) JP3708319B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6831305B2 (en) 2001-04-23 2004-12-14 Toyoda Gosei Co., Ltd. Semiconductor light-emitting device
WO2005091391A1 (en) * 2004-03-18 2005-09-29 Showa Denko K.K. Group iii nitride semiconductor light-emitting device and method of producing the same
JP2007535823A (en) * 2004-04-28 2007-12-06 クリー インコーポレイテッドCree Inc. Method for producing a Led bonding structure and led bonding structure
KR100845855B1 (en) 2006-12-07 2008-07-14 엘지전자 주식회사 LED package and method for making the same
WO2009057983A3 (en) * 2007-11-01 2009-08-06 Lg Innotek Co Ltd Light emitting device package and method for fabricating the same
US7671464B2 (en) 2003-01-30 2010-03-02 Panasonic Corporation Lighting device having a lighting unit with an optical semiconductor bare chip mounted on printed wiring board
US8017967B2 (en) 2004-09-09 2011-09-13 Toyoda Gosei Co., Ltd. Light-emitting element including a fusion-bonding portion on contact electrodes
JP2015053521A (en) * 2009-03-04 2015-03-19 フィリップス ルミレッズ ライティング カンパニー リミテッド ライアビリティ カンパニー Device using compliant bonding structure

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6831305B2 (en) 2001-04-23 2004-12-14 Toyoda Gosei Co., Ltd. Semiconductor light-emitting device
US7671464B2 (en) 2003-01-30 2010-03-02 Panasonic Corporation Lighting device having a lighting unit with an optical semiconductor bare chip mounted on printed wiring board
WO2005091391A1 (en) * 2004-03-18 2005-09-29 Showa Denko K.K. Group iii nitride semiconductor light-emitting device and method of producing the same
US7495261B2 (en) 2004-03-18 2009-02-24 Showa Denko K.K. Group III nitride semiconductor light-emitting device and method of producing the same
JP2007535823A (en) * 2004-04-28 2007-12-06 クリー インコーポレイテッドCree Inc. Method for producing a Led bonding structure and led bonding structure
US8076670B2 (en) 2004-04-28 2011-12-13 Cree, Inc. LED with conductively joined bonding structure
US8017967B2 (en) 2004-09-09 2011-09-13 Toyoda Gosei Co., Ltd. Light-emitting element including a fusion-bonding portion on contact electrodes
KR100845855B1 (en) 2006-12-07 2008-07-14 엘지전자 주식회사 LED package and method for making the same
WO2009057983A3 (en) * 2007-11-01 2009-08-06 Lg Innotek Co Ltd Light emitting device package and method for fabricating the same
US8217416B2 (en) 2007-11-01 2012-07-10 Lg Innotek Co., Ltd. Light emitting device package and method for fabricating the same
JP2015053521A (en) * 2009-03-04 2015-03-19 フィリップス ルミレッズ ライティング カンパニー リミテッド ライアビリティ カンパニー Device using compliant bonding structure

Also Published As

Publication number Publication date Type
JP3708319B2 (en) 2005-10-19 grant

Similar Documents

Publication Publication Date Title
US6333522B1 (en) Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor
US7211832B2 (en) Light emitting apparatus
US5798536A (en) Light-emitting semiconductor device and method for manufacturing the same
US6319778B1 (en) Method of making light emitting diode
US5990497A (en) Semiconductor light emitting element, semiconductor light emitting device using same element
US20060049335A1 (en) Solid state device and light-emitting element
US20070228386A1 (en) Wire-bonding free packaging structure of light emitted diode
US4663652A (en) Package for optical device
US20050280017A1 (en) Semiconductor light emitting device and semiconductor light emitting unit
US7348212B2 (en) Interconnects for semiconductor light emitting devices
US7692259B2 (en) Solid-state element device
US20060001035A1 (en) Light emitting element and method of making same
US20060049423A1 (en) Light-emitting device
US20070096130A1 (en) LED Assembly Having Maximum Metal Support for Laser Lift-Off of Growth Substrate
US7462861B2 (en) LED bonding structures and methods of fabricating LED bonding structures
US20070278511A1 (en) Light-Emitting Device Manufacturing Method and Light-Emitting Device
US6614058B2 (en) Light emitting semiconductor device with a surface-mounted and flip-chip package structure
US20120104426A1 (en) White ceramic led package
US20080116591A1 (en) Semiconductor device and method for manufacturing same
US20090321778A1 (en) Flip-chip light emitting diode and method for fabricating the same
US20100038662A1 (en) Light emitting device and production method of same
KR100891761B1 (en) Semiconductor light emitting device, manufacturing method thereof and semiconductor light emitting device package using the same
US20070126016A1 (en) Light emitting device and manufacture method thereof
JP2006128710A (en) Package-integrated thin-film led
US20050211997A1 (en) Solid-state element and solid-state element device

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20040527

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050322

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050520

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20050627

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050712

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050803

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080812

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090812

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090812

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100812

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110812

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110812

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120812

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130812

Year of fee payment: 8

LAPS Cancellation because of no payment of annual fees