JPH11215821A - Switching circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching circuit which can reduce the quantity of generated heat of a capacitor at the time of discharge of a buffer circuit, when the switching circuit is equipped with a buffer circuit. SOLUTION: This switching circuit is equipped with a buffer circuit for removing spike-form noise voltage which arises at off of the switch element Q1 provided in series to the inductor constituting the primary side of a transformer T1. In this case, this switching circuit is provided with a buffer circuit 1 where a part of a discharge circuit where a first diode D1 and a first resistor R1 are connected in series and a part of a discharge circuit where a second diode D2 and a second resistor R2 are connected in series are connected with each other in parallel and also a part of the charge circuit and a part of the discharge circuit connected in parallel are connected in series to a capacitor c1 in series, and this is arranged so that the time constant of the above discharge circuit may be larger than the time constant of the above charge circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching circuit having a buffer circuit for removing a spike-like noise voltage generated when a switching element provided in series with an inductor is turned off, such as a switching circuit of a switching power supply circuit. In particular, the present invention relates to a switching circuit capable of reducing heat generation in a capacitor of a buffer circuit.

[0002]

2. Description of the Related Art As an example of a conventional switching circuit provided with a buffer (snubber) circuit, there is a switching power supply circuit as shown in FIG. As shown in FIG. 1, the conventional switching power supply circuit includes a transformer T1.
A switching element Q11 is provided in series with the inductor forming the primary side winding, and a buffer circuit in which a resistor R11 and a capacitor C11 are connected in series is connected in parallel to the switching element Q11. FIG. 7A shows the operation of the switching power supply circuit thus configured.
This will be described with reference to FIGS. FIG. 7A shows the collector-emitter voltage Vc of the switching element Q11.
e, FIG. 7 (b) shows current I1 flowing through switching element Q11, FIG. 7 (c) shows charge / discharge current I2 flowing through buffer circuit,
FIG. 7D shows a capacitor C1 based on the charge / discharge current I2.
7 shows the power loss (power consumption) at the internal resistance ESR of FIG. 7, and FIG. 7E shows the switching loss of the switching element Q11. As shown in FIG. 6, the switching element Q11 has High at a predetermined cycle (for example, 10 μs).
A pulse train that repeats the level and the low level is input,
When the switching element Q11 is turned off by the low level input, as shown in FIG. 7A, the collector-emitter voltage Vce of the switching element Q11 becomes
The value reaches V1 (for example, 300 V: a higher voltage if there is no buffer circuit), and this voltage V1 causes a charging current I2a to flow into the buffer circuit. As shown in FIG.
If a high dielectric ceramic capacitor of F is used, its internal resistance ESR is about 80Ω, and the charging current I2a
Can be expressed as I2a = V1 / (R11 + ESR), so that the voltage V1 is 300 V and R11 is 100
Ω and ESR are 80Ω, the charging current I2a is 1.6
A (peak).

The power loss in the internal resistance ESR of the capacitor C11 due to the charging current is the charging current I2 ² × E
As described above, the power loss due to the charging current of 1.6 A is 205 W (peak) (see FIG. 7D), and the switching loss of the switching element Q11 is P
It becomes 1. The spike voltage V1 is, for example, 1 μs
And the collector-emitter voltage Vce of the switching element Q11 becomes V2 (for example, 200 V (= Vin + V
out × n1 / n2)) (see FIG. 7A),
The buffer circuit is discharged. This discharge current I2b (=
(V1-V2) / (R11 + ESR)) is, for example, 0.5
The peak is 6A (see FIG. 7C), and the power loss in the capacitor C11 is 25 W (peak) (see FIG. 7D). Then, the switching element Q1
1 is turned on, the switching element Q11
Through the buffer circuit. The discharge current I2c (=
V2 / (R11 + ESR)) is, for example, a 1.1 A peak (see FIG. 7C), and the capacitor C11
Is 97 W (peak) (FIG. 7).
(D)). The power loss P2 substantially equal to P1 occurs in the switching element Q11 due to the discharge current I2c. In FIG. 7, ta, tb,
tc is a time constant.

[0004]

As described above, the charge and discharge of the buffer circuit generated by the switching of the switching element Q11 causes power loss in the capacitors and resistors in the buffer circuit and in the switching elements. When the switching frequency increases or the capacitance of the capacitor increases, the power loss increases and the buffer circuit generates heat.However, since the capacitor has a low rated temperature, the operation tends to be unstable, It is also unfavorable that the power consumption increases. The object of the present invention is to solve the problems of the prior art as described above,
It is an object of the present invention to provide a switching circuit including a buffer circuit, which can reduce power loss of a switching element and the amount of heat generated by a capacitor when the buffer circuit is discharged.

[0005]

According to a first aspect of the present invention, there is provided a buffer circuit for removing a spike noise voltage generated when a switching element provided in series with an inductor is turned off. In the switching circuit provided with the above, a part of the charging circuit and a part of the discharging circuit are separately provided in the buffer circuit, and the time constant of the discharging circuit is larger than the time constant of the charging circuit. Further, in the invention described in claim 2, in the above, a part of the charging circuit formed by connecting the first diode and the first resistor in series, and the second diode and the second resistor are connected. A buffer circuit is provided in which a part of the discharging circuit connected in series is connected in parallel, and a part of the power receiving circuit and a part of the discharging circuit connected in parallel are connected in series to a capacitor. According to a third aspect of the present invention, in the first aspect of the present invention, a part of the charging circuit including the first diode and one of the discharging circuits including the second diode and the resistor connected in series. And a buffer circuit in which a part of the power receiving circuit and a part of the discharging circuit connected in parallel are connected in series to a capacitor. In the invention according to claim 4,
According to the first aspect of the present invention, there is provided a buffer circuit in which a circuit in which a diode and a resistor are connected in parallel is connected in series to a capacitor. According to a fifth aspect of the present invention, in the first aspect of the present invention, a circuit in which a diode and a first resistor are connected in series and a second resistor is connected in parallel is connected in series with a capacitor. Was provided with a buffer circuit.

[0006]

According to the first aspect of the present invention, when charging the buffer circuit for removing the spike noise voltage, the buffer circuit is charged with a small time constant, and the buffer circuit is discharged. The current decreases. According to the second aspect of the invention, the operation of the first aspect of the invention can be realized by adding two diodes and one resistor. According to the third aspect of the present invention, the operation of the first aspect of the present invention can be realized only by adding two diodes. According to the fourth aspect of the invention, the operation of the first aspect of the invention can be realized only by adding one diode. According to the fifth aspect of the invention, the operation of the first aspect of the invention can be realized only by adding one diode and two resistors.

[0007]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a circuit diagram of a switching power supply circuit showing a first embodiment of the present invention. As shown in the figure, the switching power supply circuit includes one of the transformers T1.
A switching element Q1 is provided in series with the inductor constituting the secondary winding, and a buffer (snubber) circuit 1 is provided in parallel with the switching element Q1. Further, as shown in the drawing, the buffer circuit 1 includes a part of a charging circuit in which a first diode D1 and a first resistor R1 are connected in series, and a part of the charging circuit includes a second diode D2 and a second resistor R2. Are connected in parallel to a part of a discharging circuit connected in series, and a part of the charging circuit and a part of the discharging circuit connected in parallel are connected in series to a capacitor C1. The resistance value of the resistor R1 is, for example, 100Ω, the resistance value of the resistor R2 is 1 kΩ, and the capacitance of the capacitor C1 is 10Ω.
00 pF. Hereinafter, according to the explanatory diagram shown in FIG.
The operation of this embodiment will be described. FIG. 2A shows the collector-emitter voltage Vce of the switching element Q1,
FIG. 2B shows a current I1 flowing through the switching element Q1,
FIG. 2C shows the charging / discharging current I2 flowing through the buffer circuit.
FIG. 2D shows a power loss (power consumption) in the internal resistance ESR of the capacitor C1 due to the charge / discharge current I2, and FIG.
(E) shows the switching loss of the switching element Q1.

As shown in FIG. 1, the switching element Q
1 receives a pulse train that repeatedly switches between a high level and a low level at a predetermined cycle (for example, 10 μs). When the switching element Q1 is turned off at the timing of t0 due to the input of the low level, FIG. As shown, the voltage Vce between the collector and the emitter of the switching element Q1 has a value of approximately 0 V to V1 (for example, 300 V).
V: higher voltage without buffer circuit). The voltage V1 causes the diode D1
And a charging current of I2a (for example, 1.6 A peak (= V1 / (R1 + ESR))) flows into the buffer circuit 1 via the resistor R1 (time constant: ta = C1 × (R1 + ES).
R)). The power loss in the internal resistance ESR of the capacitor C1 due to the charging current is as follows:
Assuming 0Ω, 205W (peak) (see FIG. 2 (d)),
The switching loss of the switching element Q1 is P1a. The switching loss P1a is the same as the switching loss P1 of the conventional technology.

The spike voltage V1 is, for example, 1 μm.
s (at timing t2), the switching element Q
1 is V2 (for example, 2
When the voltage becomes 00V (= Vin + Vout × n1 / n2) (see FIG. 2A), the buffer circuit 1 enters a discharging state, and a discharging current flows through the resistor R2 and the diode D2. This discharge current I2d (= (V1-V2) / (R2 +
ESR)) is, for example, a 0.09 A peak (time constant:
tb = C1 × (R2 + ESR)) (see FIG. 2 (c)),
This results in a power loss of 0.65 in capacitor C1.
W (peak) (see FIG. 2D). The reason why the discharge current is smaller than that of the prior art buffer circuit is that the resistance value of the resistor R2 is smaller than that of the prior art resistor R11.
Because it is much larger than the resistance value. Timing t
3, after the discharge substantially converges, the switching element Q1 is turned on at the timing t4, and when Vce becomes almost 0 V, the buffer circuit 1 is now switched through the switching element Q1.
Discharges. The discharge current I2e (= V2 / (R2 + E
SR)) is, for example, a 0.19 A peak (time constant: t
c = C1 × (R2 + ESR)) (see FIG. 2 (c)), whereby the power loss in the capacitor C1 is 2.9W.
(Peak) (see FIG. 2D). The reason why the discharge current I2e is smaller than that of the conventional buffer circuit is that the resistance value of the resistor R2 is much larger than the resistance value of the resistor R11 used in the conventional buffer circuit. This is because the time constant of the discharging circuit including the diode D2 and the resistor R2 is larger than the time constant of the charging circuit including the diode D1 and the resistor R1. The switching element Q1 generates a power loss of P2a mainly due to the discharge current I2e.
a is about 1/6 (0.1%) of the power loss P2 in the case of the prior art.
9A / 1.1A). Thereafter, the switching element Q
The state after the discharge is maintained until timing t6 when 1 is turned off, and thereafter, the operation from t0 to t6 is repeated.

As described above, the switching element Q
1 and the power loss in the capacitor C1 are reduced,
The power loss of the entire buffer circuit 1 is not reduced. This is because, even if the discharge current decreases, the duration of the discharge increases as the time constant increases. When the charge voltage is V, the heat loss (power loss) is CV2 / 2. However, since the resistance value of the resistor R2 is much larger than the resistance value of the internal resistance ESR of the capacitor, of the heat loss generated in the internal resistance ESR of the capacitor and the resistor R2, the resistance value of the internal resistance of the capacitor The heat loss is very low. Further, in the discharge of the buffer circuit when the switching element Q1 is turned on, heat loss (power loss) also occurs in the switching element Q1. However, since the internal resistance of the switching element Q1 is small, the heat loss here also becomes small. . As described above, according to this embodiment, the discharge current of the buffer circuit is reduced by setting the resistance value of the resistor R2 to several times to several tens times the resistance value of the resistor R11 constituting the conventional buffer circuit. Thus, power loss in the switching element Q1 can be reduced, and the amount of heat generated in the capacitor C1 of the buffer circuit 1 can be reduced. Further, since the time constant at the time of charging the buffer circuit is the same as the conventional one, the effect of removing the spike noise voltage can be maintained as before.

FIG. 3 is a diagram showing a second embodiment of the buffer circuit. A switching circuit is constructed using this buffer circuit in place of the buffer circuit 1 shown in FIG. As shown, the buffer circuit of this embodiment has a configuration in which the resistor R1 is removed from the buffer circuit shown in the first embodiment (see FIG. 1). In this buffer circuit, the diode D1 and the capacitor C1a form a charging circuit, and their internal resistance becomes the resistance forming the charging circuit. That is, the internal resistance of the diode D1 and the capacitor C1a is used instead of the resistance R1 shown in FIG. Since the internal resistance has a small resistance value, the second embodiment is suitable when the switching frequency is high. Thus, according to this embodiment, by setting the resistance value of the resistor R2a constituting the discharging circuit to be substantially the same as the resistance R2 shown in FIG. 1, the time constant of the discharging circuit is larger than the time constant of the charging circuit. And 2 compared to the prior art
The effect similar to that of the first embodiment can be realized only by adding the diodes.

FIG. 4 is a diagram showing a third embodiment of the buffer circuit, which forms a switching circuit in place of the buffer circuit 1 shown in FIG. As shown, the buffer circuit of this embodiment is different from the buffer circuit of the second embodiment (see FIG. 3).
Further, the configuration does not include the diode D2. In this buffer circuit, a parallel circuit of a diode D1 and a resistor R2a and a capacitor C1a constitute a charging circuit.
Since the internal resistance of the diode D1 is much smaller than the resistance of the resistor R2a, the resistance constituting the charging circuit is substantially the same as that of the second embodiment. Thus, according to this embodiment, the same effect as in the first embodiment can be realized only by adding one diode as compared with the prior art. FIG. 5 is a diagram showing a fourth embodiment of the buffer circuit. As shown, the buffer circuit of this embodiment is different from the buffer circuit of the first embodiment (see FIG. 1) in that the diode D
2 is excluded. In this buffer circuit, the resistor R1
b and the resistor R2b become the resistance value at the time of charging, and the resistance value of the resistor R2b becomes the resistance value at the time of discharging. The constant can be larger than the time constant of the charging circuit. Thus, according to this embodiment, the same effect as in the first embodiment can be realized only by adding one diode and one resistor as compared with the prior art.

[0013]

As described above, according to the present invention,
According to the first aspect of the present invention, the buffer circuit for removing the spike noise voltage is charged with a small time constant and the discharge current of the buffer circuit is reduced.
The spike noise voltage can be removed as in the prior art, the amount of heat generated in the capacitor in the buffer circuit can be reduced, and the switching loss of the switching element can be reduced. Claim 2
In the invention described in the above, the effect of the invention described in the first aspect can be realized by adding two diodes and one resistor, so that the effect of the invention described in the first aspect can be achieved with a slight increase in cost. Can be realized. Claim 3
In the invention described in the above, the effect of the invention described in the first aspect can be realized only by adding two diodes, so that the effect of the first aspect of the invention can be realized with a slight increase in cost. it can. According to the fourth aspect of the present invention, the operation of the first aspect of the present invention can be realized by adding only one diode. The effect can be realized. In the invention according to claim 5,
Since the operation of the invention described in claim 1 can be realized only by adding one diode and two resistors,
Similarly, the effect of the invention described in claim 1 can be realized with a slight increase in cost.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a switching power supply circuit showing a first embodiment of the present invention.

FIGS. 2A to 2E are explanatory diagrams of a main part of a switching power supply circuit according to a first embodiment of the present invention.

FIG. 3 is a circuit diagram of a main part of a switching power supply circuit according to a second embodiment of the present invention.

FIG. 4 is a circuit diagram of a main part of a switching power supply circuit according to a third embodiment of the present invention.

FIG. 5 is a circuit diagram of a main part of a switching power supply circuit according to a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram of a switching power supply circuit showing an example of the related art.

FIGS. 7A to 7E are explanatory diagrams of a main part of a switching power supply circuit showing an example of a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Buffer circuit Q1 Switching element D1 First diode D2 Second diode R1 First resistor R2 Second resistor C1 Capacitor T1 Transformer

Claims (5)

[Claims] 1. A switching circuit comprising a buffer circuit for removing a spike-like noise voltage generated when a switching element provided in series with an inductor is turned off.
A switching circuit, wherein a part of a charging circuit and a part of a discharging circuit are separately provided in a buffer circuit, and a time constant of the discharging circuit is larger than a time constant of the charging circuit. 2. The switching circuit according to claim 1, wherein
A part of a charging circuit formed by connecting a first diode and a first resistor in series, and a part of a discharging circuit formed by connecting a second diode and a second resistor in series A switching circuit, comprising: a buffer circuit connected in parallel, and a part of the power receiving circuit and a part of the discharging circuit connected in parallel connected in series to a capacitor. 3. The switching circuit according to claim 1, wherein
A part of the charging circuit composed of the first diode and a part of the discharging circuit composed of the second diode and the resistor connected in series are connected in parallel, and one part of the power receiving circuit connected in parallel is connected. A switching circuit comprising a buffer circuit in which a part and a part of a discharge circuit are connected in series to a capacitor. 4. The switching circuit according to claim 1, wherein
A switching circuit comprising a buffer circuit in which a circuit in which a diode and a resistor are connected in parallel is connected in series to a capacitor. 5. The switching circuit according to claim 1, wherein
A switching circuit, comprising: a circuit in which a diode and a first resistor are connected in series; and a buffer circuit in which a circuit in which a second resistor is connected in parallel to a capacitor is connected in series to a capacitor.