JPH11215272A - Image processing unit and image processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processing unit and image processing method where different image data received in parallel are efficiently processed and the configuration of the unit is simplified. SOLUTION: A digital composite unit acquires an image signal from a host computer interface 106, an NCU 107 and a CCD 114. Processing such as shading correction is applied to the image signal, to which a header information is added by either one of header addition circuits 105, 109, 117. A header analysis circuit 118 analyzes the header information. According to the result of analysis, an image processing circuit 111 applies proper image processing to respective image data, that is, print image data, FAX image data or copy image data. Then the processed image data are stored in each area for the respective image data in an image memory 112 and transferred to a printer unit 113 for an image formation.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus and an image processing method for handling digital image data, and more particularly to an image processing apparatus and an image processing apparatus having a plurality of functions such as a copying function, a facsimile function, and a printing function. About the method.

[0002]

2. Description of the Related Art In recent years, in an image processing apparatus such as a digital copying machine, not only a simple copying function but also a printing function,
A so-called digital multifunction peripheral having a facsimile function has been developed. Since such a digital multifunction peripheral is a device that performs digital image processing, it is easy to add the above-mentioned plurality of functions, and by performing a plurality of functions by one unit, there are advantages such as space saving and work efficiency. doing.

[0003] In the case of a digital multifunction peripheral, image processing is generally performed by a digital processing unit dedicated to image processing, and high-speed processing such as several tens of output images per minute can be performed. .

[0004]

However, the above-described digital processing unit dedicated to image processing is designed on the premise of processing continuous image signals in order to realize high-speed processing, and performs a plurality of different image processing in parallel. It was low in versatility in terms of executing it.

More specifically, FIG. 5 shows the format of an image signal of a digital arithmetic processing unit dedicated to image processing.
(A) shows a column of data representing each pixel. In the figure, each pixel has an information amount of 8 bits and is expressed as a signal synchronized with an image clock. FIG.
(B) shows line data having a certain length, which is formed by connecting individual pixels. FIG. 5C shows the format of an image signal in which individual line data is repeated at exactly the same length and at the same timing.

[0006] Such an image signal is a signal system independent of a control signal of a central processing unit (hereinafter referred to as "CPU"), and is not directly synchronized with a control program of the CPU. In order to execute a plurality of functions in parallel, it is necessary for the CPU to intervene for each pixel and each line data to change the setting of various parameters related to the image processing. The line data is repeated at a very fast cycle of, for example, about 400 microseconds. Therefore, before the image processing of one page is started, necessary settings are completed in advance, and the data is actually image-processed. Between, CP
U usually did not participate in the processing itself.

For this reason, when the above-described multifunction peripheral is configured, it is difficult to simultaneously process a plurality of functions in parallel, and the frequency and detail of controllable image processing settings are limited. As a result, As a result, processing can be switched only in large job units such as one page.

In order to avoid this and simultaneously process a plurality of functions smoothly and in parallel, it is necessary to prepare a plurality of similar circuits, resulting in a complicated and expensive device configuration.

The present invention has been made in view of the above points, and an image processing apparatus capable of efficiently processing mutually different image data input in parallel and simplifying the apparatus configuration. And an image processing method.

[0010]

According to a first aspect of the present invention, there is provided an image processing apparatus comprising: a first input unit for inputting first image data; and an input unit for inputting the first image data. A second input unit for inputting second image data; an adding unit for adding attribute data representing respective attributes to the input first image data and second image data; Multiplexing means for multiplexing the first image data and the second image data; and multiplexing the first image data and the second image data based on each attribute data of the multiplexed first image data and the second image data. Analyzing means for analyzing each attribute; performing first image processing on the multiplexed first image data in accordance with each of the analyzed attributes; Characterized in that it comprises with respect to which the second image data and an image processing means for executing the second image processing.

According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the adding means divides the input first image data and the second image data into a plurality of blocks, respectively. Is characterized by adding attribute data to the.

According to a third aspect of the present invention, in the image processing apparatus according to the first or second aspect, the multiplexing means performs time division on the first image data and the second image data each having the attribute data added thereto. Multiplexed.

According to a fourth aspect of the present invention, in the image processing apparatus according to any one of the first to third aspects, the image processing means performs the first image processing or the first image processing in accordance with the analyzed attribute. A feature is that two-image processing is selected.

According to a fifth aspect of the present invention, in the image processing apparatus according to any one of the first to fourth aspects, the image processing means includes a first image data and a second image data which have been subjected to image processing. Is stored in a predetermined area.

According to a sixth aspect of the present invention, in the image processing apparatus of the fifth aspect, the image processing means is configured to execute the first image processing in accordance with the analyzed attribute.
The image processing apparatus further includes a control unit that controls the image data and the second image data to be stored in predetermined areas of the storage unit.

According to a seventh aspect of the present invention, there is provided an image processing method comprising: a first input step of inputting first image data; a second input step of inputting second image data in parallel with the input of the first image data; An adding step of adding attribute data representing respective attributes to the input first image data and second image data;
A multiplexing step of multiplexing the first image data and the second image data to which the attribute data is respectively added, and a multiplexing step of the multiplexed first image data and the second image data.
An analyzing step of analyzing each attribute of the first image data and the second image data based on each attribute data of the image data; and the multiplexed first image data according to each analyzed attribute. Performing a first image process on the multiplexed second image data, and performing a second image process on the multiplexed second image data.

According to an eighth aspect of the present invention, in the image processing method of the seventh aspect, in the adding step, the input first image data and the second image data are each divided into a plurality of blocks, Is characterized by adding attribute data to the.

According to a ninth aspect of the present invention, in the image processing method of the seventh or eighth aspect, in the multiplexing step, the first image data and the second image data each having the attribute data added thereto are time-divided. Multiplexed.

According to a tenth aspect of the present invention, in the image processing method according to any one of the seventh to ninth aspects, in the image processing step, the first processing is performed according to the analyzed attribute.
Image processing or second image processing is selected.

According to an eleventh aspect of the present invention, in the image processing method according to any one of the seventh to tenth aspects, the image processing step comprises the steps of: Is stored in a predetermined area.

According to a twelfth aspect of the present invention, there is provided the image processing method according to the eleventh aspect.
In the image processing method described above, the image processing step controls the first image data and the second image data on which the image processing has been executed to be stored in predetermined areas according to the analyzed attribute. It is characterized by including a control step of performing.

[0022]

FIG. 1 shows a circuit configuration of an image processing apparatus according to an embodiment of the present invention. An image processing apparatus according to an embodiment of the present invention is configured by a digital multifunction peripheral.

This digital multifunction peripheral has a CPU 101 for controlling each component of the digital multifunction peripheral described later, a RAM 102 having a work area necessary for the operation of a control program and storing various data, a control program and a font. A ROM 103 for storing data and the like.

The digital multi-function peripheral further includes a print image memory 104 for storing image data, a header addition circuit 105 (addition means) for adding a header to the head of the image data read from the print image memory 104, and a host. A host computer interface 106 for transmitting and receiving data to and from the computer 150 (first input means,
A second input unit) and a network control unit (hereinafter referred to as “NCU”) 107 for controlling transmission and reception of data to and from the network via the public line 160 (first input unit;
A second input means) and an encoding and decoding circuit (hereinafter referred to as a "CODEC circuit") for encoding and decoding data.
108 and the fax output from the CODEC circuit 108
Header addition circuit 1 for adding a header to the head of image data
09 (addition means).

Further, the digital multi-function peripheral outputs a multiplexer 110 (multiplexing means) for outputting the input image data in a time-division manner so as not to be overlapped, and converts the image data output from the multiplexer 110 into the image data. An image processing circuit 111 (image processing means) for performing image processing in accordance with the image data; an image memory 112 (image processing means, storage means) for storing image-processed image data; And a printer unit 113 that forms an image based on the image.

The digital multi-function peripheral also has a CCD 114 (first input means, second input means) which is an image sensor for optically reading an original, and an A / D for converting an image signal read by the CCD 114 into a digital signal. The converter 115, a shading circuit 116 for performing shading correction on the image data, a header adding circuit 117 (adding means) for adding a header to the head of the copied image data output from the shading circuit 116, and an output from the multiplexer 110. Header analyzing circuit 118 (analyzing means) for analyzing header information as identification data for identifying an attribute (source) of image data to be read, and a memory control circuit 119 for storing image-processed image data in the image memory 112. (Image processing means, control means).

Further, a solid line in FIG. 1 mainly indicates a path through which an image signal and a control signal accompanying the image signal flow, and a broken line in FIG. 1 mainly indicates a path of a register or memory access performed by the CPU 101.

The digital multifunction peripheral has three basic functions, which are roughly classified into a print function, a facsimile function, and a copy function. Hereinafter, processing of the digital multi-function peripheral when each function is performed will be described.

First, the printing function is to analyze the code data for printing sent from the host computer 150 to generate a print image and perform an image forming process.

The digital multi-function peripheral is a host computer 1
The code data is received from 50 via the host computer interface 106. The received code data is temporarily stored in the RAM 102, and the CPU 101 analyzes the code data according to a predetermined program, and generates print image data including a bit map image in a print state. The generated print image data is stored in the print image memory 104.
Is stored in

When a predetermined amount of print image data is stored in the print image memory 104, the CPU 101 sets a header for the print image to the header addition circuit 105 and instructs the start of image transfer.

The header adding circuit 105 transfers the contents of the print image memory 104 to the multiplexer 110 while adding the header information of FIG. 2 described later set by the CPU 101 to the head of a continuous block of print image data. In the multiplexer 110, the image processing circuit 11
1 and the print image data with the header to the header analysis circuit 118.

The header analysis circuit 118 analyzes the header information, determines in this case that the image is a print image, and passes a determination signal to the image processing circuit 111 and the memory control circuit 119. The image processing circuit 111 receives the determination result of the header analysis circuit 118, and is suitable for print output of print image data excluding a header portion based on a print image setting from a plurality of settings specified in advance. Image processing such as smoothing, and sends the print image data without the header to the image memory 112.

The memory control circuit 119 includes a header analysis circuit 1
In response to the determination result of 18, the operation of storing the print image data processed by the image processing circuit 111 in the print image data area of the storage area preset on the image memory 112 is performed. Thereafter, the memory control circuit 119 transfers the print image data from the image memory 112 to the printer unit 113 and forms an image, thereby completing this processing.

Next, among the facsimile functions, the processing of the digital multifunction peripheral at the time of facsimile reception will be described.

First, after receiving a facsimile call through the NCU 107, the CPU 101 receives facsimile data according to a predetermined procedure according to a control program. Next, the FAX data received by the CODEC circuit 108 is decrypted to return to the original FAX image data composed of a bitmap image. This fax image data is stored in the CPU 1 in advance.
The header information for FAX image data set in step S 01 is added by the header adding circuit 109 and transferred to the multiplexer 110. The multiplexer 110 transfers FAX image data with a header to the image processing circuit 111 and the header analysis circuit 118.

The header analysis circuit 118 analyzes the header information, determines in this case that the image is a facsimile image, and passes a determination signal to the image processing circuit 111 and the memory control circuit 119.
The image processing circuit 111 receives the determination result of the header analysis circuit 118, performs image processing such as smoothing suitable for facsimile output on the facsimile image data by setting for the facsimile image, and sends the facsimile except the header to the image memory 112. Send image data.

The memory control circuit 119 includes a header analysis circuit 1
In response to the result of the determination at 18, the operation of storing the FAX image data processed by the image processing circuit 111 in the FAX image data area of the storage area preset on the image memory 112 is performed. After that, the memory control circuit 1
Reference numeral 19 transfers the FAX image data from the image memory 112 to the printer unit 113, and completes the processing by forming an image.

Next, a description will be given of the processing of the digital multi-function peripheral at the time of the copy function.

First, the CCD 114 optically scans the original to obtain an electric signal representing an image signal, and the A / D converter 115 converts the electric signal into a digital signal.
Next, a shading circuit 116 is added to this digital signal.
Is subjected to shading correction to become copy image data. To the copied image data, header information of FIG. 2 described later, which is set in advance by the CPU 101, is added by a header adding circuit 117, and the copied image data as a digital signal to which the header information is added is output by the multiplexer 11.
Transfer to 0.

The multiplexer 110 is connected to the image processing circuit 11
1 and the copied image data with a header to the header analysis circuit 118. The header analysis circuit 118 analyzes the header information, determines in this case that the image is a copy image, and passes a determination signal to the image processing circuit 111 and the memory control circuit 119.

The image processing circuit 111 includes a header analysis circuit 11
In response to the determination result of step 8, image processing such as smoothing suitable for copy output is performed on the copy image data by setting for the copy image, and the copy image data without the header is sent to the image memory 112.

The memory control circuit 119 includes a header analysis circuit 1
In response to the judgment result of 18, the operation of storing the copy image data processed by the image processing circuit 111 in the copy image data area of the storage area preset in the image memory 112 is performed. Thereafter, the memory control circuit 119
Transfers the copy image data from the image memory 112 to the printer unit 113 and forms an image, thereby completing this processing.

The processing of the digital multi-function peripheral in the three functions has been described above. Among the respective processing, the printer unit 113 transmits image data from the image memory 112 to the printer unit 113 and actually performs image formation. Since three different types of image formation cannot be performed at the same time, the processing can be switched only in units of one page. However, the processing of the three functions is performed simultaneously in parallel until the header information is added to the image data by each function. The process from the addition of the header information to the image data to the storage in the area for each function of the image memory 112 can be smoothly performed while switching the processing of the three functions.

FIG. 2 shows the structure of header information indicating various attributes of image data. The header information is composed of a plurality of byte strings. First, the header length byte indicates the size of the header, the image length indicates the size of the image data is 2 bytes, and any of a print image, a fax image, and a copy image. It has a structure including an image type information byte for identifying the image data, an image format byte indicating the format of the image data, a date information byte indicating date information, and a byte string to which other comments are added, thereby obtaining image information. be able to. In particular, by adding the image type information byte to the image data, the processing of the three functions can be performed simultaneously in parallel until the header information is added to each image data as described later. From the point where the header information is added to the point where each image data is stored in the image memory 112, the processing can be smoothly performed while switching the three functions.

FIG. 3 schematically shows a signal obtained by adding a header to each of print image data, FAX image data and copy image data, and further multiplexing these three image data by the multiplexer 110. FIG.

FIG. 3A shows an image clock which is a synchronizing signal of individual image data, and FIG. 3B shows a column of data representing individual pixels. Each pixel has 8 bits per pixel. It is represented as a signal having an information amount and synchronized with the image clock. FIG. 3C shows that individual pixels are connected to form line data having a certain length, and shows a state before header information is added by a header adding circuit. Line data is repeated in accordance with the signal cycle.

FIG. 3D shows a header (oblique line information in the figure) of the print image data by the header adding circuit 105.
FIG. 9 is a diagram schematically illustrating a state of image data after adding “.”. Within one line divided by the line synchronization signal, one line of image data is divided into a plurality of pieces, and there are a plurality of data blocks each having a header added thereto. FIG.
Regarding the conversion from (C) to FIG. 3 (D), the frequency of the image clock is increased without lowering the input speed of the image data and increasing the frequency of the image clock in order to increase the amount of data that can be handled in one line. There are many non-image sections. The data amount of the block of image data to which the header is added may be constant or may be a variable amount as shown in the figure.

FIGS. 3E and 3F show FAX image data and copy image data that have passed through header addition circuits 109 and 117, respectively. FIG. 3G shows three images to which header information has been added. The state of a signal in which data is combined into one signal by the multiplexer 110 is shown.

Here, all three image data have been described as operating in line synchronization. However, the processed image data is temporarily stored in the image memory 112, and is transferred to the printer 113 by the image memory 112. Since it can be output as a line synchronization signal, the image memory 1
It is not always necessary to adopt a configuration in which the operation up to 12 is performed based on the line synchronization signal.

FIG. 4 is a diagram showing the configuration of the image processing circuit 111. The image processing circuit 111 includes the multiplexer 1
CC for the image data with header output from
Image reading characteristics by D114 and printer unit 1
13, a look-up table (hereinafter referred to as "LUT") 501 for performing gamma conversion for matching image recording characteristics, a binarization circuit 502 for binarizing other-value image data, and a FAX A parallel / serial conversion circuit 503 for returning image data and print image data sent in parallel data in units of 8 pixels to 1-bit data in units of pixels, and a binarization circuit 50
A selector 504 for selecting either the copy image data binarized by 2 or the binary data parallel / serial converted by the parallel / serial conversion circuit 503
And by detecting the arrangement of the dots in the pixel data,
A smoothing circuit 505 for smoothing image data so as to reduce jaggies such as oblique lines.

The operations of the selector circuit 504 and the smoothing circuit 505 include three types of signals, that is, a copy image, a printer image, and a FAX image, which are signals obtained by analyzing the header added to each image data by the header analysis circuit 118. Control is performed by signals.

If the image data is a copy image, the output of the binarization circuit 502 is selected by the selector 504.
The output of the serial conversion circuit 503 is selected.

The image data is a print image or FA.
If the image is an X image, the image data selected by the selector 504 is subjected to a smoothing process by a smoothing circuit 505.

The smoothing circuit 505 can execute two kinds of processing, namely, a smoothing processing for a print image and a smoothing processing for a FAX image. The smoothing circuit 505 performs these processing depending on whether the image data is a print image or a FAX image. Switch.

When the image data is a copy image, the smoothing street 505 outputs the input image data without any processing.

The output image data of the smoothing circuit 505 is transferred to the image memory 11 under the control of the memory control circuit 119.
2 in a predetermined area.

As described above, the print image data, FA
Image processing corresponding to each of the three types of image data of the X image data and the copy image data can be processed while switching the image processing in units of small units, not in units of jobs. Therefore, the copying function can be executed in parallel. In addition, the same process is performed not on all three types of image data but on one or two types of image data.

In this embodiment, by using image data having header information as shown in FIG. 3 (G), individual processing can be performed for each data, and the length of one line is not necessarily required. It is also possible to perform processing by cutting a part of a line instead of the entire line, that is, processing for each pixel. This allows
Various processing can be performed for each pixel instead of for each page.

In the present embodiment, when the transmission function and the printing function of the FAX function are operated simultaneously, the print image is transmitted to the header adding circuit 10 as described above.
In step 5, the header information is added, and the print image data is stored in the image memory 112. On the other hand, the signal of the document image scanned by the CCD 114 is added with header information by a header adding circuit 117, and the image processing circuit 111 generates binary image data for facsimile transmission as scan image data. It is stored in the area for FAX transmission image data. Thereafter, the print image data is sent to the printer unit 113, and the facsimile transmission image data is read out by the CPU 101, encoded by the CODEC circuit 108, and sent to the public line 160 via the NCU 107.
And the processing is performed. As described above, even when the digital multi-function peripheral has a plurality of output destinations, processing can be performed in parallel by adding header information to image data.

As described above, in the present embodiment, the digital multifunction peripheral is connected to the host computer interface 10.
6, image signals are obtained from the NCU 107 and the CCD 114, and these image signals are subjected to processing such as shading correction, and are processed as header data by the header adding circuit 1 as image data.
05, 109 or 117, header analysis circuit 118 analyzes the header information, and in accordance with the analysis result, image processing circuit 111 causes each image data, that is, print image data and FAX image data. Or appropriate image processing is performed on the copied image data. Then, each image data subjected to the image processing is stored in an area for each image data on the image memory 112, and transferred to the printer unit 113 to form an image. in this way,
Up to the point where header information is added to each image data, the processing of the three functions can be performed simultaneously in parallel. From the point where header information is added to each image data to the point where each image data is stored in the image memory 112. Can smoothly execute processing while switching between the three functions. In addition, a plurality of image processing circuits 111, image memories 112, and the like are not required, and the device configuration can be simplified.

In this embodiment, as an example of image processing,
Although γ conversion, binarization, parallel / serial conversion, and smoothing processing have been described, the present invention is not limited to these processings.
Other processing such as scaling or rotation of the image may be performed, and the image processing range in the image processing circuit 111 can be changed for each image data by including the information of the size of the recording paper to be output in the header information.

In this embodiment, only one printer unit 113 is provided.
By preparing a plurality of 3 and including the output destination of the image data in the header information, the output destination of the image data can be determined.

Further, in the present embodiment, header information is added to image data, but footer information may be added to image data.

[0065]

As described above in detail, according to the image processing apparatus of the first aspect and the image processing method of the seventh aspect, the input first image data and the second image data represent respective attributes. Attribute data is added, the first image data and the second image data to which the attribute data are respectively added are multiplexed, and the first image data is multiplexed based on the attribute data of the multiplexed first image data and the second image data. The respective attributes of the data and the second image data are analyzed, and the first image processing is executed on the multiplexed first image data in accordance with the analyzed attributes, and the multiplexed second image is executed. Since the second image processing is performed on the data, mutually different image data input in parallel can be efficiently processed, and the apparatus configuration can be simplified.

According to the image processing apparatus of the second aspect and the image processing method of the eighth aspect, the input first image data and the input second image data are each divided into a plurality of blocks, and attribute data is added to each block. Therefore, the image processing can be efficiently performed irrespective of the size of the image data, instead of the conventional image processing in units of pages.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an image processing apparatus according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of header information.

FIG. 3 is a diagram schematically showing a signal obtained by adding a header to each of print image data, FAX image data, and copy image data, and further multiplexing these three image data by a multiplexer 110; Yes,
(A) shows an image clock, and (B) to (G) show image data.

FIG. 4 is a diagram illustrating a configuration of an image processing circuit 111;

FIG. 5 is a diagram illustrating a format of an image signal of the digital processing unit dedicated to image processing, wherein (A) to (C) illustrate image data.

[Explanation of symbols]

 101 CPU 102 RAM 103 ROM 104 Print image memory 105, 109, 117 Header addition circuit 106 Host computer interface 107 Network control unit (NCU) 108 Encoding and decoding circuit (CODEC circuit) 150 Host computer 160 Public line

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H04N 1/387 G06F 15/66 J 1/40 H04N 1/40 Z

Claims (12)

[Claims] A first input unit for inputting first image data; a second input unit for inputting second image data in parallel with the input of the first image data; and the input first image. An adding unit for adding attribute data representing respective attributes to the data and the second image data; a multiplexing unit for multiplexing the first image data and the second image data respectively added to the attribute data; Analyzing means for analyzing each attribute of the first image data and the second image data based on each attribute data of the first image data and the second image data, and according to each of the analyzed attributes, An image processing method for performing first image processing on multiplexed first image data and performing second image processing on the multiplexed second image data The image processing apparatus characterized in that it comprises and. 2. An image according to claim 1, wherein said adding means divides the input first image data and second image data into a plurality of blocks, respectively, and adds attribute data to each block. Processing equipment. 3. The image processing apparatus according to claim 1, wherein the multiplexing unit multiplexes the first image data and the second image data each having the attribute data added thereto in a time-division manner. . 4. The image according to claim 1, wherein the image processing unit selects the first image processing or the second image processing according to the analyzed attribute. Processing equipment. 5. The image processing apparatus according to claim 1, wherein the image processing unit includes a storage unit configured to store the first image data and the second image data on which the image processing has been performed in respective predetermined areas. The image processing device according to claim 1. 6. The image processing means stores the first image data and the second image data on which the image processing has been executed in respective areas of the storage means according to the analyzed attributes. 6. The image processing apparatus according to claim 5, further comprising control means for controlling the image processing. 7. A first input step of inputting first image data, a second input step of inputting second image data in parallel with the input of the first image data, and the input first image. An adding step of adding attribute data representing respective attributes to the data and the second image data; a multiplexing step of multiplexing the first image data and the second image data respectively added to the attribute data; An analysis step of analyzing each attribute of the first image data and the second image data based on each attribute data of the first image data and the second image data, and according to each of the analyzed attributes, An image processing system for performing first image processing on multiplexed first image data and performing second image processing on the multiplexed second image data An image processing method which comprises and. 8. The method according to claim 1, wherein in the adding step, the input first
8. The image processing method according to claim 7, wherein the image data and the second image data are each divided into a plurality of blocks, and attribute data is added to each block. 9. The image processing method according to claim 7, wherein, in the multiplexing step, the first image data and the second image data to which the attribute data are respectively added are multiplexed in a time division manner. . 10. The image according to claim 7, wherein in the image processing step, first image processing or second image processing is selected according to the analyzed attribute. Processing method. 11. The image processing method according to claim 7, wherein the image processing step includes a storage step of storing the first image data and the second image data on which the image processing has been executed in respective predetermined areas. The image processing method according to claim 1. 12. The image processing step, wherein the first image data and the second image data subjected to the image processing are controlled to be stored in predetermined areas in accordance with the analyzed attributes. The image processing method according to claim 11, further comprising a step.