JPH11186469A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH11186469A
JPH11186469A JP35311497A JP35311497A JPH11186469A JP H11186469 A JPH11186469 A JP H11186469A JP 35311497 A JP35311497 A JP 35311497A JP 35311497 A JP35311497 A JP 35311497A JP H11186469 A JPH11186469 A JP H11186469A
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semiconductor device
semiconductor
semiconductor element
member
element
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JP35311497A
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Japanese (ja)
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Masaaki Sone
応顕 曽根
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Seiko Epson Corp
セイコーエプソン株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PROBLEM TO BE SOLVED: To improve reliability of a semiconductor package, by obtaining such a semiconductor device that incorporates an exposed heat sink and can prevent failure of a largesized semiconductor element resulting from thermal stresses, when the semiconductor element is mounted. SOLUTION: A semiconductor device is constituted by mounting a semiconductor element 1 having such a large size that the length of one side exceeds 10 mm on a heat radiating board 2 and connecting the bonding pads of the element 1 to inner leads through wires, such as gold wires, etc., and then, sealing the element 1, the board 2, and the inner leads with a resin 6, etc. When the semiconductor element 1 is mounted on the board 2, a cushioning material 7 is put between the board 2 and the element 1 so as to relieve the stresses applied to the element 1. In addition, notches, recesses, etc., are formed on the semiconductor element mounting surface of the board 2. Since the thermal stresses applied to the element 1 can be relieved, a highly reliable semiconductor device can be obtained.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明は半導体装置に係わり、さらに詳しくは半導体装置(半導体パッケージともいう)の信頼性向上に関するものである。 The present invention relates to relates to a semiconductor device, and more particularly relates to improving the reliability of the semiconductor device (also referred to as a semiconductor package).

【0002】 [0002]

【従来の技術】図3は従来の露出型放熱板内蔵式の半導体装置の断面図である。 BACKGROUND ART FIG. 3 is a sectional view of a conventional exposure type radiating plate built-semiconductor device. 1は半導体素子で、接着剤により放熱板2に接着されている。 1 is a semiconductor element is bonded to the heat radiating plate 2 by adhesive. 放熱板2は絶縁テープ3 Radiating plate 2 is insulating tape 3
によりリード4に接着されている。 It is bonded to the lead 4 by. 半導体素子1に設けられたボンディングパッドとこれに対応する各リード4 Each lead corresponding to the bonding pads provided which the semiconductor element 1 4
とは、それぞれワイヤ5により接続されている。 And they are respectively connected by wires 5. 多数のリード4に接続された半導体素子1は、リード4の一部および放熱板2の一部を残してエポキシ等の樹脂6により封止される。 Number of semiconductor elements 1 connected to the lead 4 is sealed by the resin 6 such as epoxy leaving a part and a part of the heat sink 2 of the leads 4. 封止樹脂6から突出したリード4を折り曲げて端子とし、半導体装置が製造される。 A terminal by bending the leads 4 projecting from the sealing resin 6, the semiconductor device is manufactured.

【0003】 [0003]

【発明が解決しようとする課題】上記のような露出型放熱板内蔵半導体装置においては、半導体素子が直接放熱板上に接着されているため、大型の半導体素子を搭載したとき、熱応力により半導体素子が破壊されるという課題があった。 In [0007] Exposed radiating plate internal semiconductor device as described above, since the semiconductor element is bonded directly onto the radiator plate, when mounting a large semiconductor device, a semiconductor by thermal stress there has been a problem that the element is destroyed. 本発明は、上記の課題を解決するためになされたもので、高信頼性の半導体装置を得ることを目的とするものである。 The present invention has been made to solve the above problems, it is an object to obtain a highly reliable semiconductor device.

【0004】 [0004]

【課題を解決するための手段】本発明は上記目的を達成すべくなされたもので、請求項1に記載の半導体装置は、複数の電極を有する半導体素子と、前記半導体素子を載置する領域を有する放熱部材と、前記放熱部材上に設けられた絶縁部材と、前記絶縁部材を介して前記放熱部材上に設けられるとともに前記電極と電気的に接続されるリードと、前記半導体素子、前記放熱部材の少なくとも一部、前記絶縁部材及び前記リードの少なくとも一部が封止される樹脂と、を有し、前記放熱部材の前記半導体素子を載置する面において、前記半導体素子が載置される前記領域は前記半導体素子よりも小さく形成されるとともに、前記半導体素子が載置される領域から前記半導体素子を超えた領域まで連続的に形成された溝部を有することを特徴と Means for Solving the Problems The present invention has been made to achieve the above object, the semiconductor device according to claim 1, placing a semiconductor element having a plurality of electrodes, said semiconductor element region a heat radiation member having an insulating member provided on said heat radiating member, a lead in which the are with be through an insulating member provided on the heat dissipation member is connected to said electrode and electrically, the semiconductor element, the heat dissipation at least a portion of the member, anda resin at least partially sealed in the insulating member and the lead, in the face for mounting the semiconductor device of the heat dissipation member, the semiconductor element is mounted the region while being smaller than the semiconductor element, and characterized by having a groove in which the semiconductor elements are continuously formed from the region to be placed to an area beyond the semiconductor element る。 That.

【0005】また、請求項2に記載の半導体装置は、請求項1の内容に加えて、前記溝部は、前記半導体チップの外周を囲む位置に形成されてなる。 Further, the semiconductor device according to claim 2, in addition to the content of claim 1, wherein the groove is formed by is formed at a position surrounding an outer periphery of said semiconductor chip.

【0006】また、請求項3に記載の半導体装置は、請求項1または2記載の内容に加えて、前記半導体素子は、一辺の長さが10mm以上であることを特徴とする。 Further, the semiconductor device according to claim 3, in addition to the content of claim 1 or 2, wherein said semiconductor device is characterized in that the length of one side is 10mm or more.

【0007】また、請求項4記載の半導体装置は、請求項1乃至3のいずれか記載の内容に加えて、前記溝部は、化学的な加工により形成されてなることを特徴とする。 Further, the semiconductor device according to claim 4, wherein, in addition to the contents according to any one of claims 1 to 3, wherein the groove is characterized by comprising formed by chemical machining.

【0008】また、請求項5記載の半導体装置は、請求項1乃至3のいずれか記載の内容に加えて、前記溝部は、機械的な加工により形成されてなることを特徴とする。 Further, the semiconductor device according to claim 5, wherein, in addition to the contents according to any one of claims 1 to 3, wherein the groove is characterized by comprising formed by mechanical processing.

【0009】また、請求項6記載の半導体装置は、請求項1乃至5のいずれか記載の内容に加えて、前記放熱部材は、銅系材料であることを特徴とする。 Further, the semiconductor device according to claim 6, wherein, in addition to the contents according to any one of claims 1 to 5, wherein the heat radiating member may be a copper-based material.

【0010】また、請求項7記載の半導体装置は、請求項1乃至6のいずれか記載の内容に加えて、前記半導体素子と前記放熱部材との間には、緩衝材が設けられてなることを特徴とする。 Further, the semiconductor device according to claim 7, in addition to the contents according to any one of claims 1 to 6, between the heat radiation member and the semiconductor element, the cushioning material is provided the features.

【0011】また、請求項8記載の半導体装置は、請求項7記載の内容に加えて、前記緩衝材は、線膨張係数が前記半導体素子の線膨張係数と前記放熱部材の線膨張係数との間に相当する部材であることを特徴とする。 Further, the semiconductor device according to claim 8, in addition to the contents of claim 7, wherein the cushioning material, the linear expansion coefficient of the linear expansion coefficient of the heat radiating member and the linear expansion coefficient of the semiconductor element characterized in that it is a member corresponding to between.

【0012】また、請求項9記載の半導体装置は、請求項7または8記載の内容に加えて、前記緩衝材は、接着機能を有することを特徴とする。 Further, the semiconductor device according to claim 9, in addition to the contents of the claims 7 or 8, wherein the buffer material is characterized by having an adhesive function.

【0013】また、請求項10記載の半導体装置は、請求項7記載の内容に加えて、前記緩衝材は、鉄、白金、 Further, the semiconductor device according to claim 10, wherein, in addition to the contents of claim 7, wherein said cushioning material, iron, platinum,
チタン及びタングステンのいずれかからなる金属部材を用いてなることを特徴とする。 And characterized by using a metal member made of either titanium and tungsten.

【0014】また、請求項11記載の半導体装置は、請求項7記載の内容に加えて、前記緩衝材は、セラミックを用いてなることを特徴とする。 Further, the semiconductor device according to claim 11, in addition to the contents of claim 7, wherein the buffer material is characterized by using a ceramic.

【0015】また、請求項12記載の半導体装置は、請求項7記載の内容に加えて、前記緩衝材は、鉱物を用いてなることを特徴とする。 Further, the semiconductor device according to claim 12, wherein, in addition to the contents of claim 7, wherein the buffer material is characterized by using a mineral.

【0016】一方、本発明の半導体装置として、請求項13に記載の如く、複数の電極を有する半導体素子と、 [0016] On the other hand, as a semiconductor device of the present invention, as described in claim 13, a semiconductor element having a plurality of electrodes,
前記半導体素子を載置する領域を有する放熱部材と、前記放熱部材上に設けられた絶縁部材と、前記絶縁部材を介して前記放熱部材上に設けられるとともに前記電極と電気的に接続されるリードと、前記半導体素子、前記放熱部材の少なくとも一部、前記絶縁部材及び前記リードの少なくとも一部が封止される樹脂と、を有し、前記放熱部材の前記半導体素子を載置する面において、前記半導体素子が載置される前記領域には前記半導体素子に加わる応力を緩和するための機構を設けてなることを特徴とする。 Wherein a heat radiation member having a region for mounting the semiconductor element, the heat dissipation and insulating member provided on member, the lead said being electrically connected to an electrode with provided on the heat dissipation member via the insulating member When the semiconductor element, at least in part, anda resin at least partially sealed in the insulating member and the lead, placing the semiconductor element of the heat radiation member surface of the heat radiating member, the said region where the semiconductor element is mounted, characterized by comprising a mechanism for reducing the stress applied to the semiconductor device. 緩衝材を放熱板と半導体素子の間に挟み込むことにより、半導体素子に作用する熱応力を軽減してその破壊を防止することができ、より信頼性の高い半導体装置を提供できることになる。 By sandwiching the cushioning material between the radiating plate and the semiconductor element, to reduce the thermal stress applied to the semiconductor element can be prevented its destruction, it will be able to provide a more highly reliable semiconductor device.

【0017】また、請求項14に記載の半導体装置は、 Further, the semiconductor device according to claim 14,
請求項13記載の内容に加えて、前記機構として、前記領域には緩衝材が設けられることを特徴とする。 In addition to the content of claim 13, wherein, as the mechanism, the area wherein the buffer material is provided.

【0018】 [0018]

【発明の実施の形態】図1は、本発明の一実施例である放熱部材(本例では放熱板)上に半導体素子を接着固定し、半導体素子のボンディングパッドとインナーリードとを金線等のワイヤにて接続した後、樹脂等で封止してなる半導体装置において、放熱板と半導体素子の間に緩衝材を挟み込むことを特徴とする半導体装置の断面図である。 Figure 1 DETAILED DESCRIPTION OF THE INVENTION The semiconductor element is bonded and fixed onto (heat radiating plate in the present embodiment) an embodiment in which the heat radiating member of the present invention, gold or the like and a bonding pad and inner leads of a semiconductor device after connecting with a wire, in the semiconductor device obtained by encapsulating a resin or the like, a cross-sectional view of a semiconductor device, characterized in that sandwich the buffer member between the heat radiating plate and the semiconductor element. 図において、1は半導体素子で、放熱板2との間に緩衝材7が設けられている。 In the drawings, indicated at 1 is a semiconductor device, a cushioning material 7 is provided between the heat radiating plate 2. 緩衝材は緩衝機能に加え、 Cushioning material, in addition to the buffer function,
接着機能を有していても良い。 It may have an adhesive function. 本例ではまさにその例である。 In this example it is just an example. なお、構成部品がふえることにより、若干、不利になるものの、緩衝材としての機能を有する部材と接着材としての機能を有する部材とを分けて設けることも可能である。 Note that when the component is increased slightly, although a disadvantage, it is also possible to provide separately a member having a function as an adhesive with a member having a function as a cushioning material. 3は絶縁テープで、放熱板2をリード4へ接着している。 3 is bonded with an insulating tape, the heat radiating plate 2 to the lead 4. 本例のように絶縁テープは、リードと放熱板との相重なる領域の内、その一部(具体的には相重なる領域における周囲部)に設けても良いし、相重なる領域を完全に覆うように設けても良い。 Insulating tape as in the present embodiment, among the phase overlap region between the lead and the heat sink, to the it may be provided in a part (periphery of the concrete in the overlap phase region), completely covering the phase overlap region it may be provided so as to. また、絶縁テープは樹脂内に位置するのであれば、放熱板を超えて設けても良い。 The insulating tape as long as positioned in the resin, it may be provided beyond the radiator plate. 半導体素子1に設けられたボンディングパッドとこれに対応する各リード4とは、それぞれワイヤ5により接続されている。 And bonding pads provided on the semiconductor element 1 and the lead 4 corresponding thereto are respectively connected by wires 5. 上記のようにして、多数のリード4に接続された半導体素子1は、リード4の一部および放熱板2の一部を残してエポキシ等の樹脂6により封止される。 As described above, the semiconductor device 1 connected to a number of leads 4 is sealed by the resin 6 such as epoxy leaving a part and a part of the heat sink 2 of the leads 4. ついで、樹脂6から突出したリード4を折り曲げて端子とし、半導体装置が製造される。 Then, the terminal by bending the leads 4 projecting from the resin 6, the semiconductor device is manufactured. 放熱板の熱膨張率と半導体素子熱膨張率の差が大きいため、そこに生じる応力を緩和させるべく、放熱板と半導体素子の間に緩衝材を挿入する形態とするものである。 Because the difference in the thermal expansion coefficient of heat dissipation plate and the semiconductor device thermal expansion coefficient is large, in order to relax the stress generated therein, it is an embodiment of inserting a cushioning material between the radiating plate and the semiconductor element. 緩衝材を放熱板と半導体素子の間に挟み込むことにより、半導体素子に作用する熱応力を軽減してその破壊を防止することができ、より信頼性の高い半導体装置を提供できることになる。 By sandwiching the cushioning material between the radiating plate and the semiconductor element, to reduce the thermal stress applied to the semiconductor element can be prevented its destruction, it will be able to provide a more highly reliable semiconductor device. さらに、線膨張係数が放熱板の線膨張係数と半導体素子の線膨張係数との間にある素材を緩衝材として使用するのがよい。 Further, it is preferable linear expansion coefficient material used is between coefficient of linear expansion of the semiconductor element of the heat radiating plate as a buffer material. 更には、放熱板として銅系材料であって半導体素子がシリコンである場合には、緩衝材として鉄、白金、チタン、タングステン等の金属材料を用いる。 Furthermore, when a copper-based material is a semiconductor element is silicon as a heat sink, iron, platinum, titanium, a metal material such as tungsten is used as a buffer. もしくは緩衝材として、アルミナ焼桔体等のセラミックや、花崗岩等の鉱物を用いてもよい。 Or as a buffer material, or ceramic alumina sintered 桔体 like, may be used mineral granite or the like.

【0019】このようにすれば、より緩衝材の効果を高めることができ、されに熱応力を低減することができる。 [0019] In this way, it is possible to enhance the effect of more cushioning material, thermal stress is can be reduced. また本例に用いられる半導体素子は、一辺の長さが10mm以上のものに適用することが好ましい。 The semiconductor element used in the present embodiment, it is preferable that the length of one side is applied to more than 10 mm. 半導体素子の1辺が10mm以下の場合には、特段緩衝機能を有さなくても半導体素子の破壊は防げることが確認されている。 If one side of the semiconductor device is 10mm or less, it is prevented destruction of the semiconductor device need not have a special buffer function is confirmed.

【0020】図2は、本発明の他の例である。 [0020] Figure 2 is another example of the present invention. 図1と異なる点は、放熱板の半導体素子搭載面に対して化学的な加工(例えば、エッチング)または機械的(切削またはプレス)により切れ込み、窪み等の形状に加工することを特徴とする。 1 in that, chemical processing the semiconductor element mounting surface of the heat radiating plate (e.g., etching) or mechanical cut by (cutting or pressing), and wherein the processing into a shape, such as depression. 図において、1は半導体素子で、接着剤8 In the drawings, indicated at 1 is a semiconductor device, the adhesive 8
により放熱板2に接着されている。 It is bonded to the radiating plate 2 by. 3は絶縁テープで、 3 is an insulating tape,
放熱板2をリード4へ接着している。 And bonding the heat radiating plate 2 to the lead 4. 半導体素子1に設けられたボンディングパッドとこれに対応する各リード4とは、それぞれワイヤ5により接続されている。 And bonding pads provided on the semiconductor element 1 and the lead 4 corresponding thereto are respectively connected by wires 5. 上記のようにして、多数のリード4に接続された半導体素子1は、リード4の一部および放熱板2の一部を残してエポキシ等の樹脂6により封止される。 As described above, the semiconductor device 1 connected to a number of leads 4 is sealed by the resin 6 such as epoxy leaving a part and a part of the heat sink 2 of the leads 4. ついで、樹脂6から突出したリード4を折り曲げて端子とし、半導体装置が製造される。 Then, the terminal by bending the leads 4 projecting from the resin 6, the semiconductor device is manufactured. このようにして半導体装置は製造される。 Such semiconductor device in the is produced. つまり製造された半導体装置は、複数の電極を有する半導体素子と、半導体素子を載置する領域を有する放熱部材と、放熱部材上に設けられた絶縁部材と、絶縁部材を介して放熱部材上に設けられるとともに電極と電気的に接続されるリードと、半導体素子、放熱部材の少なくとも一部、絶縁部材及びリードの少なくとも一部が封止される樹脂と、を有しており、放熱部材の半導体素子を載置する面において、半導体素子が載置される領域は半導体素子よりも小さく形成されるとともに、半導体素子が載置される領域から半導体素子を超えた領域まで連続的に形成された溝部(凹部)を有する。 That semiconductor device manufactured is a semiconductor element having a plurality of electrodes, and the heat radiating member having a region for mounting the semiconductor element, an insulating member provided on the heat radiating member, the heat dissipation member via the insulating member and leads connected together are provided electrodes electrically, the semiconductor device, at least a portion of the heat radiating member, at least a portion of the insulating member and the lead has a resin sealed, the semiconductor of the heat radiating member in the surface for mounting the device, while being smaller than the semiconductor element region in which a semiconductor element is mounted, the groove which is continuously formed from a region where the semiconductor element is mounted to a region beyond the semiconductor element having a (concave). また、溝部は、半導体チップの外周を囲む位置に形成されている。 Further, the groove is formed at a position surrounding an outer periphery of the semiconductor chip. また、半導体素子の大きさは、一辺の長さが10mm以上のものに適用することが好ましい。 The size of the semiconductor device, it is preferable that the length of one side is applied to more than 10 mm.

【0021】 [0021]

【発明の効果】以上説明した通り、放熱部材に半導体素子が固定され、半導体素子のボンディングパッドとインナーリードとが電気的に接続され、、樹脂等で封止されてなる半導体装置において、放熱板と半導体素子の間に緩衝材を挿入する形態となっているため半導体素子への熱応力が緩和でき、信頼性の高い半導体装置を得ることが可能となる。 As described in the foregoing, the semiconductor element is fixed to the heat radiating member, a semiconductor device and the bonding pads and inner leads of the semiconductor element is sealed by being electrically connected ,, resin, the heat dissipation plate and thermal stress on the semiconductor device because it has a form of inserting a cushioning material between the semiconductor elements can be alleviated, it is possible to obtain a highly reliable semiconductor device. また、放熱板の半導体素子を搭載する面に凹凸をつけることで、この部分に応力を集中させ、半導体素子に作用する熱応力の緩和が出来る形態にしたため信頼性の高い半導体装置を得ることが可能となる。 Also, by putting an uneven surface for mounting a semiconductor element of the heat sink, stress is concentrated on this portion, it is possible to obtain a highly reliable semiconductor device due to the relaxation can form a thermal stress acting on the semiconductor element It can become.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明の一実施例である放熱板上に半導体素子を接着固定し、半導体素子のボンディングパッドとインナーリードとを金線等のワイヤにて接続した後、樹脂等で封止してなる半導体装置において、放熱板と半導体素子の間に緩衝材を挟み込むことを特徴とする半導体装置を示す断面図。 [1] The semiconductor element is bonded and fixed onto a is the heat radiating plate to an embodiment of the present invention, the bonding pads and the inner leads of the semiconductor device after connecting by wire the gold wires or the like, sealed with resin or the like in the semiconductor device comprising Te, cross-sectional view showing a semiconductor device characterized by sandwiching the cushioning material between the radiating plate and the semiconductor element.

【図2】本発明の一実施例である放熱板上に半導体素子を接着固定し、半導体素子のボンディングパッドとインナーリードとを金線等のワイヤにて接続した後、樹脂等で封止してなる半導体装置において、 放熱板の半導体素子搭載面に対してエッチングまたは切削またはプレスにより切れ込み、窪み等の形状に加工することを特徴とする半導体装置を示す断面図。 [2] The semiconductor device is bonded and fixed onto a is the heat radiating plate to an embodiment of the present invention, the bonding pads and the inner leads of the semiconductor device after connecting by wire the gold wires or the like, sealed with resin or the like in the semiconductor device comprising Te, cross-sectional view showing cut, a semiconductor device characterized by machining to the shape of such recesses by etching or cutting or pressing the semiconductor element mounting surface of the heat radiating plate.

【図3】従来の露出型放熱板内蔵式の半導体装置を示す断面図。 3 is a cross-sectional view showing a conventional exposure type radiating plate built-semiconductor device.

【符号の説明】 DESCRIPTION OF SYMBOLS

1・・・半導体素子 2・・・放熱板 3・・・絶縁テープ 4・・・リード 5・・・ワイヤ 6・・・封止樹脂 7・・・応力緩衝材 8・・・接着剤 1 ... semiconductor element 2 ... radiating plate 3 ... insulating tape 4 ... lead 5: wire 6 ... sealing resin 7 ... stress relief member 8 ... adhesive

Claims (14)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】複数の電極を有する半導体素子と、前記半導体素子を載置する領域を有する放熱部材と、前記放熱部材上に設けられた絶縁部材と、前記絶縁部材を介して前記放熱部材上に設けられるとともに前記電極と電気的に接続されるリードと、前記半導体素子、前記放熱部材の少なくとも一部、前記絶縁部材及び前記リードの少なくとも一部が封止される樹脂と、を有し、前記放熱部材の前記半導体素子を載置する面において、前記半導体素子が載置される前記領域は前記半導体素子よりも小さく形成されるとともに、前記半導体素子が載置される領域から前記半導体素子を超えた領域まで連続的に形成された溝部を有することを特徴とする半導体装置。 1. A semiconductor device having a plurality of electrodes, and the heat radiating member having a region for mounting the semiconductor element, an insulating member provided on said heat radiating member, the heat radiating member on via the insulating member a said electrode and electrically connected to the lead with provided, the semiconductor element, at least a portion of the heat radiating member, and a resin at least partially sealed in the insulating member and the lead, to, in the surface for placing the semiconductor device of the heat dissipation member, the region where the semiconductor element is mounted together with the formed smaller than the semiconductor element, the semiconductor element from a region where the semiconductor element is mounted wherein a has a groove which is continuously formed to a region beyond.
  2. 【請求項2】前記溝部は、前記半導体チップの外周を囲む位置に形成されてなる請求項1記載の半導体装置。 Wherein said groove, said semiconductor chip semiconductor device of the outer circumference formed by formed in a position surrounding the claim 1, wherein the.
  3. 【請求項3】前記半導体素子は、一辺の長さが10mm Wherein said semiconductor element, 10 mm in length of one side
    以上であることを特徴とする請求項1または2記載の半導体装置。 The semiconductor device according to claim 1 or 2, wherein the at least.
  4. 【請求項4】前記溝部は、化学的な加工により形成されてなることを特徴とする請求項1乃至3のいずれかに記載の半導体装置。 Wherein said groove, a semiconductor device according to any one of claims 1 to 3, characterized by being formed by chemical machining.
  5. 【請求項5】前記溝部は、機械的な加工により形成されてなることを特徴とする請求項1乃至3のいずれかに記載の半導体装置。 Wherein said groove, a semiconductor device according to any one of claims 1 to 3, characterized by being formed by mechanical processing.
  6. 【請求項6】前記放熱部材は、銅系材料であることを特徴とする請求項1乃至5のいずれかに記載の半導体装置。 Wherein said heat radiating member, a semiconductor device according to any one of claims 1 to 5, characterized in that a copper-based material.
  7. 【請求項7】前記半導体素子と前記放熱部材との間には、緩衝材が設けられてなることを特徴とする請求項1 Between 7. and the semiconductor element and the heat radiating member, according to claim 1, characterized in that the buffer material is provided
    乃至6のいずれかに記載の半導体装置。 Or semiconductor device according to any one of 6.
  8. 【請求項8】前記緩衝材は、線膨張係数が前記半導体素子の線膨張係数と前記放熱部材の線膨張係数との間に相当する部材であることを特徴とする請求項7記載の半導体装置。 Wherein said buffer material is a semiconductor device according to claim 7, wherein the linear expansion coefficient of a member corresponding to between the coefficient of linear expansion and the heat dissipation member of the semiconductor element .
  9. 【請求項9】前記緩衝材は、接着機能を有することを特徴とする請求項7または8項記載の半導体装置。 Wherein said buffer material is a semiconductor device according to claim 7 or 8 wherein wherein it has an adhesive function.
  10. 【請求項10】前記緩衝材は、鉄、白金、チタン及びタングステンのいずれかからなる金属部材を用いてなることを特徴とする請求項7記載の半導体装置。 Wherein said cushioning material, iron, platinum, a semiconductor device according to claim 7, characterized by using a metal member made of either titanium and tungsten.
  11. 【請求項11】前記緩衝材は、セラミックを用いてなることを特徴とする請求項7記載の半導体装置。 Wherein said buffer material is a semiconductor device according to claim 7, characterized by using a ceramic.
  12. 【請求項12】前記緩衝材は、鉱物を用いてなることを特徴とする請求項7記載の半導体装置。 12. The method of claim 11, wherein the buffer material is a semiconductor device according to claim 7, characterized by using a mineral.
  13. 【請求項13】複数の電極を有する半導体素子と、前記半導体素子を載置する領域を有する放熱部材と、前記放熱部材上に設けられた絶縁部材と、前記絶縁部材を介して前記放熱部材上に設けられるとともに前記電極と電気的に接続されるリードと、前記半導体素子、前記放熱部材の少なくとも一部、前記絶縁部材及び前記リードの少なくとも一部が封止される樹脂と、を有し、前記放熱部材の前記半導体素子を載置する面において、前記半導体素子が載置される前記領域には前記半導体素子に加わる応力を緩和するための機構を設けてなることを特徴とする半導体装置。 A semiconductor element having a 13. plurality of electrodes, said heat radiating member having a region for mounting the semiconductor element, an insulating member provided on said heat radiating member, the heat radiating member on via the insulating member a said electrode and electrically connected to the lead with provided, the semiconductor element, at least a portion of the heat radiating member, and a resin at least partially sealed in the insulating member and the lead, to, in the surface for placing the semiconductor device of the heat dissipation member, a semiconductor device in the region where the semiconductor element is mounted, characterized by comprising a mechanism for reducing the stress applied to the semiconductor device.
  14. 【請求項14】前記機構として、前記領域には緩衝材が設けられることを特徴とする請求項13記載の半導体装置。 14. As the mechanism, a semiconductor device according to claim 13, wherein said region is characterized by the buffer material is provided.
JP35311497A 1997-12-22 1997-12-22 Semiconductor device Withdrawn JPH11186469A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35311497A JPH11186469A (en) 1997-12-22 1997-12-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35311497A JPH11186469A (en) 1997-12-22 1997-12-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH11186469A true true JPH11186469A (en) 1999-07-09

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Family Applications (1)

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Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6946730B2 (en) 2001-04-25 2005-09-20 Denso Corporation Semiconductor device having heat conducting plate

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6798062B2 (en) 1999-11-24 2004-09-28 Denso Corporation Semiconductor device having radiation structure
US6891265B2 (en) 1999-11-24 2005-05-10 Denso Corporation Semiconductor device having radiation structure
US6960825B2 (en) 1999-11-24 2005-11-01 Denso Corporation Semiconductor device having radiation structure
US6967404B2 (en) 1999-11-24 2005-11-22 Denso Corporation Semiconductor device having radiation structure
US6992383B2 (en) 1999-11-24 2006-01-31 Denso Corporation Semiconductor device having radiation structure
US6998707B2 (en) 1999-11-24 2006-02-14 Denso Corporation Semiconductor device having radiation structure
US6946730B2 (en) 2001-04-25 2005-09-20 Denso Corporation Semiconductor device having heat conducting plate
US6963133B2 (en) 2001-04-25 2005-11-08 Denso Corporation Semiconductor device and method for manufacturing semiconductor device

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