JPH11112024A - Semiconductor light emitting device - Google Patents
Semiconductor light emitting deviceInfo
- Publication number
- JPH11112024A JPH11112024A JP26957897A JP26957897A JPH11112024A JP H11112024 A JPH11112024 A JP H11112024A JP 26957897 A JP26957897 A JP 26957897A JP 26957897 A JP26957897 A JP 26957897A JP H11112024 A JPH11112024 A JP H11112024A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- light
- mount
- emitting element
- emitting device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＬＥＤ発光素子を
リードフレームのマウントに搭載する発光装置に係り、
特に太陽光等の外光を浴びたときの発光素子周りのリー
ドフレームやマウントの表面からの反射を抑えて発光素
子による画像を良好に保てるようにした半導体発光装置
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device in which an LED light emitting element is mounted on a lead frame mount.
In particular, the present invention relates to a semiconductor light emitting device that suppresses reflection from the surface of a lead frame or a mount around a light emitting element when exposed to external light such as sunlight and can maintain a good image by the light emitting element.
【０００２】[0002]
【従来の技術】従来から、結晶基板に半導体薄膜層を積
層してｐ−ｎ接合した半導体積層膜を形成してｐ側及び
ｎ側の電極を備えたＬＥＤ発光素子が発光表示パネル用
として多用されている。このＬＥＤ発光素子は、たとえ
ば電気的に導通させるための部材として備えるリードフ
レームに予め形成されたマウントの上に搭載され、ワイ
ヤボンディングによってリードフレームに接続するとい
うものがその基本的な構成である。2. Description of the Related Art Conventionally, an LED light-emitting element having p-side and n-side electrodes formed by laminating a semiconductor thin film layer on a crystal substrate to form a pn junction semiconductor has been widely used for a light emitting display panel. Have been. The basic configuration of this LED light-emitting element is that it is mounted on a mount formed in advance on a lead frame provided as a member for electrical conduction, for example, and connected to the lead frame by wire bonding.
【０００３】図６はこのようなリードフレームのマウン
トに対する発光素子の搭載構造の従来例を示す概略図で
ある。FIG. 6 is a schematic view showing a conventional example of a structure for mounting a light emitting element on such a lead frame mount.
【０００４】図示の例は、窒化ガリウム系化合物の半導
体膜を積層した青色ＬＥＤとして使用できるものであ
り、発光素子５１は、その絶縁性の基板５１ａをリード
フレーム５２の上端に形成した椀状のマウント５２ａの
上に搭載してペースト５３によって接着され、発光素子
５１の上端にそれぞれ形成したｐ側極５１ｂ及びｎ側極
５１ｃをワイヤ５４ａ，５４ｂによってリードフレーム
５２及びこれと対をなしている他方のリードフレーム５
５に接続している。そして、発光素子５１を含めてマウ
ント５２ａ周りの全体がエポキシ樹脂５６によって封止
されている。[0004] In the example shown in the figure, a blue LED in which a gallium nitride-based compound semiconductor film is laminated can be used. The light emitting element 51 has a bowl-like shape in which an insulating substrate 51 a is formed on the upper end of a lead frame 52. The p-side pole 51b and the n-side pole 51c, which are mounted on the mount 52a and adhered by the paste 53 and formed on the upper end of the light emitting element 51, respectively, are connected to the lead frame 52 by wires 54a and 54b and the other pair. Lead frame 5
5 is connected. The entire area around the mount 52a including the light emitting element 51 is sealed with the epoxy resin 56.
【０００５】このような発光素子５１を含むＬＥＤラン
プでは、発光素子５１の窒化ガリウム系化合物の半導体
膜のｐ−ｎ接合域を発光層として、ｐ側極５１ｂを含む
領域を占めるｐ型層の上面を光取出し面として図におい
て左向きの発光が得られる。また、基板５１ａを透明の
サファイアとしたものでは、発光層からマウント５２ａ
に向かう光がこのマウント５２ａから反射され、この反
射分も含めて光取出し面からの発光に合流する。In an LED lamp including such a light emitting element 51, a pn junction region of a gallium nitride compound semiconductor film of the light emitting element 51 is used as a light emitting layer, and a p-type layer occupying a region including a p-side electrode 51b is formed. Using the upper surface as a light extraction surface, leftward light emission in the figure is obtained. When the substrate 51a is made of transparent sapphire, the mounting layer 52a
Is reflected from the mount 52a and joins the light emitted from the light extraction surface including the reflected light.
【０００６】一方、発光素子５１を備えた３原色のＬＥ
Ｄランプを多数集合させて配置した発光表示パネルは、
各ＬＥＤランプがそれぞれ画素となって各種の画像の表
示及びカラー表示が可能である。そして、この発光表示
パネルは比較的小型のものから屋外用の大型画面用のも
のがあり、その設置場所もさまざまである。On the other hand, the three primary color LEs having the light emitting elements 51 are provided.
A light-emitting display panel in which a large number of D lamps are arranged and arranged,
Each of the LED lamps serves as a pixel so that various images can be displayed and a color can be displayed. The light-emitting display panels range from relatively small ones to large ones for outdoor use, and their installation locations are various.
【０００７】[0007]
【発明が解決しようとする課題】発光素子５１を搭載す
るマウント５２ａを一体に形成したリードフレーム５２
は鉄を素材とするものが主であり、光取出し面からの発
光及び透明の基板５１ａをもつものではこの基板５１ａ
の側方及び背部側に漏れる光を反射させるため、たとえ
ば銀メッキによる表面処理が施される。そして、この銀
メッキはメッキ浴に浸漬させる工程によって行なわれる
が、マウント５２ａ自身は小さい形状であるためその内
周面だけにメッキを施すことは困難であり、マウント５
２ａが正面側を向く面からリードフレーム５２の基端側
にかけても銀メッキされる。SUMMARY OF THE INVENTION A lead frame 52 integrally formed with a mount 52a for mounting a light emitting element 51 thereon.
Is mainly made of iron, and in the case of having a transparent substrate 51a with light emission from the light extraction surface, this substrate 51a
In order to reflect the light leaking to the side and the back side, a surface treatment by, for example, silver plating is performed. The silver plating is performed by a step of dipping in a plating bath. However, since the mount 52a itself has a small shape, it is difficult to apply plating only to the inner peripheral surface thereof.
Silver plating is also applied from the surface facing 2a toward the front side to the base end side of the lead frame 52.
【０００８】一方、マウント５２ａは発光素子５１の発
光方向を指向させるとともに反射光も発光に加える機能
を持つのでパラボラとも称されるが、ワイヤ５４ａ，５
４ｂをボンディングしやすいようにリードフレーム５２
の先端は一般に平坦面としたものが多い。そして、椀状
にパラボラを形成するための加工上の面から、リードフ
レーム５２の先端部は或る程度肉厚とすることが必要と
されている。On the other hand, the mount 52a has a function of directing the light emitting direction of the light emitting element 51 and adding reflected light to the light emission.
4b to facilitate bonding of the lead frame 52b.
In most cases, the tip is generally a flat surface. In addition, it is necessary that the leading end portion of the lead frame 52 has a certain thickness from the processing surface for forming a bowl-shaped parabola.
【０００９】ところが、このようにリードフレーム５２
の先端部分すなわちマウント５２ａが肉厚であってその
先端面が平坦であると、マウント５２ａの先端面が太陽
光やその他の外からの光の反射面となって発光素子５１
による画像表示を紛らわしくする。However, as described above, the lead frame 52
If the tip of the mount 52a, that is, the mount 52a is thick and its tip is flat, the tip of the mount 52a becomes a reflecting surface for sunlight or other external light, and
Confusing image display.
【００１０】すなわち、図中の円で囲んだマウント５２
ａの先端部分に右向きの方向に太陽光が当たると、マウ
ント５２ａの先端面のほぼ全体が左向きの矢印の反射光
を放つことになる。このようなことは、たとえば発光表
示パネルが屋外に設置されていて、太陽光の入射角度が
ほぼ垂直となる朝や夕暮れ時等に顕著であり、太陽光が
マウント５２ａやリードフレーム５５の先端面に垂直に
近い入射角度で当たると、先端面のほぼ全体が反射光面
となる。That is, the mount 52 surrounded by a circle in FIG.
When sunlight strikes the front end of the mount 52a in the rightward direction, almost the entire front end surface of the mount 52a emits reflected light of the left arrow. This is remarkable, for example, in the morning or at dusk when the light-emitting display panel is installed outdoors and the incident angle of sunlight is almost vertical. At an incident angle close to the vertical, almost the entire front end surface becomes a reflected light surface.
【００１１】このように太陽光が当たってマウント５２
ａやリードフレーム５５の先端面から反射されると、こ
れらの先端面には銀メッキが施されているので、反射光
による輝度もかなり高くなる。そして、発光表示パネル
に配置された多数の発光素子５１のそれぞれを取り囲む
ようなグリッド状に白色または銀色に近い反射光が放た
れるので、複数の発光素子５１によるカラー発光のそれ
ぞれの色のコントラストを低下させてしまう。このよう
なコントラストの低下は、発光素子５１のそれぞれが画
素となって画像表示するディスプレイに対して、画像の
鮮明さを損ねる結果となる。In this manner, the mount 52 is exposed to sunlight.
When the light is reflected from the end surfaces of the lead frame 55a and the lead frame 55, since these end surfaces are plated with silver, the luminance due to the reflected light is considerably increased. Then, since reflected light close to white or silver is emitted in a grid shape surrounding each of the large number of light emitting elements 51 arranged on the light emitting display panel, the contrast of each color of the color light emission by the plurality of light emitting elements 51 is obtained. Is reduced. Such a decrease in contrast results in a loss of image clarity for a display that displays an image in which each of the light emitting elements 51 is a pixel.
【００１２】このように、従来の発光素子５１をリード
フレーム５２のマウント５２ａに搭載するものでは、太
陽光等のように強い外光を浴びたときにマウント５２ａ
の先端面等からの反射が避けられないため、表示画像に
大きな影響を及ぼすという問題がある。As described above, when the conventional light emitting device 51 is mounted on the mount 52a of the lead frame 52, the mount 52a is exposed to strong external light such as sunlight.
There is a problem in that reflection from the front end face or the like is unavoidable, which greatly affects the displayed image.
【００１３】本発明において解決すべき課題は、太陽光
等の外光を浴びても発光素子による表示画像のコントラ
ストの低下を招くことなく良好な表示が可能な発光装置
を提供することにある。It is an object of the present invention to provide a light emitting device capable of performing a favorable display even when exposed to external light such as sunlight without causing a decrease in contrast of a display image by a light emitting element.
【００１４】[0014]
【課題を解決するための手段】本発明は、結晶基板の上
にｐ−ｎ接合の半導体層を積層した発光素子と、この発
光素子を搭載して電気的に導通させるマウントを形成し
た搭載導通部とを備え、マウントが発光方向を指向する
面であって少なくとも外部からの光の入射がある部位
に、入射外光の反射輝度を規制する反射輝度規制手段を
含むことを特徴とする。SUMMARY OF THE INVENTION The present invention relates to a light emitting device in which a pn junction semiconductor layer is laminated on a crystal substrate, and a mounting conduction device in which the light emitting device is mounted and a mount for electrically conducting is formed. And a reflection luminance regulating means for regulating the reflection luminance of the incident external light at least in a portion where the mount is directed in the light emitting direction and at which light from the outside is incident.
【００１５】このような構成であれば、たとえば発光素
子を多数配置した発光表示パネルを屋外に設置したと
き、朝や夕暮れ時の太陽光を浴びても、たとえばリード
フレームを搭載導通部材とする場合であればこのリード
フレームの一部として形成したマウントからの輝度の高
い反射が反射輝度規制手段によって抑えられ、発光素子
からの発光に対する反射光の干渉やコントラストの低下
が防止される。With such a configuration, for example, when a light emitting display panel on which a large number of light emitting elements are arranged is installed outdoors, even when exposed to sunlight in the morning or dusk, for example, a lead frame is used as a mounting conductive member. If so, high-brightness reflection from the mount formed as a part of the lead frame is suppressed by the reflection luminance regulating means, and interference of reflected light with respect to light emission from the light emitting element and a decrease in contrast are prevented.
【００１６】なお、本発明においては、発光素子を搭載
して電気的に導通させる搭載導通部材は、発明の実施の
形態の項に示すようにリードフレームであり、この他に
もプリント基板またはプリント基板の上方に別体として
配置する各種の成型品とすることができる。In the present invention, the mounting conductive member for mounting the light emitting element and electrically connecting the light emitting element is a lead frame as described in the embodiment of the present invention. Various types of molded products may be arranged separately above the substrate.
【００１７】[0017]
【発明の実施の形態】請求項１に記載の発明は、結晶基
板の上にｐ−ｎ接合の半導体層を積層した発光素子と、
この発光素子を搭載して電気的に導通させるマウントを
形成した搭載導通部とを備え、マウントが発光方向を指
向する面であって少なくとも外部からの光の入射がある
部位に、入射外光の反射輝度を規制する反射輝度規制手
段を含むものであり、たとえば搭載導通部材をリードフ
レームとしてその一部にマウントを形成するものでは、
このリードフレームやマウントからのたとえば面反射等
による輝度の高い反射が抑えられ、発光素子からの発光
に対する反射光の干渉やコントラストの低下を防ぐとい
う作用を有する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 is a light emitting device comprising a pn junction semiconductor layer laminated on a crystal substrate;
And a mounting conduction portion formed with a mount for mounting the light emitting element and electrically conducting the light. It includes a reflection luminance regulating means for regulating the reflection luminance. For example, in the case where a mount is formed on a part of the mounting conductive member as a lead frame,
High-brightness reflection from the lead frame or mount due to, for example, surface reflection is suppressed, and an effect of preventing interference of reflected light with light emitted from the light emitting element and a decrease in contrast is provided.
【００１８】請求項２に記載の発明は、反射輝度規制手
段は、マウントが外光に曝される部分の表面に形成され
入射外光を１条の線に沿う反射光として反射させる曲面
プロフィルとしてなるものであり、たとえばマウントを
リードフレームの一部として形成した場合では、このリ
ードフレーム及びマウントを製作するときの形状設定だ
けで外光の反射輝度を低く抑えるという作用を有する。According to a second aspect of the present invention, the reflection brightness regulating means is a curved surface profile formed on a surface of a portion where the mount is exposed to external light and reflecting incident external light as reflected light along one line. For example, when the mount is formed as a part of the lead frame, the reflection brightness of the external light is suppressed only by setting the shape when manufacturing the lead frame and the mount.
【００１９】請求項３に記載の発明は、反射輝度規制手
段は、マウントが外光に曝される部分の表面に形成され
入射外光を１条の線に沿う反射光として反射させる直線
状の傾斜面プロフィルを含むものであり、曲面プロフィ
ルを持つ場合と同様に、リードフレームの形状設定だけ
で外光の反射輝度を低く抑えるという作用を有する。According to a third aspect of the present invention, there is provided the reflection brightness regulating means, wherein the mount is formed on a surface of a portion where the mount is exposed to external light, and reflects the incident external light as reflected light along one line. It includes an inclined surface profile, and has an effect of suppressing the reflection luminance of external light low only by setting the shape of the lead frame, as in the case of having the curved surface profile.
【００２０】以下に、本発明の実施の形態の具体例を図
面を参照しながら説明する。図１は本発明の一実施の形
態における窒化ガリウム系化合物半導体によって形成さ
れるＬＥＤチップを発光素子として備えるＬＥＤランプ
の要部の縦断面図、図２は図１の平面図、及び図３は図
１のＡ−Ａ線矢視による縦断面図である。Hereinafter, specific examples of the embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a longitudinal sectional view of a main part of an LED lamp having an LED chip formed of a gallium nitride-based compound semiconductor as a light emitting element according to an embodiment of the present invention, FIG. 2 is a plan view of FIG. 1, and FIG. FIG. 2 is a longitudinal sectional view taken along line AA of FIG. 1.
【００２１】図において、その上端部がエポキシ樹脂に
よって封止される一対のリードフレーム１，２を備え
て、一方のリードフレーム１を本実施の形態における搭
載導通部材としている。一方のリードフレーム１の上端
には発光素子４を搭載するためのマウント３をほぼすり
鉢状に凹ませて形成するとともにその内周面の全体を鏡
面状としている。発光素子４は、下端側に透明のサファ
イアを用いた結晶基板４ａを設けるとともに上端側にｐ
側電極４ｂ及びｎ側電極４ｃを形成し、これらのそれぞ
れをワイヤ５ａ，５ｂによってリードフレーム１，２に
ワイヤボンディングしている。In the figure, a pair of lead frames 1 and 2 whose upper ends are sealed with epoxy resin are provided, and one of the lead frames 1 is used as a mounting conductive member in the present embodiment. At the upper end of one of the lead frames 1, a mount 3 for mounting the light emitting element 4 is formed in a substantially mortar-like concave shape, and the entire inner peripheral surface is mirror-like. The light emitting element 4 has a crystal substrate 4a made of transparent sapphire at the lower end and a p-type substrate at the upper end.
A side electrode 4b and an n-side electrode 4c are formed, and these are wire-bonded to the lead frames 1 and 2 by wires 5a and 5b.
【００２２】発光素子４はその上面であってｐ側電極４
ｂを含むｐ型層を発光輝度が最も高い主光取出し面とす
るとともに、発光層の下側に位置している結晶基板４ａ
からもその側方及び下方に向けて発光する。The light emitting element 4 has a p-side electrode 4 on its upper surface.
b as the main light extraction surface having the highest light emission luminance, and the crystal substrate 4a located under the light emitting layer.
Also emits light to the side and downward.
【００２３】マウント３は、図２に示すように、平面形
状がほぼ正方形の発光素子４に対してこれを偏心させて
配置するようなすり鉢状に形成され、その内周面は全横
断面において全て曲線を描くプロフィルを持つ。そし
て、発光素子４の結晶基板４ａからの発光をマウント３
の内周面で反射させるため、マウント３の底部にはほぼ
台形状の断面の反射ブロック３ａを形成し、この反射ブ
ロック３ａの上側に発光素子４が保持されている。As shown in FIG. 2, the mount 3 is formed in a mortar shape such that the light-emitting element 4 is eccentrically arranged with respect to the light-emitting element 4 having a substantially square planar shape. All have profiles that draw curves. Light emitted from the crystal substrate 4a of the light emitting element 4 is mounted on the mount 3
A reflection block 3a having a substantially trapezoidal cross section is formed at the bottom of the mount 3 so as to reflect light from the inner peripheral surface of the mount 3, and the light emitting element 4 is held above the reflection block 3a.
【００２４】ここで、リードフレーム１とその先端に設
けるマウント３及び他方のリードフレーム２が発光素子
４の発光方向に臨む面には、発光方向と直交しない緩や
かな傾斜面または曲面のプロフィルを全体または一部に
持たせるものとする。すなわち、図１に示すように、リ
ードフレーム１の右端の先端面１ａは平面状であるが、
この先端面１ａ部分とマウント３とにかけて凹み１ｂが
緩やかな曲面状に形成されている。そして、マウント３
の先端面は内周縁側は平面状であるが外周縁部分は凹部
１ｂに連なるように円弧面３ｂとして曲線状のプロフィ
ルとして形成されている。反射ブロック３ａの境界部分
も下に凹ませた緩やかな円弧面の凹部３ｃとしている。
また、マウント３の左側に位置しているリードフレーム
２の先端面２ａは、外側半分程度が平面状であるが、マ
ウント３側に臨む部分は緩やかな円弧面２ｂを形成して
いる。Here, the surface of the lead frame 1 and the mount 3 provided at the end thereof and the other lead frame 2 facing the light emitting direction of the light emitting element 4 are provided with a gentle slope or curved profile which is not orthogonal to the light emitting direction. Or a part of them. That is, as shown in FIG. 1, the right end surface 1a of the lead frame 1 is flat,
A recess 1b is formed in a gentle curved shape between the tip surface 1a and the mount 3. And mount 3
The front end surface is flat on the inner peripheral side, but the outer peripheral portion is formed as a curved profile as an arc surface 3b so as to be continuous with the concave portion 1b. The boundary portion of the reflection block 3a is also formed as a concave portion 3c having a gentle arc surface concaved downward.
The leading end surface 2a of the lead frame 2 located on the left side of the mount 3 has a flat outer half, but a portion facing the mount 3 forms a gentle arc surface 2b.
【００２５】また、これらの曲面状として形成されてい
ない先端面１ａ，２ａについては、ワイヤ５ａ，５ｂの
ボンディングの際のボンディング面の認識が可能な程度
に緩やかに直線状に傾斜したものとして発光方向と直交
しない平面状とすることが好ましい。このような直線状
の傾斜面であっても、曲面状とした場合と同様に外光を
受けたときには１条の反射光を発生するのみである。The tip surfaces 1a and 2a, which are not formed as curved surfaces, are gently and linearly inclined so that the bonding surface can be recognized when bonding the wires 5a and 5b. It is preferable that the shape be a flat shape that is not orthogonal to the direction. Even in the case of such a linear inclined surface, only one reflected light is generated when external light is received, as in the case of the curved surface.
【００２６】なお、以上のような曲面状のプロフィルを
示すためにリードフレーム１，２及びマウント３の要部
の概略斜視図を図４に示す。FIG. 4 is a schematic perspective view of the main parts of the lead frames 1, 2 and the mount 3 in order to show the above-mentioned curved profile.
【００２７】図５はビル等の外装に沿って高い位置に配
置される発光表示パネルに組み込んだときの発光装置の
姿勢を示す要部の断面図であり、図示の例では上下に２
個の配列としているが実際の発光表示パネルでは同一平
面内に多数の発光装置が一様に配列されることは無論で
ある。FIG. 5 is a sectional view of a main part showing the attitude of the light emitting device when incorporated in a light emitting display panel arranged at a high position along the exterior of a building or the like.
However, in an actual light emitting display panel, it is a matter of course that many light emitting devices are uniformly arranged in the same plane.
【００２８】図５から判るように、発光表示パネルのプ
リント基板（図示せず）に接続しているリードフレーム
１は、図２に示す上下方向の姿勢として配列される。そ
して、このようなリードフレーム１の配列において、発
光素子４の主光取出し面からの主光軸は水平方向または
地面側に少し傾けた姿勢とすることが通常であり、いず
れの場合においてもリードフレーム１，２及びマウント
３の先端面側が太陽光等の外光に曝される面となる。As can be seen from FIG. 5, the lead frames 1 connected to the printed circuit board (not shown) of the light emitting display panel are arranged in the vertical orientation shown in FIG. In such an arrangement of the lead frames 1, the main optical axis from the main light extraction surface of the light emitting element 4 is usually set to a posture slightly inclined to the horizontal direction or the ground side. The front end surfaces of the frames 1, 2 and the mount 3 are exposed to external light such as sunlight.
【００２９】以上の構成において、発光素子４へ通電さ
れるときにはｐ−ｎ接合域の発光層からの光は、先にも
述べたようにｐ型層の上面の光取出し面から放出される
と同時に透明のサファイアを利用した結晶基板４ａから
下方向及び側方へも漏れ出る。このとき、発光素子４は
その主光取出し面がマウント３の中に十分に深く入り込
んでいるので、主光取出し面からの主光軸上の光の拡散
分や結晶基板４ａ側から漏れる光はマウント３の内周面
を鏡面状としておくことにより反射される。In the above configuration, when the light-emitting element 4 is energized, light from the light-emitting layer in the pn junction region is emitted from the light extraction surface on the upper surface of the p-type layer as described above. At the same time, it leaks downward and laterally from the crystal substrate 4a using transparent sapphire. At this time, since the main light extraction surface of the light emitting element 4 is penetrated sufficiently deep into the mount 3, the diffusion of light on the main optical axis from the main light extraction surface and the light leaking from the crystal substrate 4 a side are reduced. The light is reflected by making the inner peripheral surface of the mount 3 a mirror surface.
【００３０】ここで、朝や夕暮れ時の太陽光は、図５に
示したリードフレーム１の配列に対して左側からの平行
光線として達する。そして、図６の従来例に示したよう
にマウントやリードフレームの先端が平坦面であれば、
このような太陽光が先端面の全体を反射面として反射光
を放つので、多数の発光素子４による画像のコントラス
トを低下させてしまうというものであった。Here, the sunlight in the morning or dusk reaches parallel rays from the left side with respect to the arrangement of the lead frame 1 shown in FIG. Then, as shown in the conventional example of FIG. 6, if the tip of the mount or the lead frame is a flat surface,
Such sunlight emits reflected light using the entire front end surface as a reflection surface, and thus reduces the contrast of an image formed by a large number of light emitting elements 4.
【００３１】これに対し、本発明では、リードフレーム
１，２の先端面１ａ，２ａ及びマウント３の先端はそれ
ぞれ一部に円弧状の凹み１ｂ，円弧面２ｂ，３ｂを含む
ので、リードフレーム１，２及びマウント３のそれぞれ
の先端面は全てが一様な平坦面とはならない。そして、
これらの曲面状として形成されていない先端面１ａ，２
ａについては、ワイヤ５ａ，５ｂのボンディング面の認
識が可能な程度に緩やかに傾斜したものとして発光方向
と直交しない平面状としておけば、太陽光が射しても、
面反射による大きな反射光の発生が抑えられる。On the other hand, in the present invention, the leading end surfaces 1a and 2a of the lead frames 1 and 2 and the leading end of the mount 3 partially include the arc-shaped recess 1b and the arcuate surfaces 2b and 3b, respectively. , 2 and the mount 3 are not all flat. And
The tip surfaces 1a, 2 not formed as these curved surfaces
About a, if it is a plane that is not so as to be orthogonal to the light emitting direction as it is gently inclined so that the bonding surfaces of the wires 5a and 5b can be recognized,
Generation of large reflected light due to surface reflection is suppressed.
【００３２】すなわち、太陽光線が図５において左側か
ら水平方向となるときでも、マウント３の内周面はすり
鉢状であってしかも横断面が円弧状なので、共通の面で
の反射はなく、反射光は内周面をその周方向に巡る１条
のライン上の反射として現れる。また、リードフレーム
１，２の凹み１ｂ及び円弧面２ｂやマウント３の円弧面
３ｂや凹部３ｃもいずれも曲面状なので、同様に面反射
による輝度の高い反射光の発生はなく、これらの曲面を
その曲がり方向に巡る１条のライン上の反射に抑え込ま
れる。更に、リードフレーム１，２の先端面を先に述べ
たように発光方向と直交しない緩やかな一様な角度の直
線状の傾斜面とすることによっても、太陽光を１条のラ
イン上の反射光とすることができる。That is, even when the sunlight is horizontal from the left side in FIG. 5, since the inner peripheral surface of the mount 3 is mortar-shaped and the cross section is arc-shaped, there is no reflection on the common surface, The light appears as reflections on a single line around the inner circumferential surface in the circumferential direction. In addition, since the concave portion 1b and the circular arc surface 2b of the lead frames 1 and 2 and the circular arc surface 3b and the concave portion 3c of the mount 3 are all curved surfaces, similarly, high-luminance reflected light due to surface reflection is not generated. The reflection is suppressed by the reflection on one line extending in the bending direction. Further, as described above, the front end surfaces of the lead frames 1 and 2 may be formed as straight inclined surfaces having a gentle and uniform angle that is not perpendicular to the light emitting direction, so that sunlight can be reflected on one line. It can be light.
【００３３】そして、太陽光が水平方向の入射でなく
て、斜め上や左右のいずれかからでの入射の場合でも、
同様にリードフレーム１，２及びマウント３による面反
射の発生は、従来構造のように先端面が一様な平坦面に
よる場合に比べると格段に抑えられる。Then, even when the sunlight is not incident in the horizontal direction but is incident obliquely from above or from the left or right,
Similarly, the occurrence of surface reflection due to the lead frames 1 and 2 and the mount 3 is significantly suppressed as compared with the case where the front end surface is a uniform flat surface as in the conventional structure.
【００３４】このように、発光素子４周りのリードフレ
ーム１，２やマウント３の先端部の形状に曲面要素を含
ませたプロフィルとしたことによって、朝や夕暮れ時の
太陽光やその他の強い外光を浴びても、これらが輝度の
高い反射光として反射されることがなくなり、ライン上
に沿う一部だけが反射され、全体としての反射量が低減
される。したがって、発光素子４による画像に対して白
または銀色の強い反射光がグリッド状に散乱することが
ない表示が可能となり、カラー画像のコントラストの低
下が効果的に防止される。その結果、太陽光やその他の
強い外光の入射が発光表示パネルに及ぶような設置条件
であっても、外光による外乱を排除した鮮明な画像表示
を保つことができる。As described above, the profile in which the shape of the tip of the lead frame 1, 2 or the mount 3 around the light emitting element 4 includes a curved surface element allows the sunlight or other strong external light in the morning or dusk. Even when exposed to light, they are not reflected as reflected light having high brightness, and only a part along the line is reflected, and the amount of reflection as a whole is reduced. Therefore, a display in which strong reflected light of white or silver is not scattered in a grid shape with respect to the image by the light emitting element 4 can be performed, and a decrease in contrast of a color image can be effectively prevented. As a result, even under installation conditions in which sunlight or other strong external light is incident on the light emitting display panel, a clear image display in which disturbance due to external light is eliminated can be maintained.
【００３５】[0035]
【発明の効果】請求項１の発明では、リードフレーム等
に形成したマウントからのたとえば面反射等による輝度
の高い反射が抑えられ、発光素子からの発光に対する反
射光の干渉やコントラストの低下が防止されるので、太
陽光に直に曝される屋外設置の大型の発光表示パネルで
あっても、発光素子による画像を常に鮮明に表示でき、
表示用ディスプレイとしてより好適に利用できる。According to the first aspect of the present invention, high-brightness reflection due to, for example, surface reflection from a mount formed on a lead frame or the like is suppressed, and interference of reflected light with light emitted from the light emitting element and a decrease in contrast are prevented. Therefore, even in the case of a large luminous display panel installed outdoors that is directly exposed to sunlight, the image by the luminous element can always be displayed clearly,
It can be more suitably used as a display for display.
【００３６】請求項２及び請求項３の発明では、たとえ
ばリードフレームにマウントを製作するときの形状設定
だけで外光の反射輝度が低く抑えられるので、たとえば
外光を浴びる面に無反射のためのコーティングを施す等
の特別の処理が不要となり、製造工程も従来通りのまま
で済み、設備変更によるコスト面での障害もない。According to the second and third aspects of the present invention, the reflection brightness of the external light can be suppressed low only by setting the shape when the mount is manufactured on the lead frame. This eliminates the need for special processing such as applying a coating, and allows the manufacturing process to be the same as before, and there is no cost obstacle due to equipment change.
【図１】本発明の一実施の形態による窒化ガリウム系化
合物半導体発光素子を用いた発光装置の要部を示す縦断
面図FIG. 1 is a longitudinal sectional view showing a main part of a light emitting device using a gallium nitride based compound semiconductor light emitting device according to an embodiment of the present invention.
【図２】図１の平面図FIG. 2 is a plan view of FIG. 1;
【図３】図１のＡ−Ａ線矢視による縦断面図FIG. 3 is a longitudinal sectional view taken along line AA of FIG. 1;
【図４】リードフレーム及びマウントの先端部分の要部
を示す概略斜視図FIG. 4 is a schematic perspective view showing a main part of a lead frame and a tip portion of a mount.
【図５】発光表示パネルへのリードフレームの配列姿勢
を示す概略断面図FIG. 5 is a schematic cross-sectional view showing an arrangement posture of a lead frame on a light emitting display panel.
【図６】従来のＬＥＤランプにおける太陽光の反射の状
況を示す概略図FIG. 6 is a schematic diagram showing the state of reflection of sunlight in a conventional LED lamp.
【符号の説明】 １ リードフレーム（搭載導通部材） １ａ 先端面 １ｂ 凹み ２ リードフレーム ２ａ 先端面 ２ｂ 円弧面 ３ マウント ３ａ 反射ブロック ３ｂ 円弧面 ３ｃ 凹部 ４ 発光素子 ４ａ 結晶基板 ５ａ，５ｂ ワイヤ[Description of Signs] 1 Lead frame (mounting conductive member) 1a Tip surface 1b Depression 2 Lead frame 2a Tip surface 2b Arc surface 3 Mount 3a Reflection block 3b Arc surface 3c Recess 4 Light emitting element 4a Crystal substrate 5a, 5b Wire
───────────────────────────────────────────────────── フロントページの続き (72)発明者 山口 和也 大阪府高槻市幸町１番１号 松下電子工業 株式会社内 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Kazuya Yamaguchi 1-1, Komachi, Takatsuki-shi, Osaka Matsushita Electronics Corporation
Claims (3)
積層した発光素子と、この発光素子を搭載して電気的に
導通させるマウントを形成した搭載導通部とを備え、マ
ウントが発光方向を指向する面であって少なくとも外部
からの光の入射がある部位に、入射外光の反射輝度を規
制する反射輝度規制手段を含む半導体発光装置。1. A light emitting device comprising: a pn junction semiconductor layer laminated on a crystal substrate; and a mounting conducting portion having a mount for mounting the light emitting device and electrically conducting the light emitting device. A semiconductor light emitting device including a reflection luminance regulating unit that regulates the reflection luminance of external incident light at least on a part of the surface that directs the direction and at which light from the outside is incident.
曝される部分の表面に形成され入射外光を１条の線に沿
う反射光として反射させる曲面プロフィルとしてなる請
求項１記載の半導体発光装置。2. The semiconductor according to claim 1, wherein the reflection luminance regulating means is a curved surface profile formed on a surface of a portion where the mount is exposed to external light and reflecting incident external light as reflected light along one line. Light emitting device.
曝される部分の表面に形成され入射外光を１条の線に沿
う反射光として反射させる直線状の傾斜面プロフィルを
含む請求項１または２記載の半導体発光装置。3. The reflection luminance regulating means includes a linear inclined surface profile formed on a surface of a portion where the mount is exposed to external light and reflecting incident external light as reflected light along one line. 3. The semiconductor light emitting device according to 1 or 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26957897A JP3209160B2 (en) | 1997-10-02 | 1997-10-02 | Semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26957897A JP3209160B2 (en) | 1997-10-02 | 1997-10-02 | Semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11112024A true JPH11112024A (en) | 1999-04-23 |
| JP3209160B2 JP3209160B2 (en) | 2001-09-17 |
Family
ID=17474325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26957897A Expired - Fee Related JP3209160B2 (en) | 1997-10-02 | 1997-10-02 | Semiconductor light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3209160B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003073520A1 (en) * | 2002-02-28 | 2003-09-04 | Rohm Co.,Ltd. | Light emitting diode lamp |
| US7138662B2 (en) | 2002-09-18 | 2006-11-21 | Toyoda Gosei Co., Ltd. | Light-emitting device |
-
1997
- 1997-10-02 JP JP26957897A patent/JP3209160B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003073520A1 (en) * | 2002-02-28 | 2003-09-04 | Rohm Co.,Ltd. | Light emitting diode lamp |
| US7128444B2 (en) | 2002-02-28 | 2006-10-31 | Rohm Co., Ltd. | Light emitting diode lamp |
| CN100346488C (en) * | 2002-02-28 | 2007-10-31 | 罗姆股份有限公司 | Light emitting diode lamp |
| US7138662B2 (en) | 2002-09-18 | 2006-11-21 | Toyoda Gosei Co., Ltd. | Light-emitting device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3209160B2 (en) | 2001-09-17 |
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