JPH10284533A - チップサイズ半導体パッケージの製造方法 - Google Patents

チップサイズ半導体パッケージの製造方法

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Publication number
JPH10284533A
JPH10284533A JP9332916A JP33291697A JPH10284533A JP H10284533 A JPH10284533 A JP H10284533A JP 9332916 A JP9332916 A JP 9332916A JP 33291697 A JP33291697 A JP 33291697A JP H10284533 A JPH10284533 A JP H10284533A
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Japan
Prior art keywords
conductive
electrolytic
semiconductor package
chip
electrolytic cell
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Granted
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JP9332916A
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JP2873954B2 (ja
Inventor
Jea-Weon Cho
チョ ジァエ−ウェオン
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SK Hynix Inc
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LG Semicon Co Ltd
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Abstract

(57)【要約】 （修正有） 【課題】従来のＣＳＰの導電線のメッキ方法を改善し、
容易で廉価にＣＳＰを製造し得るチップサイズ半導体パ
ッケージの製造方法を提供する。 【解決手段】半導体チップ41の上面に形成されたボンデ
ィングパッド上に、導電線45をボンディングした後、前
記導電線45の上端部が電解液50の液面上に露出するよう
に前記半導体チップを電解液50の充填された電解槽55内
に浸し、前記電解槽55の内壁に電解質材60を付着して、
前記導電線45の上端部に共通電極としての導電板65を付
着し、前記導電板65と前記電解槽55の外壁間に電極を連
結してニッケル及び金のメッキを順次行う。

Description

【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は、チップサイズ半導
体パッケージ（Chip Size Semiconductor Package；以
下、ＣＳＰと称す）の製造方法に係るもので、詳しく
は、半導体チップに形成されたボンディングパッド上に
導電線を直接ボンディングして構成するＣＰＳの製造方
法に関するものである。
【０００２】
【従来の技術】従来のＣＳＰの製造方法においては、先
ず、図３（Ａ）に示したように、ボンディングパッド13
の形成された半導体チップ（又はウェーハ）11が構成さ
れ、ボンディングパッド13を除いた前記半導体チップ11
の上部表面に保護層（passivation layer)15を形成す
る。次いで、図３（Ｂ）に示したように、前記ボンディ
ングパッド13及び前記保護層15上にTiW の第１導電層17
及び金（Au）の第２導電層19をスパッタリング（sputte
ring）を施して順次蒸着する。その後、図３（Ｃ）に示
したように、前記ボンディングパッド13上の導電層19の
部位に金（Au）からなる導電線21の一端をボンディング
し、該導電線21を約１〜２mmの長さに切断した後、該導
電線21を直線又は曲線状に形成する。前記導電層19は、
後述する電気メッキを施す際、共通端子として用いられ
る。
【０００３】次いで、図４（Ａ）に示したように、前記
ボンディングパッド13の形成された部位を除いた前記第
２導電層19上にフォトレジスト（Photo Resist）層23を
形成し、次いで、第４（Ｂ）に示したように、前記導電
線21の強度を向上させるため、該導電線21の表面にニッ
ケル(Ni)メッキ層25を形成し、その後、図４（Ｃ）に示
したように、前記ニッケルメッキ層25の表面に金(Au)メ
ッキ層27を形成する。該金メッキ層27は、ＣＳＰを印刷
回路基板に実装するとき、前記導電線21と印刷回路基板
間の電気的ソルダー接合性（Solder joint）を向上さ
せ、腐食を防止する役割を奏する。このとき、ニッケル
及び金メッキは、電気メッキ法を用いて行われる。
【０００４】次いで、前記フォトレジスト層23を除去
し、前記ボンディングパッド13の領域以外の領域に形成
された前記第１及び第２導電層17、19を夫々除去する。
以上のようにして、ＣＳＰが完成する。
【０００５】
【発明が解決しようとする課題】然るに、このような従
来のＣＳＰの製造方法においては、導電線21の強度を向
上させ、さらに、電気的ソルダーの接合性を良くし、腐
食を防止するため、第１導電層17及び第２導電層19のス
パッタリング、フォトレジスト層23の蒸着及びフォトリ
ソグラフィー（食刻）によるフォトレジスト層23のパタ
ーン化のような高難度及び高費用の技術を必要とするた
め、ＣＳＰの製造コストが上昇するという不都合な点が
あった。
【０００６】本発明は、このような従来のＣＳＰの製造
方法の問題点に鑑みてなされたものであり、従来のＣＳ
Ｐの製造方法における導電線のメッキ方法を改善し、Ｃ
ＳＰを容易で廉価に製造し得るＣＳＰ製造方法を提供す
ることを目的とする。
【０００７】
【課題を解決するための手段】このような本発明の目的
を達成するため、本発明のうち、請求項１は、半導体チ
ップ(41)に形成されたボンディングパッド(43)上に導電
線(45)をボンディングする工程と、前記半導体チップ(4
1)及び導電線(45)を、電解液(50)の充填された電解槽(5
5)内に浸し、前記導電線(45)の端部が電解液(50)の液面
上に露出するようにする工程と、前記電解槽(55)内に電
解質材(60)を浸す工程と、前記電解液(50)の液面上に露
出した導電線(45)の前記端部に共通電極としての導電板
(65)を接続する工程と、前記導電板(65)と前記電解液(5
0)に接する電極材の間に電源(70)を接続してメッキを行
う工程と、からなるＣＳＰの製造方法を提供する。
【０００８】請求項１に記載した発明によれば、導電層
のスパッタリングやフォトレジストの蒸着及びフォトリ
ソグラフィー等の工程を省くことができるため、ＣＳＰ
の製造方法を従来の方法に比べて大幅に簡略化すること
ができ、延いては、ＣＳＰの製造コストを低減させるこ
とができる。導電線(45)は、電気伝導性を有する金属で
あれば、いかなる金属からでもつくることができるが、
電気伝導性の高さを考慮すると、請求項２に記載されて
いるように、金（Au）からつくることが好ましい。
【０００９】メッキを起こすための電流は導電板(65)と
電解液(50)に接する電極材との間に流せば足りるが、請
求項３に記載されているように、前記電解槽（55）を導
電性物質で形成する場合には、前記電源(70)は前記導電
板(65)と前記電解槽(55)との間に接続すればよい。例え
ば、電解槽(55)の外壁に電源(70)からの導電線を接続さ
せれば、電源(70)からの電流は電解液(50)に流れる。こ
のため、電源(70)からの導電線を接続させる箇所の選択
範囲が拡大し、設計上の自由度が増す。
【００１０】導電板(65)は、電気伝導性を有する金属で
あれば、いかなる金属からでもつくることができるが、
電気伝導性の高さを考慮すると、請求項４に記載されて
いるように、銅（Cu）からつくることが好ましい。電解
質材(60,61) は任意の導電性の金属からつくることがで
きる。例えば、請求項５及び６に記載されているよう
に、ニッケル（Ni）や金（Au）を選択することができ
る。
【００１１】また、複数種類の金属を導電線(45)にメッ
キする場合には、請求項７に記載したように、電解質材
（60，61）を交換すればよい。複数種類の金属を導電線
(45)にメッキする場合において、最初にニッケルをメッ
キし、最後に金をメッキすることが強度又は耐腐食性の
観点から好ましい。このため、請求項８に記載のよう
に、最初に用いる電解質材(60)はニッケル(Ni)からな
り、最後に用いる電解質材(61)は金(Au)からなるもので
あることが好ましい。
【００１２】電解質材(60)は電解液(50)の中に位置して
いれば足りるが、電解質材(60)の容積の減少の度合いな
どの観察を容易に行うため、請求項９に記載されている
ように、前記電解質材(60)は前記電解槽(65)の内壁に付
着されていることが好ましい。
【００１３】
【発明の実施の形態】以下、本発明に係る実施の形態を
図面を用いて説明する。先ず、図１（Ａ）に示したよう
に、半導体チップ41に形成された複数のボンディングパ
ッド43上に金(Au)の導電線45を夫々ボンディングする。
導電線45の先端はほぼＵ字形に湾曲し、内側を向いてい
る。
【００１４】次いで、図１（Ｂ）に示したように、半導
体チップ41を、電解液50の充填された電解槽55内に浸
す。この場合、前記半導体チップ41にボンディングされ
た全ての導電線45の各上端部を電解液50の液面上に露出
させる。電解槽55は導電性材料からつくられている。次
いで、図２（Ａ）に示したように、前記電解槽55の内壁
に、ニッケル(Ni)からなる電解質材60を付着するが、該
電解質材60は電解液50内に全体が浸されるようにする。
尚、電解質材60は必ずしも電解槽55の内壁に付着させる
必要はなく、電解液50の中に沈めておいてもよい。ま
た、電解質材60の全体が電解液50に浸されることも必ず
しも必要でなく、電解質材60の少なくとも一部が電解液
50に浸されていればよい。
【００１５】次いで、図２（Ｂ）に示したように、前記
電解液50の液面上に露出した導電線45の上端部に共通電
極としての導電板65を接続する。該導電板65は銅（Cu）
を用いることが好ましい。次いで、図２（Ｃ）に示した
ように、前記導電板65と前記電解槽55の外壁間に電源70
を連結し、電解槽55を一方の電極材として電気メッキを
実施すると、電解槽55内の電解質材60、即ち、ニッケル
がイオン状態になり、該イオン状態のニッケルは前記金
の導電線45の表面に付着する。即ち、メッキが行われ
る。
【００１６】ニッケルメッキが終了すると、電源70と導
電板65及び電解槽55との間の接続を解除し、ニッケルか
らなる電解質材60を金からなる電解質材61に代えて前記
電解槽55の内壁に再び付着させ、再び電源70を導電板65
及び電解槽55の間に接続し、メッキを行うと、金がイオ
ン状態になり、該金は前記導電線45の表面に既にメッキ
されたニッケル膜表面に付着し、金メッキが行われる。
尚、ニッケルメッキ終了後に金メッキを行う際には、電
解質材と同時に電解液も交換するようにしてもよい。
【００１７】以上のように、本実施形態によれば、導電
層のスパッタリングやフォトレジストの蒸着及びフォト
リソグラフィー等の工程を省くことができるので、ＣＳ
Ｐの製造方法を従来の方法よりも大幅に簡略化すること
ができる。また、前記電解質材60を所望の金属に交換す
ることにより、前記導電線45の表面を所望の金属で簡便
にメッキすることができる。さらに、電解質材の交換を
繰り返し、所望の回数だけメッキを繰り返すことによっ
て、導電線を所望の数の所望の金属の層でメッキするこ
とができる。
【００１８】
【発明の効果】以上、説明した請求項１〜９に記載した
発明によれば、単に、半導体チップにボンディングされ
た全ての導電線を電解槽内の電解液に浸し、電解質材を
用いて導電線の表面に電気メッキを施すだけで、導電層
のスパッタリング、フォトレジストの蒸着及びフォトリ
ソグラフィー等の時間及び費用のかかる工程を行う必要
がなく、容易で廉価にチップサイズ半導体パッケージを
製造することができる。
【図面の簡単な説明】
【図１】本発明に係るチップサイズ半導体パッケージの
製造方法の一実施形態の各工程を示す図である。
【図２】図１に示した工程に続けて行われる各工程を示
す図である。
【図３】従来のチップサイズ半導体パッケージの製造方
法の各工程を示す図である。
【図４】図３に示した工程に続けて行われる各工程を示
す図である。
【符号の説明】
41 半導体チップ 43 ボンディングパッド 45 導電線 50 電解液 55 電解槽 60，61 電解質材 65 導電板 70 電源

Claims (9)

    【特許請求の範囲】
  1. 【請求項１】半導体チップ（41）に形成されたボンディ
    ングパッド（43）上に導電線（45）をボンディングする
    工程と、 該導電線（45）の端部が、電解液（50）の液面上に露出
    するように、前記半導体チップ（41）及びボンディング
    パッド（43）を、電解液（50）が充填された電解槽（5
    5）内に浸す工程と、 前記電解槽（55）内に電解質材（60）を浸す工程と、 前記電解液（50）の液面上に露出した導電線（45）の前
    記端部に共通電極としての導電板（65）を接続する工程
    と、 前記導電板（65）と前記電解液(50)に接する電極材の間
    に電源（70）を接続しメッキを行う工程と、 からなるチップサイズ半導体パッケージの製造方法。
  2. 【請求項２】前記導電線（45）は、金（Au）を用いて形
    成されることを特徴とする請求項１記載のチップサイズ
    半導体パッケージの製造方法。
  3. 【請求項３】前記電解槽（55）は、導電性物質を用いて
    形成され、前記電極材として電解槽（55）を用い、前記
    電源(70)が前記導電板(65)と前記電解槽(55)との間に接
    続されることを特徴とする請求項１又は２記載のチップ
    サイズ半導体パッケージの製造方法。
  4. 【請求項４】前記導電板（65）は、銅（Cu）を用いて形
    成することを特徴とする請求項１〜３のいずれか１つに
    記載のチップサイズ半導体パッケージの製造方法。
  5. 【請求項５】前記電解質材（60）は、ニッケル（Ni）を
    用いて形成することを特徴とする請求項１〜４のいずれ
    か１つに記載のチップサイズ半導体パッケージの製造方
    法。
  6. 【請求項６】前記電解質材（60）は、金（Au）を用いて
    形成することを特徴とする請求項１〜４のいずれか１つ
    に記載のチップサイズ半導体パッケージの製造方法。
  7. 【請求項７】前記導電板（65）と前記電解液(50)の間に
    電源（70）を接続しメッキを行う工程は、前記電解質材
    (60,61) を交換して複数回行うことを特徴とする請求項
    １記載のチップサイズ半導体パッケージの製造方法。
  8. 【請求項８】最初に用いられる電解質材(60)はニッケル
    (Ni)からなり、最後に用いられる電解質材(61)は金(Au)
    からなることを特徴とする請求項７記載のチップサイズ
    半導体パッケージの製造方法。
  9. 【請求項９】前記電解質材(60)は前記電解槽(65)の内壁
    に付着されるものであることを特徴とする請求項１〜８
    のいずれか１つに記載のチップサイズ半導体パッケージ
    製造方法。
JP9332916A 1996-12-28 1997-12-03 チップサイズ半導体パッケージの製造方法 Expired - Fee Related JP2873954B2 (ja)

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KR1019960075052A KR100214545B1 (ko) 1996-12-28 1996-12-28 칩 사이즈 반도체 패키지의 제조 방법
KR75052/1996 1996-12-28

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KR19980055816A (ko) 1998-09-25
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US5863816A (en) 1999-01-26
DE19728183A1 (de) 1998-07-02
KR100214545B1 (ko) 1999-08-02

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