JPH10276384A - Video detection circuit - Google Patents

Video detection circuit

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Publication number
JPH10276384A
JPH10276384A JP7605897A JP7605897A JPH10276384A JP H10276384 A JPH10276384 A JP H10276384A JP 7605897 A JP7605897 A JP 7605897A JP 7605897 A JP7605897 A JP 7605897A JP H10276384 A JPH10276384 A JP H10276384A
Authority
JP
Japan
Prior art keywords
circuit
video
detection circuit
control voltage
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP7605897A
Other languages
Japanese (ja)
Inventor
Hatsuki Suzuki
初己 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP7605897A priority Critical patent/JPH10276384A/en
Publication of JPH10276384A publication Critical patent/JPH10276384A/en
Ceased legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To reduce sound buzz noise produced in the video detection circuit. SOLUTION: The detection circuit is provided with a detection circuit 2 and a phase comparator circuit 3 that receive respectively a television signal whose frequency is converted into an intermediate frequency, a voltage controlled oscillator circuit 4 that gives an oscillation signal to the detection circuit 2 and the phase comparator circuit 3, and a low pass filter 5 that smooths an error voltage from the phase comparator circuit 3 and provides the smoothed voltage to the voltage controlled oscillator circuit 4 as its control voltage. Then part of a video signal whose level is fluctuated based on fluctuation in the level of the control voltage is superimposed on the control voltage so as to make a phase of the level fluctuation in the control voltage opposite to a phase of the level fluctuation in the video signal.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、テレビ受信機の映
像検波回路、詳しくは、PLL検波方式を用いた同期検
波回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video detection circuit for a television receiver, and more particularly, to a synchronous detection circuit using a PLL detection method.

【0002】[0002]

【従来の技術】従来の映像検波回路を、図2に示すPL
L検波方式を用いた同期検波回路について説明する。図
2において、図示しないテレビチュ−ナの混合回路で中
間周波数(日本仕様の映像中間周波数では58.75M
Hz)に周波数変換され、同様に、図示しないSAWフ
ィルタで所定の選択度特性を与えられたテレビ信号は、
中間周波増幅回路21で増幅された後に検波回路22に
入力されるとともに、位相比較回路23にも入力され
る。この検波回路22としては、二重平衡型の検波回路
が用いられる。
2. Description of the Related Art A conventional video detection circuit is a PL detector shown in FIG.
A synchronous detection circuit using the L detection method will be described. In FIG. 2, an intermediate frequency (58.75M for a Japanese intermediate video frequency) is used in a mixing circuit of a television tuner (not shown).
Hz), and similarly, a television signal given a predetermined selectivity characteristic by a SAW filter (not shown)
After being amplified by the intermediate frequency amplification circuit 21, the signal is input to the detection circuit 22 and also input to the phase comparison circuit 23. As the detection circuit 22, a double-balanced detection circuit is used.

【0003】一方、検波回路22と位相比較回路23と
には、電圧制御発振回路(以下、VCOという)24か
らの発振信号が入力され、位相比較回路23では、中間
周波増幅回路21からのテレビ信号とVCO24からの
発振信号とのそれぞれの位相が比較され、この位相比較
回路23からは位相差に応じた誤差電圧が出力される。
On the other hand, an oscillation signal from a voltage controlled oscillation circuit (hereinafter, referred to as VCO) 24 is input to a detection circuit 22 and a phase comparison circuit 23, and the phase comparison circuit 23 outputs a television signal from the intermediate frequency amplification circuit 21. The phases of the signal and the oscillation signal from the VCO 24 are compared, and an error voltage corresponding to the phase difference is output from the phase comparison circuit 23.

【0004】位相比較回路23から出力された誤差電圧
は、ロ−パスフィルタ25によって平滑され、VCO2
4に制御電圧として入力される。従って、位相比較回路
23、VCO24、ロ−パスフィルタ25はPLLの閉
ル−プを構成し、VCO24は中間周波数に周波数変換
されたテレビ信号の搬送波(映像中間周波数)と位相が
合致した(同期した)発振周波数(58.75MHz)
で発振し、その出力が検波回路22に入力される。
The error voltage output from the phase comparison circuit 23 is smoothed by a low-pass filter 25,
4 is input as a control voltage. Accordingly, the phase comparison circuit 23, the VCO 24, and the low-pass filter 25 constitute a closed loop of the PLL, and the VCO 24 is in phase with the carrier (video intermediate frequency) of the television signal whose frequency has been converted to the intermediate frequency (synchronous). Oscillation frequency (58.75 MHz)
And its output is input to the detection circuit 22.

【0005】従って、検波回路22には、中間周波数に
周波数変換されたテレビ信号と、このテレビ信号の搬送
波と同じ周波数の発振信号とは入力されることになり、
ここでビデオ信号が同期検波される。検波回路22で検
波されたビデオ信号はビデオ増幅回路26で増幅され、
図示しない後段の回路で処理される。
Accordingly, the television signal whose frequency has been converted to the intermediate frequency and an oscillation signal having the same frequency as the carrier of the television signal are input to the detection circuit 22,
Here, the video signal is synchronously detected. The video signal detected by the detection circuit 22 is amplified by the video amplification circuit 26,
The processing is performed by a subsequent circuit (not shown).

【0006】[0006]

【発明が解決しようとする課題】以上の従来の映像検波
回路では、テレビ信号の伝送方式として残留側波帯方式
を採用しているため、音声系の特性には、以下に説明す
る、いわゆるナイキストスロ−プに起因するバズ雑音が
発生する。即ち、アンテナから入力したテレビ信号(R
F信号)はチュ−ナを介して中間周波信号に変換され、
図示しないSAWフィルタで作られた所定の選択度特性
である残留側波帯に対応するナイキストスロ−プを通過
する。その結果、映像キャリア近傍のサイドバンドが削
られるため、映像キャリアの上下のアッパ−サイドバン
ドとロア−サイドバンドのベクトル量が異なり、合成ベ
クトル量に位相歪みが発生する。
In the above-described conventional video detection circuit, the vestigial sideband system is employed as the television signal transmission system. Therefore, the characteristics of the audio system include the so-called Nyquist Buzz noise due to the slope occurs. That is, the television signal (R
F signal) is converted to an intermediate frequency signal via a tuner,
The signal passes through a Nyquist slope corresponding to a vestigial sideband which is a predetermined selectivity characteristic created by a SAW filter (not shown). As a result, the side band near the video carrier is cut off, so that the upper and lower upper side bands and the lower side band of the video carrier have different vector amounts, and phase distortion occurs in the combined vector amount.

【0007】この位相歪みが発生すると位相比較回路2
3からの誤差電圧が変動する。この変動は、ロ−パスフ
ィルタ25で充分に低減することは困難であるので、V
CO24に入力される制御電圧が変動する。従って、P
LLのVCO24は制御電圧の変動に同期して変調を受
ける。このため、検波回路22で検波されたビデオ信号
には、VCO24で発生した変調成分が重畳されること
になり、VCO24に入力される制御電圧の変動に同期
する変動成分が含まれることになる。この変調はFM変
調であるためテレビ画像では視感上では問題にならない
が音声バズ雑音の発生原因となるのである。そこで、こ
の発明では、映像検波回路で発生する音声バズ雑音を低
減することを目的とする。
When this phase distortion occurs, the phase comparison circuit 2
3 fluctuates. This variation is difficult to sufficiently reduce with the low-pass filter 25.
The control voltage input to the CO 24 fluctuates. Therefore, P
The LL VCO 24 is modulated in synchronization with the fluctuation of the control voltage. Therefore, the video signal detected by the detection circuit 22 is superimposed with the modulation component generated by the VCO 24, and includes a fluctuation component synchronized with the fluctuation of the control voltage input to the VCO 24. Since this modulation is FM modulation, it does not pose a problem in visual perception in television images, but it causes audio buzz noise. Therefore, an object of the present invention is to reduce audio buzz noise generated in a video detection circuit.

【0008】[0008]

【課題を解決するための手段】上記の課題を解決するた
め、本発明の映像検波回路は、中間周波数に周波数変換
されたテレビ信号がそれぞれ入力される検波回路及び位
相比較回路と、前記検波回路及び前記位相比較回路に発
振信号を入力する電圧制御発振回路と、前記位相比較回
路からの誤差電圧を平滑して前記電圧制御発振回路に制
御電圧として供給するロ−パスフィルタとを備え、前記
制御電圧のレベル変動に基づいてレベル変動する前記ビ
デオ信号の一部を前記制御電圧に重畳し、前記制御電圧
のレベル変動の位相と前記ビデオ信号のレベル変動の位
相とを互いに逆位相となるようにした。
In order to solve the above-mentioned problems, a video detection circuit according to the present invention comprises a detection circuit and a phase comparison circuit to which a television signal frequency-converted to an intermediate frequency is inputted, respectively, and the detection circuit A voltage-controlled oscillation circuit that inputs an oscillation signal to the phase comparison circuit; and a low-pass filter that smoothes an error voltage from the phase comparison circuit and supplies the voltage as a control voltage to the voltage-controlled oscillation circuit. A part of the video signal whose level fluctuates based on the level fluctuation of the voltage is superimposed on the control voltage, and the phase of the level fluctuation of the control voltage and the phase of the level fluctuation of the video signal are opposite to each other. did.

【0009】また、本発明の映像検波回路は、前記検波
回路で検波された前記ビデオ信号を増幅する映像増幅回
路を備え、前記映像増幅回路に増幅用のトランジスタを
用い、前記トランジスタのコレクタ又から前記制御電圧
に重畳する前記ビデオ信号を取り出して前記制御電圧に
重畳した。
The video detection circuit according to the present invention further includes a video amplification circuit for amplifying the video signal detected by the detection circuit, wherein the video amplification circuit uses an amplifying transistor, and a collector of the transistor. The video signal superimposed on the control voltage was extracted and superimposed on the control voltage.

【0010】[0010]

【発明の実施の形態】本発明の映像検波回路を、図1に
示すPLL検波方式を用いた同期検波回路について説明
する。図1において、図示しないテレビチュ−ナの混合
回路で中間周波数(日本仕様の映像中間周波数では5
8.75MHz)に周波数変換され、同様に、図示しな
いSAWフィルタで所定の選択度特性を与えられたテレ
ビ信号は、中間周波増幅回路1に入力される。テレビ信
号は、この中間周波増幅回路1で増幅された後に、検波
回路である二重平衡型検波回路2に入力されるととも
に、位相比較回路3にも入力される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A video detection circuit according to the present invention will be described with reference to a synchronous detection circuit using a PLL detection system shown in FIG. In FIG. 1, a mixing circuit of a television tuner (not shown) uses an intermediate frequency (5
The television signal, which has been frequency-converted to 8.75 MHz) and given a predetermined selectivity characteristic by a SAW filter (not shown), is input to the intermediate frequency amplifier circuit 1. After the television signal is amplified by the intermediate frequency amplifier circuit 1, the television signal is input to a double balance type detection circuit 2 which is a detection circuit, and is also input to a phase comparison circuit 3.

【0011】一方、二重平衡型検波回路2と位相比較回
路3とには、電圧制御発振回路(以下、VCOという)
4からの発振信号が入力されており、位相比較回路3で
は、中間周波増幅回路1からのテレビ信号の搬送波(こ
こでは映像中間周波信号における搬送波)とVCO4か
らの発振信号とのそれぞれの位相が比較され、この位相
比較回路3からは位相差に応じた誤差電圧が出力され
る。
On the other hand, the double balanced type detection circuit 2 and the phase comparison circuit 3 include a voltage controlled oscillation circuit (hereinafter referred to as VCO).
In the phase comparison circuit 3, the phases of the carrier of the television signal from the intermediate frequency amplification circuit 1 (here, the carrier of the video intermediate frequency signal) and the oscillation signal from the VCO 4 are adjusted. The phase comparison circuit 3 outputs an error voltage corresponding to the phase difference.

【0012】位相比較回路3から出力された誤差電圧
は、ロ−パスフィルタ25によって平滑され、VCO4
に制御電圧として入力される。従って、位相比較回路
3、VCO4、ロ−パスフィルタ5はPLLの閉ル−プ
を構成することになり、VCO4は、位相比較回路3か
らの誤差電圧に基づく制御電圧によってその発振周波数
が制御され、中間周波数に周波数変換されたテレビ信号
の搬送波周波数に一致し、しかも、位相も一致した(同
期した)発振周波数(58.75MHz)で発振する。
The error voltage output from the phase comparison circuit 3 is smoothed by a low-pass filter 25,
Is input as a control voltage. Therefore, the phase comparison circuit 3, VCO 4 and low-pass filter 5 constitute a closed loop of the PLL, and the oscillation frequency of the VCO 4 is controlled by the control voltage based on the error voltage from the phase comparison circuit 3. Oscillate at an oscillation frequency (58.75 MHz) that matches (synchronizes with) the carrier frequency of the television signal whose frequency has been converted to the intermediate frequency.

【0013】従って、二重平衡型検波回路2には、中間
周波数に周波数変換されたテレビ信号と、このテレビ信
号の搬送波と同じ周波数の発振信号とが入力され、ここ
で、同期検波されることによりビデオ信号が得られる。
二重平衡検波回路2で検波されたビデオ信号はビデオ増
幅回路6で増幅され、図示しない後段の回路で処理され
る。
Therefore, the television signal whose frequency has been converted to the intermediate frequency and the oscillation signal having the same frequency as the carrier of this television signal are input to the double-balanced detection circuit 2, where they are synchronously detected. Gives a video signal.
The video signal detected by the double balanced detection circuit 2 is amplified by the video amplification circuit 6 and processed by a subsequent circuit (not shown).

【0014】ここで、ビデオ増幅回路6には、増幅用の
PNPトランジスタ7が用いられ、そのエミッタ及びコ
レクタに負荷抵抗8、9が接続されている。そして、エ
ミッタからのビデオ信号が図示しない後段の回路に導か
れ、また、コレクタからは、エミッタからのビデオ信号
とは逆位相のビデオ信号が取り出される。この逆位相の
ビデオ信号は結合コンデンサ10を介してVCO4に制
御電圧として入力される。
Here, the video amplifying circuit 6 uses a PNP transistor 7 for amplification, and load resistors 8 and 9 are connected to the emitter and the collector. Then, the video signal from the emitter is guided to a subsequent circuit (not shown), and a video signal having the opposite phase to the video signal from the emitter is extracted from the collector. The video signal having the opposite phase is input to the VCO 4 via the coupling capacitor 10 as a control voltage.

【0015】ところで、PLLを構成するVCO4は、
ナイキストスロ−プに起因する位相歪みによってFM変
調を受けるため、映像検波されたビデオ信号にはこの位
相歪みによるFM成分が重畳されることになる。従っ
て、ビデオ信号は、FM変調を受けたVCO4の周波数
変動に対応してレベルが変動することになる。そこで本
発明では、このビデオ信号のレベル変動を、位相比較回
路3からの誤差電圧に基づく制御電圧に重畳してVCO
4に入力するようにしている。
By the way, the VCO 4 constituting the PLL is
Since FM modulation is applied due to phase distortion caused by the Nyquist slope, an FM component due to the phase distortion is superimposed on a video signal detected by video detection. Therefore, the level of the video signal fluctuates according to the frequency fluctuation of the VCO 4 that has been subjected to the FM modulation. Therefore, in the present invention, the level fluctuation of the video signal is superimposed on the control voltage based on the error voltage from the phase comparison circuit 3 so that the VCO
4 is input.

【0016】この場合、映像増幅回路6のトランジスタ
7のコレクタからのビデオ信号のレベル変動の位相は、
位相比較回路3からの制御電圧の位相とは逆位相の関係
になっている。その結果、位相比較回路からの制御電圧
は、映像増幅回路6からのビデオ信号のレベル変動によ
って相殺されることになり、VCO4はFM変調を受け
なくなる。従って、二重平衡型検波回路2からのビデオ
信号にはFM成分が重畳されることなく、音声バズ雑音
が発生しなくなる。
In this case, the phase of the level change of the video signal from the collector of the transistor 7 of the video amplifier 6 is
The phase of the control voltage from the phase comparison circuit 3 is opposite to the phase of the control voltage. As a result, the control voltage from the phase comparison circuit is canceled by the level fluctuation of the video signal from the video amplification circuit 6, and the VCO 4 does not receive the FM modulation. Accordingly, no FM component is superimposed on the video signal from the double balanced detection circuit 2, and no audio buzz noise occurs.

【0017】そして、この発明では、映像増幅回路6の
トランジスタ7から結合コンデンサ10を介してビデオ
信号をVCO4の制御電圧に重畳するだけなので、簡単
な構成で音声バズ雑音の原因となるVCO4のFM変調
を防止できる。オ信号は映像増幅回路6から容易に得る
ことができる。
In the present invention, since the video signal is merely superimposed on the control voltage of the VCO 4 from the transistor 7 of the video amplifier circuit 6 via the coupling capacitor 10, the FM of the VCO 4 which causes audio buzz noise can be realized with a simple configuration. Modulation can be prevented. The signal e can be easily obtained from the video amplifier circuit 6.

【0018】[0018]

【発明の効果】以上のように、本発明の映像検波回路
は、中間周波数に周波数変換されたテレビ信号がそれぞ
れ入力される検波回路及び位相比較回路と、検波回路及
び位相比較回路に発振信号を入力する電圧制御発振回路
と、位相比較回路からの誤差電圧を平滑して電圧制御発
振回路に制御電圧として供給するロ−パスフィルタとを
備え、制御電圧のレベル変動に基づいてレベル変動する
ビデオ信号の一部を制御電圧に重畳し、制御電圧のレベ
ル変動の位相とビデオ信号のレベル変動の位相とを互い
に逆位相となるようにしたので、VCOに入力される制
御電圧は、映像増幅回路からのビデオ信号のレベル変動
によって相殺されることになり、電圧制御発振回路はF
M変調を受けなくなる。従って、検波回路からのビデオ
信号にはFM成分が重畳されることなく、音声バズ雑音
が発生しなくなる。
As described above, the video detection circuit according to the present invention comprises a detection circuit and a phase comparison circuit to which a television signal whose frequency has been converted to an intermediate frequency is input, and an oscillation signal to the detection circuit and the phase comparison circuit. A video signal having a voltage-controlled oscillating circuit to be input and a low-pass filter for smoothing an error voltage from the phase comparison circuit and supplying the same to the voltage-controlled oscillating circuit as a control voltage; Is superimposed on the control voltage, so that the phase of the level fluctuation of the control voltage and the phase of the level fluctuation of the video signal are opposite to each other, so that the control voltage input to the VCO is output from the video amplifier circuit. Is canceled out by the level fluctuation of the video signal of
No more M modulation. Therefore, no FM component is superimposed on the video signal from the detection circuit, and no audio buzz noise occurs.

【0019】また、、本発明の映像検波回路は、検波回
路で検波されたビデオ信号を増幅する映像増幅回路を備
え、映像増幅回路に増幅用のトランジスタを用い、トラ
ンジスタのコレクタ又から制御電圧に重畳するビデオ信
号を取り出して制御電圧に重畳したので、映像増幅回路
を用いることで、制御電圧の変動の位相に対してレベル
の変動が逆位相となるビデオ信号が容易に得ることがで
きる。
Further, the video detection circuit of the present invention includes a video amplification circuit for amplifying the video signal detected by the detection circuit, uses an amplification transistor in the video amplification circuit, and converts the voltage from the collector of the transistor to the control voltage. Since the video signal to be superimposed is taken out and superimposed on the control voltage, the use of the video amplifier circuit makes it possible to easily obtain a video signal whose level fluctuation is opposite in phase to the control voltage fluctuation phase.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の映像検波回路図である。FIG. 1 is a diagram of a video detection circuit according to the present invention.

【図2】従来の映像検波回路図である。FIG. 2 is a diagram of a conventional video detection circuit.

【符号の説明】[Explanation of symbols]

1 中間周波増幅回路 2 二重平衡型検波回路 3 位相比較回路 4 電圧制御発振回路 5 ロ−パスフィルタ 6 映像増幅回路 7 トランジスタ 8.9 負荷抵抗 10 結合コンデンサ REFERENCE SIGNS LIST 1 intermediate frequency amplifier circuit 2 double balanced detector circuit 3 phase comparator circuit 4 voltage controlled oscillator circuit 5 low-pass filter 6 video amplifier circuit 7 transistor 8.9 load resistance 10 coupling capacitor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 中間周波数に周波数変換されたテレビ信
号がそれぞれ入力される検波回路及び位相比較回路と、
前記検波回路及び前記位相比較回路に発振信号を入力す
る電圧制御発振回路と、前記位相比較回路からの誤差電
圧を平滑して前記電圧制御発振回路に制御電圧として供
給するロ−パスフィルタとを備え、前記制御電圧のレベ
ル変動に基づいてレベル変動する前記ビデオ信号の一部
を前記制御電圧に重畳し、前記制御電圧のレベル変動の
位相と前記ビデオ信号のレベル変動の位相とを互いに逆
位相となるようにしたことを特徴とする映像検波回路。
1. A detection circuit and a phase comparison circuit to which a television signal frequency-converted to an intermediate frequency is input, respectively.
A voltage-controlled oscillation circuit that inputs an oscillation signal to the detection circuit and the phase comparison circuit; and a low-pass filter that smoothes an error voltage from the phase comparison circuit and supplies the voltage as a control voltage to the voltage-controlled oscillation circuit. Superimposing a part of the video signal whose level fluctuates based on the level fluctuation of the control voltage on the control voltage, and setting the phase of the level fluctuation of the control voltage and the phase of the level fluctuation of the video signal to be opposite to each other. A video detection circuit characterized in that:
【請求項2】 前記検波回路で検波された前記ビデオ信
号を増幅する映像増幅回路を備え、前記映像増幅回路に
増幅用のトランジスタを用い、前記トランジスタのコレ
クタ又から前記制御電圧に重畳する前記ビデオ信号を取
り出して前記制御電圧に重畳したことを特徴とする請求
項1記載の映像検波回路。
2. A video amplifying circuit for amplifying the video signal detected by the detection circuit, wherein the video amplifying circuit uses an amplifying transistor, and the video is superimposed on the control voltage from a collector of the transistor or from the collector. 2. The video detection circuit according to claim 1, wherein a signal is extracted and superimposed on the control voltage.
JP7605897A 1997-03-27 1997-03-27 Video detection circuit Ceased JPH10276384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7605897A JPH10276384A (en) 1997-03-27 1997-03-27 Video detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7605897A JPH10276384A (en) 1997-03-27 1997-03-27 Video detection circuit

Publications (1)

Publication Number Publication Date
JPH10276384A true JPH10276384A (en) 1998-10-13

Family

ID=13594182

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7605897A Ceased JPH10276384A (en) 1997-03-27 1997-03-27 Video detection circuit

Country Status (1)

Country Link
JP (1) JPH10276384A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008011129A (en) * 2006-06-29 2008-01-17 Sanyo Electric Co Ltd Vif carrier reproducing circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008011129A (en) * 2006-06-29 2008-01-17 Sanyo Electric Co Ltd Vif carrier reproducing circuit

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