JPH10261361A - Manufacture of vacuum micro element - Google Patents

Manufacture of vacuum micro element

Info

Publication number
JPH10261361A
JPH10261361A JP6564297A JP6564297A JPH10261361A JP H10261361 A JPH10261361 A JP H10261361A JP 6564297 A JP6564297 A JP 6564297A JP 6564297 A JP6564297 A JP 6564297A JP H10261361 A JPH10261361 A JP H10261361A
Authority
JP
Japan
Prior art keywords
diamond
layer
vacuum micro
gate electrode
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6564297A
Other languages
Japanese (ja)
Inventor
Hisashi Sakuma
尚志 佐久間
Tadashi Sakai
忠司 酒井
Tomio Ono
富男 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP6564297A priority Critical patent/JPH10261361A/en
Priority to US09/042,738 priority patent/US6103133A/en
Publication of JPH10261361A publication Critical patent/JPH10261361A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a vacuum micro element using diamond on its emitter. SOLUTION: A silicon board 102 is coated on its surface with an oxide film serving as a gate insulating layer 101 and further a molybdenum(Mo) film serving as a gate electrode layer 103 is formed. The insulating layer 101 and the electrode layer 103 is partly etched to form an opening, in which diamond is grown. The diamond is raised there into the shape of a circular cone so as to gradually close the opening. The diamond depositing on the Mo layer 103 is finally peeled off to finish a vacuum micro element.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電界放出型冷陰極
を有する真空マイクロ素子の構造及びその作製技術に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a vacuum micro device having a field emission type cold cathode and a manufacturing technique thereof.

【0002】[0002]

【従来の技術】電界放出型の真空マイクロ素子は、その
高速応答の可能性、耐放射線・耐高温特性の向上の可能
性、さらに高精細で自発光型のディスプレイの可能性な
どから、近年活発に研究開発が行われている。エミッタ
材料は電子親和力の小さい材料が使用されている。
2. Description of the Related Art In recent years, field-emission vacuum microdevices have been active due to the possibility of high-speed response, the possibility of improving radiation resistance and high temperature resistance, and the possibility of high-definition, self-luminous display. R & D is ongoing. As the emitter material, a material having a small electron affinity is used.

【0003】近年、ダイヤモンドの電子親和力が0に近
いことが見出され(例えばJ.VanらJ.Vac.S
ci.Technol.B,10,4,(199
2))、ダイヤモンドをエミッタ材料にした真空マイク
ロ素子の形成方法はさまざま提案されている。ダイヤモ
ンドはその性質上Si等の半導体や金属に比べ半導体プ
ロセスでの加工が困難とされている。そのためダイヤモ
ンドエミッタの形成方法には(1)円錐体構造をした導
体(例えばMo)にコーティングする、(2)Si基板
に異方性エッチング等によって形成した尖端型鋳型に埋
め込み形成をする、などがある。しかしながら(1)の
方法において形成されたダイヤモンドは粒状で導体にラ
ンダムに付着しておりエミッタとしての特性の安定性、
再現性が低い。また、(2)の場合はダイヤモンドエミ
ッタ形状は再現性良く形成されるがダイヤモンドエミッ
タ形成後、尖端型鋳型作製に用いたSi基板をダイヤモ
ンドエミッタを露出させるため完全除去しなければなら
ない。このため工業的に鑑みると製造コストを上げる要
因となる。
In recent years, it has been found that the electron affinity of diamond is close to 0 (for example, J. Van et al., J. Vac. S.
ci. Technol. B, 10, 4, (199
2)), various methods for forming a vacuum micro device using diamond as an emitter material have been proposed. It is considered that diamond is more difficult to process in a semiconductor process than a semiconductor such as Si or a metal due to its properties. Therefore, methods for forming a diamond emitter include (1) coating a conductor (for example, Mo) having a conical structure, and (2) embedding and forming in a pointed mold formed on a Si substrate by anisotropic etching or the like. is there. However, the diamond formed by the method (1) is granular and adheres to the conductor at random, so that the stability of the characteristics as an emitter,
Low reproducibility. In the case of (2), the diamond emitter shape is formed with good reproducibility, but after the diamond emitter is formed, the Si substrate used for manufacturing the pointed mold must be completely removed to expose the diamond emitter. Therefore, from an industrial point of view, this is a factor that increases the manufacturing cost.

【0004】[0004]

【発明が解決しようとする課題】本発明では以上のよう
な真空マイクロ素子の現状に鑑みて、エミッタ材料とし
てダイヤモンドを使用する場合、ダイヤモンドエミッタ
の安定性、再現性を向上させ、更に低コスト化を可能と
する新しい真空マイクロ素子の製作方法を提案する。
According to the present invention, in view of the above-mentioned current situation of vacuum microdevices, when diamond is used as the emitter material, the stability and reproducibility of the diamond emitter are improved, and the cost is further reduced. We propose a new vacuum micro device fabrication method that enables

【0005】[0005]

【課題を解決するための手段】本発明の骨子は、Si基
板上にゲート絶縁層となる酸化膜を形成し、続いてゲー
ト電極層になるモリブデン(Mo)を形成する。ゲート
絶縁層とゲート電極層をエッチングによりピンホールを
開け、ダイヤモンドを成長させる。ピンホールの直径が
ダイヤモンドの成長に従って塞がることを利用しピンホ
ール内にダイヤモンドを円錐状に成長させる。Mo上に
堆積したダイヤモンドはMoとの密着性が非常に低いこ
とから容易に剥離することができる。本発明によれば、
従来例のように、ダイヤモンドエミッタ形状の安定性、
再現性が向上し、更に製造コストの大幅な削減が期待で
きる。
The gist of the present invention is to form an oxide film serving as a gate insulating layer on a Si substrate and subsequently form molybdenum (Mo) serving as a gate electrode layer. A pinhole is formed by etching the gate insulating layer and the gate electrode layer, and diamond is grown. Utilizing that the diameter of the pinhole is closed as the diamond grows, the diamond grows conically in the pinhole. Diamond deposited on Mo can be easily peeled off due to very low adhesion with Mo. According to the present invention,
As in the conventional example, the stability of the diamond emitter shape,
The reproducibility is improved, and a significant reduction in manufacturing cost can be expected.

【0006】[0006]

【発明の実施の形態】以下、図面に示す実施の形態を参
照して本発明を説明する。図1〜図7は本発明の実施の
形態に係わる真空マイクロ素子の製造方法を示す図であ
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments shown in the drawings. 1 to 7 are views showing a method for manufacturing a vacuum micro device according to an embodiment of the present invention.

【0007】まず図1に示すように、第一の基板10
2、例えばSi基板上にゲート絶縁層となる酸化膜10
1を形成する。酸化膜は熱酸化膜、プラズマCVD法に
より形成した酸化膜どちらでもよい。本実施例では熱酸
化膜を2μmの膜厚で形成した。次に図2に示すよう
に、ゲート電極層となるモリブデン(Mo)103をス
パッタリング法等で酸化膜101上に形成する。本実施
例では0.5μmの膜厚で形成した。Mo上にレジスト
104をスピンコート法により塗布し、図3に示すよ
う、一般的な露光・現像を行い、例えば、直径3μmの
開口部104aが得られるようパターニングを行った
後、図4に示すよう、例えば反応性イオンエッチング法
によりゲート電極層であるMo層103、次いでゲート
絶縁層となる熱酸化SiO2膜101をエッチングす
る。エッチング終了後、レジスト104を除去する。
First, as shown in FIG.
2. For example, an oxide film 10 serving as a gate insulating layer on a Si substrate
Form one. The oxide film may be either a thermal oxide film or an oxide film formed by a plasma CVD method. In this embodiment, the thermal oxide film is formed with a thickness of 2 μm. Next, as shown in FIG. 2, molybdenum (Mo) 103 serving as a gate electrode layer is formed on the oxide film 101 by a sputtering method or the like. In this embodiment, the film is formed with a thickness of 0.5 μm. A resist 104 is applied on the Mo by spin coating, subjected to general exposure and development as shown in FIG. 3, and patterned, for example, to obtain an opening 104a having a diameter of 3 μm, as shown in FIG. As described above, for example, the Mo layer 103 serving as a gate electrode layer and then the thermally oxidized SiO2 film 101 serving as a gate insulating layer are etched by a reactive ion etching method. After the etching, the resist 104 is removed.

【0008】次に図5に示すように基板101上にダイ
ヤモンド層105及び106を形成する。本実施例では
ダイヤモンドの形成には熱フィラメント法を用いて形成
した。ダイヤモンド層105及び106はH2流量10
0sccm、アセトン流量0.5sccmからなる混合
ガスを用い、圧力150Torr、基板温度800℃と
した。図5に示すようにダイヤモンド層は、ダイヤモン
ド106の成長に従い、ゲート電極層であるMo層表面
にもダイヤモンド105が成長する。Mo層のダイヤモ
ンド106はゲート絶縁層である酸化膜層、ゲート電極
Mo層の開口部107を塞ぐよう成長する。従って、ダ
イヤモンド成長種がSi基板に到達する確立は時間の経
過とともに低くなってくる。また、開口部が塞がるにつ
れ成長種の開口部内での広がりが小さくなり必然的にダ
イヤモンド106は円錐状またはピラミッド状に成長
し、図6に示すように、最終的には開口部が塞がると同
時に成長は終了する。
Next, diamond layers 105 and 106 are formed on the substrate 101 as shown in FIG. In this embodiment, the diamond was formed by using a hot filament method. The diamond layers 105 and 106 have an H2 flow rate of 10
Using a mixed gas of 0 sccm and a flow rate of acetone of 0.5 sccm, the pressure was set to 150 Torr, and the substrate temperature was set to 800 ° C. As shown in FIG. 5, as the diamond 106 grows, the diamond 105 also grows on the surface of the Mo layer which is the gate electrode layer. The Mo layer diamond 106 grows to cover the oxide film layer serving as the gate insulating layer and the opening 107 of the gate electrode Mo layer. Therefore, the probability that the diamond growth species reach the Si substrate becomes lower with the passage of time. In addition, as the opening is closed, the spread of the grown species in the opening is reduced, and the diamond 106 inevitably grows in a conical or pyramid shape, and as shown in FIG. Growth ends.

【0009】ゲート電極層であるMo層103表面に堆
積したダイヤモンド105はMoとの密着性が非常に低
いため容易に剥離させることが可能である。また、ダイ
ヤモンドは酸化膜上には殆ど成長しないため特殊な処理
をしなくともゲート絶縁層101を介してのエミッタ1
06とゲート電極層103との電気的な漏れはない。図
7に示すように、ダイヤモンド106を剥離させると本
発明の実施例によるダイヤモンドエミッタを使用した真
空マイクロメ素子が完成する。
The diamond 105 deposited on the surface of the Mo layer 103 serving as the gate electrode layer has very low adhesion to Mo and can be easily peeled off. In addition, since diamond hardly grows on an oxide film, the emitter 1 via the gate insulating layer 101 can be used without any special treatment.
06 and the gate electrode layer 103 are not electrically leaked. As shown in FIG. 7, when the diamond 106 is peeled off, a vacuum micro device using a diamond emitter according to an embodiment of the present invention is completed.

【0010】次に上記実施例による真空マイクロ素子を
用いた平板型画像表示装置について述べる。この実施例
の平板型画像表示装置は図8に示すように、真空マイク
ロ素子のピラミッド状エミッタがアレイ状に多数形成さ
れたSi基板102(ここでは、複数のエミッタではな
く唯一のエミッタの断面図を示している。)と蛍光体層
203及びITOから成る透明電極(アノード電極)層
202が順次形成されたガラスフェースプレート201
とが所定の間隔を設けて対抗配置されており、これらに
より真空筐体が構成されている。尚、前記Si基板10
2上には、前記実施例にて説明した真空マイクロ素子の
製造方法に従って形成されたダイヤモンド106をエミ
ッタとし、絶縁層101を介してMoゲート電極が設け
られて真空マイクロ素子100を構成している。すなわ
ち真空マイクロ素子部100は真空筐体の一部として用
いられている。このように本発明の実施例による真空マ
イクロ素子を平板型画像表示装置に適用した場合、エミ
ッタの安定性、再現性の向上により、より高精度の信頼
性の高い画像を得ることが可能となる。本発明は上記実
施例に限定されるものではなく、本発明の趣旨を逸脱し
ない範囲でいろいろ変形して実施できる。
Next, a flat panel type image display device using a vacuum micro device according to the above embodiment will be described. As shown in FIG. 8, the flat panel type image display device of this embodiment has a Si substrate 102 on which a large number of pyramid-shaped emitters of vacuum micro-elements are formed in an array (here, a sectional view of a single emitter instead of a plurality of emitters). ) And a glass face plate 201 in which a phosphor layer 203 and a transparent electrode (anode electrode) layer 202 made of ITO are sequentially formed.
Are arranged opposite to each other with a predetermined space therebetween, and these constitute a vacuum housing. The Si substrate 10
The diamond micro-element formed in accordance with the method of manufacturing a vacuum micro-element described in the above-described embodiment is used as an emitter, and a Mo gate electrode is provided via an insulating layer 101 to form a vacuum micro-element 100. . That is, the vacuum micro element unit 100 is used as a part of a vacuum housing. As described above, when the vacuum micro device according to the embodiment of the present invention is applied to a flat panel display, improvement in stability and reproducibility of the emitter makes it possible to obtain a highly accurate and highly reliable image. . The present invention is not limited to the above embodiments, and can be implemented in various modifications without departing from the spirit of the present invention.

【0011】[0011]

【発明の効果】以上のように、本発明を用いることで、
ダイヤモンドエミッタ形状の安定性、再現性が向上し、
更に製造コストの大幅な削減が可能な真空マイクロ素子
を提供できる。
As described above, by using the present invention,
The stability and reproducibility of the diamond emitter shape have been improved,
Further, it is possible to provide a vacuum micro device capable of significantly reducing the manufacturing cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 1 is a sectional view showing a manufacturing process of a vacuum micro device according to one embodiment of the present invention.

【図2】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 2 is a sectional view showing a manufacturing process of the vacuum micro device according to one embodiment of the present invention.

【図3】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 3 is a sectional view showing a manufacturing process of the vacuum micro device according to one embodiment of the present invention.

【図4】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 4 is a sectional view showing a manufacturing process of the vacuum micro device according to one embodiment of the present invention.

【図5】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 5 is a sectional view showing a manufacturing process of the vacuum micro device according to one embodiment of the present invention.

【図6】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 6 is a sectional view showing a manufacturing process of the vacuum micro device according to one embodiment of the present invention.

【図7】 本発明の一実施例による真空マイクロ素子の
製造工程を示す断面図。
FIG. 7 is a sectional view showing a manufacturing process of the vacuum micro device according to one embodiment of the present invention.

【図8】 本発明の一実施例による平板型画像表示装置
を示す断面図。
FIG. 8 is a sectional view showing a flat panel display according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

100…真空マイクロ素子部 101…Si基板 102…ゲート絶縁酸化膜層 103…ゲート電極Mo層 104…レジスト 105…ダイヤモンド層 106…ダイヤモンドエミッタ 107…フェースプレート 202…透明電極(アノード電極) 203…蛍光体層 REFERENCE SIGNS LIST 100 vacuum micro element portion 101 silicon substrate 102 gate insulating oxide film layer 103 gate electrode Mo layer 104 resist 105 diamond layer 106 diamond emitter 107 face plate 202 transparent electrode (anode electrode) 203 phosphor layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】電子を電界放出するエミッタと、その放出
を制御するゲート電極とを有する真空マイクロ素子の製
造方法において、基板上にゲート絶縁膜、ゲート電極層
を積層形成する工程と、前記エミッタが形成される領域
のゲート電極層及び絶縁膜を開口する工程と、全面にダ
イヤモンド形成し、ゲート電極層上に形成されたダイヤ
モンドが開口部を塞ぐことによって前記基板上にダイヤ
モンドエミッタ層を形成する工程とを含む真空マイクロ
素子の製造方法。
1. A method of manufacturing a vacuum micro device having an emitter for field emission of electrons and a gate electrode for controlling the emission, wherein a step of laminating a gate insulating film and a gate electrode layer on a substrate; Opening a gate electrode layer and an insulating film in a region where a hole is to be formed, forming diamond on the entire surface, and forming a diamond emitter layer on the substrate by closing the opening with diamond formed on the gate electrode layer. And a method for manufacturing a vacuum micro device.
【請求項2】ダイヤモンドエミッタ層はピラミッド状あ
るいは円錐状となることを特徴とする請求項1記載の真
空マイクロ素子の製造方法。
2. The method according to claim 1, wherein the diamond emitter layer has a pyramid shape or a conical shape.
【請求項3】ゲート電極層としてモリブデン層を形成す
ることを特徴とする請求項1記載の真空マイクロ素子の
製造方法。
3. The method according to claim 1, wherein a molybdenum layer is formed as a gate electrode layer.
JP6564297A 1997-03-19 1997-03-19 Manufacture of vacuum micro element Pending JPH10261361A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP6564297A JPH10261361A (en) 1997-03-19 1997-03-19 Manufacture of vacuum micro element
US09/042,738 US6103133A (en) 1997-03-19 1998-03-17 Manufacturing method of a diamond emitter vacuum micro device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6564297A JPH10261361A (en) 1997-03-19 1997-03-19 Manufacture of vacuum micro element

Publications (1)

Publication Number Publication Date
JPH10261361A true JPH10261361A (en) 1998-09-29

Family

ID=13292885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6564297A Pending JPH10261361A (en) 1997-03-19 1997-03-19 Manufacture of vacuum micro element

Country Status (1)

Country Link
JP (1) JPH10261361A (en)

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