JPH0963952A - Patterning of semiconductor surface and manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to perform easily a fine processing on the surface of an Si substrate in few processes without using a high-degree exposure technique. SOLUTION: In a semiconductor surface pattern formation method for forming a periodic mask pattern on the surface of an Si substrate, oxygen gas and carbon monoxide gas are simultaneously fed to the surface of the Si substrate 10 having periodic atomic steps and these gases are put into a plasma state to make them adsorb to the surface of the substrate, then, the substrate 10 is performed a heating treatment at 1200 deg.C and silicon-carbon bond layers 12 are periodically formed on the surface of the substrate 10 along the atomic steps.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a method for patterning a semiconductor surface for forming a periodic pattern on the surface of a semiconductor substrate, and more particularly to a method for manufacturing a semiconductor device using the periodic pattern on the semiconductor surface.

[0002]

2. Description of the Related Art Conventionally, in the field of semiconductor manufacturing, PEP (photo etching process) has been employed to form a fine pattern on a substrate surface. In this PEP, a photoresist is applied on a substrate, the resist is exposed and patterned by light or an electron beam, and the substrate is selectively etched or selectively grown using the photoresist as a mask.

However, this type of method requires a high-level exposure technique and requires many steps. Further, the minimum processing dimension is at most about 50 nm. Therefore, realization of a technique for forming a pattern of a finer size with a simple process is demanded.

[0004]

As described above, the conventional PE
In the fine processing technology using P, the minimum processing size is about 50 nm in addition to the complexity of the process, and there is a demand for a fine processing technology with a finer minimum processing size.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor surface capable of forming a finer pattern without requiring a complicated process such as PEP. Is to provide a patterning method. Another object of the present invention is to provide a method for manufacturing a semiconductor device, which manufactures a semiconductor device using the above method.

[0006]

[Means for Solving the Problems]

(Summary) In order to solve the above problems, the present invention employs the following configuration. That is, the present invention provides a method of patterning a semiconductor surface for forming a periodic pattern on the surface of a semiconductor substrate, wherein an oxygen gas and a gas containing carbon atoms are simultaneously applied to the surface of a silicon substrate having periodic atomic steps. Or alternately supply, and a step of adsorbing them on the substrate surface, and then heat-treating the substrate,
Periodically forming a bonding layer of silicon and carbon on the surface of the substrate along the atomic steps.

Here, preferred embodiments of the present invention include the following. (1) The gas containing carbon atoms shall be carbon monoxide. (2) The temperature at which silicon is heated is 700 ° C. or higher. (3) Oxygen gas and gas containing carbon atoms must be in a plasma state. (4) The substrate surface shall be slightly inclined from the low index plane.

Further, the present invention uses a substrate on which a bonding layer of silicon and carbon is periodically formed on the surface by the above method,
A semiconductor device is manufactured as follows. (1) A semiconductor layer is selectively grown on the surface of the substrate using the bonding layer as a mask. (2) After forming a groove by selectively etching the substrate using the bonding layer as a mask, a semiconductor layer is selectively grown in the groove of the substrate. (3) Crystal growth is performed on the surface of the substrate, and a semiconductor layer having periodic irregularities corresponding to the coupling layer is grown on the substrate surface. (Function) According to the present invention, since the bonding layer of silicon and carbon is formed along the atomic steps, if the atomic steps are formed periodically, the bonding layer can be formed in a periodic pattern. it can. Periodic atomic steps can be easily obtained by slightly tilting the substrate from the low index plane. This periodic pattern can be used as a diffraction grating. In particular, since a periodic pattern with a fine pitch that cannot be formed by the conventional PEP can be created, it is possible to create a diffraction grating for X-rays having a short wavelength.

The formed bonding layer (generally a carbon compound) has a thickness of about one atomic layer of silicon.
Since the Si—C bond is very strong, it is stable to heat up to about 2000 ° C. and resistant to an etchant such as an acid or an alkali. Therefore, it can be used as a mask for the silicon fine processing process as it is. Furthermore, since the thickness is at the atomic layer level, there is no mask blurring that occurs due to the presence of the thickness. When Si or the like is grown by the gas source molecular beam epitaxial growth (GSMBE) method or the chemical vapor deposition (CVD) method, it does not grow on the carbon compound but selectively grows only on silicon. Can also be used as a mask.

Therefore, various semiconductor devices can be manufactured by performing selective etching and selective growth utilizing this. When it is necessary to remove the bonding layer of silicon and carbon, it can be easily removed by dry etching such as ion sputtering.

As described above, according to the present invention, fine processing can be performed in a small number of steps without using an advanced exposure technique. In addition, by adjusting the atomic step interval, fine processing on the nanometer scale of 50 nm or less can be easily performed.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing the embodiments of the present invention, the basic principle of the present invention will be described. The atomic step interval on the silicon (Si) substrate surface can be freely controlled from a size of 10 nm or less to a size on the order of microns. Here, the atomic step is
It means a step of a monoatomic layer, and a flat surface (called a terrace) at an atomic level is formed between atomic steps. For example,
When a substrate (off-substrate) slightly inclined from the low index plane is used, atomic steps having a pitch of 10 nm or less can be formed uniformly.

Also, after periodically patterning with a photoresist, etching is performed to form holes periodically, and when heated to a temperature at which the atomic steps move, step bunching occurs, and the atomic steps are pinned at the holes. It is also known that uniform and periodic atomic steps are formed in a wide range [Reference: Proceedings of the 55th Annual Conference of the Japan Society of Applied Physics Academic Supporters, Vol. 0, p1217].

By using the thus formed evenly arranged substrates of atomic steps and using a chemical reaction formed along the ends of the atomic steps, the surface can be processed to a size of 10 nm or less. As a chemical reaction formed along the atomic step edge, Ga and oxygen are adsorbed on the surface,
It is known that the substrate is heated to desorb the adsorbate, but Ga and oxygen have a relatively weak bonding force with Si and the desorption temperature is as low as 500 to 600 ° C. Less is. Therefore, it is important to form a compound having a strong bonding force with Si along the atomic steps.

A gas containing oxygen gas and carbon (eg, CO)
And are supplied simultaneously or alternately to produce Si as shown in FIG.
After co-adsorbing molecules containing oxygen and carbon on the clean surface of the substrate 10, the substrate 10 is heated at about 1200 ° C. Then, FIG. 1 (b)
As shown in FIG.
And the selective desorption of oxygen,
As shown in (c), compound thin film 1 containing a Si—C bond
2 are formed along the atomic steps.

That is, a surface structure is obtained in which the compound thin films 12 and the Si surfaces 11 are alternately arranged on the same terrace along the atomic steps. The height of the formed carbon compound is about the same as that of a monoatomic layer of silicon, and does not depend on the conditions of co-adsorption or desorption. The width of the formed carbon compound can be controlled by the gas supply amount (gas pressure and adsorption time) and the heating temperature and heating time of the silicon substrate.

When co-adsorbing gas, heating the substrate to about 400 ° C. increases the efficiency of adsorption. Furthermore, when the gas is turned into plasma, its efficiency further increases,
The uniformity of the finally formed carbon compound film is also improved. If the substrate heating temperature after the adsorption is 700 ° C. or higher, a reaction for forming a carbon compound occurs. In addition, even if the substrate is heated after adsorbing only a gas containing carbon without oxygen on the silicon substrate, the adsorbed substances are only randomly aggregated on the terrace, and the above-described arrangement structure cannot be formed. This is because oxygen acts as a kind of catalyst for the reaction between silicon and carbon, and the presence of oxygen suppresses the aggregation on the terrace.

The carbon compound thus formed is
Although it is as thick as one atomic layer of silicon, it has a very strong Si-C bond, is thermally stable, and is resistant to acids and alkalis. be able to. In this case, since the thickness is at the atomic layer level, there is no mask blur caused by the thickness. Furthermore, GSMBE method and CV
It also serves as a mask for selective growth when growing Si or the like by the D method. Therefore, extremely fine processing can be performed in a small number of steps without using an advanced exposure technique.

Hereinafter, embodiments of the present invention will be described. (First Embodiment) FIG. 2 is a schematic diagram showing a processing apparatus used for a method of patterning a silicon substrate surface according to the present embodiment. A substrate holder 22 for holding a silicon substrate 21 and a heater 23 for heating the substrate are accommodated in the ultra-high vacuum chamber 20. The chamber 20 is connected with a carbon-based gas introduction pipe 24 and an oxygen gas introduction pipe 25 having a gas pressure control mechanism, and the gas in the chamber 20 is exhausted by an ultra-high vacuum pump 27. . Also, in order to increase the efficiency of the gas adsorption reaction on the substrate surface,
An electrode for plasma generation 26 is provided.

Next, a patterning method using the above apparatus will be described. The degree of vacuum in the chamber 20 before gas introduction is 1 × 10 ⁻⁷ Pa or less. The p-type silicon (111) substrate 21 is placed on the holder 22 and once heated to 1200 ° C. to obtain a clean surface, and then heated to 400 ° C.
Then, so that the partial pressures are 5 Pa and 2 Pa, respectively.
Carbon monoxide and oxygen are introduced into the chamber 20, and the gas is turned into a plasma state by the plasma generating electrode 26. In this state, oxygen and carbon monoxide were co-adsorbed for about 2 minutes. When the substrate 21 is heated to about 1200 ° C. for 10 seconds after the introduction of the gas, the silicon on the substrate 21 evaporates from the atomic step ends, only oxygen is selectively desorbed, and the compound thin film 12 containing Si—C bonds becomes atomic. Formed along the steps.

As described above, the present embodiment has a surface structure in which the formed carbon compound thin film and the original silicon are alternately arranged on the same terrace along the atomic steps. In addition,
The silicon substrate used in this embodiment is a substrate having randomly arranged atomic steps in which the step intervals are not uniform.

Since the surface structure in which the carbon compound and the silicon are alternately arranged according to the present invention has different surface reflectance with respect to light, a substrate in which atomic steps are periodically arranged as shown in FIG. 1A can be used. If so, it can be directly used as a diffraction grating. The period of the diffraction grating can be freely selected by adjusting the step interval. In particular, it is possible to create a diffraction grating having a short period that cannot be formed by PEP, thereby realizing a diffraction grating for X-rays. Further, by using this surface structure as a mask for microfabrication, it is possible to manufacture a semiconductor device using this surface structure as described in the following embodiments. (Second Embodiment) FIG. 3 is a perspective view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention, and particularly shows an example of a MOSFET.

First, a semi-insulating Si (100) vicinal substrate 30 is heated in an ultra-high vacuum so that the interval between atomic steps is one.
A clean surface with a uniform thickness of 0 nm was obtained. Next, the substrate 3
0 to 400 ° C., oxygen partial pressure 1 × 10 ⁻³ P
a, A mixed gas having a carbon monoxide partial pressure of 1 × 10 ⁻³ Pa was supplied. Subsequently, when the substrate was heated at 1200 ° C. for several seconds, a structure in which Si and the carbon compound were alternately arranged along the atomic steps as shown in FIG. 1C was obtained.
The width of the carbon compound was about 4 nm.

Next, p-type Si was grown using the above substrate by flowing disilane and diborane by the CVD method. As a result, the p-type Si was not grown on the carbon compound 32 but was grown only on the Si surface. When the growth reached a thickness of 10 nm, the growth was terminated. As a result, a p-type Si layer (quantum fine wire) 33 as shown in FIG. 3A was obtained.

Next, as shown in FIG.
After the silicon oxide film 34 is buried in the groove portion where the i-layer 33 is not formed, source / drain patterning is performed to form source / drain electrodes 36 and 37, and further a MOS type gate electrode 35 is formed. I do. Thus, a MOSFET using the quantum wires is completed.

In the present device thus formed, carriers (holes) traveling between the source and the drain are provided.
Since the p-type Si layer 33 has a quantum wire, it is hardly scattered and has high mobility. At 77K, this F
When the ET characteristics were measured, a conductance approximately twice as high and a cutoff frequency approximately 1.5 times as high as those of a MOSFET having the same element size and having no quantum wire structure were obtained. (Third Embodiment) FIG. 4 is a perspective view showing a manufacturing process of a semiconductor device according to a third embodiment of the present invention, particularly showing an example of a light emitting diode.

First, the p-type Si (100) vicinal substrate 40 in which the width of the atomic steps was uniformly set to 10 nm was heated in an ultra-high vacuum to obtain a clean surface. Next, the substrate 40 is
While heating to 0 ° C., a mixed gas having an oxygen partial pressure of 1 × 10 ⁻³ Pa and a carbon monoxide partial pressure of 3 × 10 ⁻⁴ Pa was flowed. continue,
When the substrate 40 was heated at 1200 ° C. for several seconds, a structure in which Si and the carbon compound were alternately arranged along the steps as shown in FIG. 1C was obtained. The width of the carbon compound was about 6 nm.

Next, disilane and diborane were supplied by the CVD method to grow p-type Si.
No. 2, but only on Si. 5n thickness
m, the growth was terminated, and as a result, FIG.
As shown in FIG. 3, a p-type Si layer (quantum wire) 43 having a width of about 3 nm is formed.
was gotten. This is similar to the structure shown in FIG. The carriers confined in the fine wire were quantized, and the photoluminescence characteristics thereof were measured. As a result, light emission at a peak wavelength of 450 nm was confirmed.

Then, disilane and phosphine were supplied by the CVD method to grow an n-type Si layer 44 on the p-type Si layer 43, thereby forming a pn junction thin line of silicon. Next, a space between the fine wires was filled with a silicon oxide film 45, a transparent electrode 46 was formed on the front surface, and an electrode 47 was further formed on the back surface, thereby producing a light emitting diode. In this light emitting diode, light emission with a peak wavelength of 470 nm was confirmed.

(Fourth Embodiment) FIG. 5 shows a fourth embodiment of the present invention.
FIG. 35 is a perspective view showing a manufacturing step of the semiconductor device according to the embodiment.

First, a semi-insulating vicinal Si (100) substrate 50 in which the width of the atomic steps was uniformly set to 10 nm was heated in an ultra-high vacuum to obtain a clean surface. Next, the substrate 50
While heating to 400 ° C., an oxygen partial pressure of 1 × 10 ⁻³ Pa,
A mixed gas having a carbon monoxide partial pressure of 1 × 10 ⁻³ Pa was supplied. Subsequently, when the substrate 50 was heated at 1200 ° C. for several seconds,
As shown in FIG. 1C, a structure was obtained in which Si and carbon compounds were alternately arranged along the steps. The width of the carbon compound was about 4 nm.

Next, when the substrate 50 was etched with a hydrofluoric acid-based etchant, a groove 51 was formed as shown in FIG. Next, the substrate 5 is placed in an ultra-high vacuum.
After heating the surface of the groove 51 by heating 0, the p-type Si is grown by the CVD method in the same manner as described above, and as shown in FIG. Type Si layer 5
4 was created. Even with such a structure, emission at a peak wavelength of 450 nm was confirmed.

(Fifth Embodiment) FIG. 6 shows a fifth embodiment of the present invention.
FIG. 2 is a perspective view showing a semiconductor device according to the first embodiment, and particularly shows an example of a DFB laser.

The above-mentioned structure in which silicon and carbon-based compounds are alternately arranged can be used as a diffraction grating as it is, but if this structure is applied, a diffraction grating of a DFB (Distributed-FeedBack) laser can also be formed. The period of the striped structure needs to be adjusted to the oscillation wavelength of the laser.

First, the off-substrate 60 of the Si (100) plane is step-bunched to reduce the width of the atomic steps to 440.
Control to nm. Next, the substrate 60 is
While heating to 0 ° C., a mixed gas having an oxygen partial pressure of 1 × 10 ⁻³ Pa and a carbon monoxide partial pressure of 3 × 10 ⁻⁴ Pa was flowed. continue,
When the substrate 60 was heated at 1200 ° C. for several seconds, a structure in which Si and the carbon compound were alternately arranged along the steps was obtained. The width of the carbon compound was about 250 nm. Thus, a diffraction grating having a period of 440 nm was obtained.

Next, a first p-type AlGaN cladding layer 64 is grown on the substrate 60 by using a metal organic chemical vapor deposition method. At this time, since the growth rates are different on silicon and on the carbon compound, a difference occurs in the thickness of the cladding layer 64. The diffraction grating 65 is formed on the cladding layer 64 by the periodic thickness difference. Subsequently, a second AlGaN cladding layer 66 having an Al composition ratio smaller than that of the first AlGaN cladding layer 64 is grown. At this time, the growth rate is reduced so that the surface is flattened.

Subsequently, the InGaN active layer 67, the second p
N-type A having the same Al composition ratio as the AlGaN cladding layer 66
The 1GaN cladding layer 68 and the n-type InGaN ohmic electrode contact layer 69 are grown. And the electrode 7 on the surface
1 is formed by vapor deposition, and the electrode 72 is formed by vapor deposition on the back surface, whereby a DFB laser structure as shown in FIG. 6 is produced.

In the laser fabricated in this manner, the half width of the oscillation wavelength becomes half or less than that of the laser without the diffraction grating due to the effect of the diffraction grating of silicon and the carbon compound. Conventionally, in order to produce this type of diffraction grating, two-beam interference exposure after forming a cladding layer,
Although complicated processes such as etching are required, in the present embodiment, these processes are not required, so that the manufacturing process can be simplified and the manufacturing cost can be reduced.

The present invention is not limited to the above embodiments. In the embodiment, a mixed gas of oxygen and carbon monoxide is used, but instead of carbon monoxide, a gas containing carbon atoms (for example, CO ₂ , CH ₄ , C ₂ H ₆ , C _{2
H 4, C 2 H 2,} C 6 H 6, C 2 H 5 COOH, C 6 H
₅ OH) can be used. Further, the oxygen gas and the gas containing carbon atoms do not always need to be supplied simultaneously, and they may be supplied alternately. The temperature in the heat treatment after the gas is adsorbed is not limited to 1200 ° C., and may be a temperature at which silicon and carbon sufficiently react, specifically, 700 ° C. or more. In addition, various modifications can be made without departing from the scope of the present invention.

[0040]

As described above in detail, according to the present invention, oxygen gas and gas containing carbon atoms are simultaneously or alternately supplied and adsorbed on the surface of a silicon substrate having periodic atomic steps. Thereafter, by heating the substrate, a bonding layer of silicon and carbon can be periodically formed on the surface of the substrate along the atomic steps. Therefore, fine processing of the substrate surface can be performed in a small number of steps without using an advanced exposure technique.

[Brief description of drawings]

FIG. 1 is a perspective view showing a processing step of a substrate surface for explaining a basic principle of the present invention.

FIG. 2 is a schematic diagram illustrating a schematic configuration of a processing apparatus used in the first embodiment.

FIG. 3 is a perspective view showing a manufacturing process of the semiconductor device according to the second embodiment.

FIG. 4 is a perspective view showing a manufacturing process of a semiconductor device according to a third embodiment.

FIG. 5 is a perspective view showing a manufacturing process of a semiconductor device according to a fourth embodiment.

FIG. 6 is an exemplary perspective view showing an element structure of a semiconductor device according to a fifth embodiment;

[Explanation of symbols]

 10, 21, 30, 40, 50, 60 single-crystal Si substrate 11 silicon surface 12, 32, 42, 52, 62 bonding layer of Si and C 20 ultra-high vacuum chamber 21 silicon substrate 22 substrate holder 23: heater for substrate heating 24, 25: gas introduction tube 26: electrode for plasma generation 27: ultra-high vacuum pump 33, 43, 54: p-type Si layer (quantum fine wire) 34, 45: silicon oxide film 35: gate electrode 36 source electrode 37 drain electrode 44 n-type Si layer (quantum fine wire) 46, 47, 71, 72 electrode 51 groove 64, 66 p-type AlGaN cladding layer 65 diffraction grating 67 InGaN active layer 68 n-type AlGaN cladding layer 69 ... n-type InGaN ohmic electrode contact layer

Front Page Continuation (71) Applicant 000005108 Hitachi, Ltd. 4-6 Kanda Surugadai, Chiyoda-ku, Tokyo (72) Inventor Shinobu Fujita 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Toshiba Research & Development Center (72) Inventor Shigemitsu Maruno 8-1, 1-1 Tsukaguchihonmachi, Amagasaki-shi, Hyogo Sanryo Electric Co., Ltd. Advanced Technology Research Laboratory (72) Inventor Heiji Watanabe 5-7 Shiba, Minato-ku, Tokyo NEC Corporation Inside the stock company (72) Inventor Nobuhiro Kusumi 1-5-5 Takatsukadai, Nishi-ku, Kobe-shi, Hyogo Inside Kobe Steel Co., Ltd. Kobe Research Institute (72) Inventor Masakazu Ichikawa 4-Kanda Surugadai, Chiyoda-ku, Tokyo 6 Within Hitachi, Ltd.

Claims (7)

[Claims] An oxygen gas and a gas containing carbon atoms are supplied simultaneously or alternately to the surface of a silicon substrate.
A method of patterning a semiconductor surface, wherein the substrate is heat-treated such that bonding layers of silicon and carbon and a silicon surface are alternately arranged along the atomic steps of the substrate surface. 2. A step of simultaneously or alternately supplying an oxygen gas and a gas containing carbon atoms to the surface of a silicon substrate having a periodic atomic step, and adsorbing them on the substrate surface. Heat treatment to periodically form a bonding layer of silicon and carbon on the surface of the substrate along the atomic steps. 3. A step of simultaneously or alternately supplying an oxygen gas and a gas containing carbon atoms to the surface of a silicon substrate having periodic atomic steps, and causing these to be in a plasma state and adsorbed on the substrate surface. Then, the substrate is heat-treated to form a silicon and carbon bonding layer by a predetermined length in one direction from each end of the atomic step, and the bonding layer and the silicon surface are alternately arranged on the substrate surface. A patterning method for a semiconductor surface. 4. A step of simultaneously or alternately supplying an oxygen gas and a gas containing carbon atoms to the surface of a silicon substrate having a periodic atomic step to cause the substrate to adsorb to the surface of the silicon substrate. Heat treatment as described above, forming a silicon-carbon bonding layer by a predetermined length in one direction from each end of the atomic step, and alternately arranging the bonding layer and the silicon surface on the substrate surface. A method for patterning a semiconductor surface, comprising: 5. A step of simultaneously or alternately supplying an oxygen gas and a gas containing carbon atoms to the surface of a silicon substrate having a periodic atomic step, and adsorbing them on the surface of the substrate. Heating, periodically forming a silicon-carbon bonding layer on the surface of the substrate along the atomic steps, and selectively growing a semiconductor layer on the surface of the substrate using the bonding layer as a mask. A method for manufacturing a semiconductor device, comprising: 6. A step of simultaneously or alternately supplying an oxygen gas and a gas containing carbon atoms to the surface of a silicon substrate having a periodic atomic step, and adsorbing them on the substrate surface. Heating, periodically forming a silicon and carbon bonding layer along the atomic steps on the surface of the substrate, and selectively etching the substrate with the bonding layer as a mask to form a groove, Selectively growing a semiconductor layer in the groove of the substrate. 7. A step of supplying an oxygen gas and a gas containing carbon atoms simultaneously or alternately to the surface of a silicon substrate having a periodic atomic step and adsorbing them to the surface of the substrate, and then the substrate is A step of performing heat treatment to periodically form a bonding layer of silicon and carbon on the surface of the substrate along the atomic steps, and then performing crystal growth on the surface of the substrate to correspond to the bonding layer on the surface of the substrate. And a step of growing a semiconductor layer having the periodic unevenness described above.