JPH095793A - The liquid crystal display device - Google Patents

The liquid crystal display device

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Publication number
JPH095793A
JPH095793A JP20151696A JP20151696A JPH095793A JP H095793 A JPH095793 A JP H095793A JP 20151696 A JP20151696 A JP 20151696A JP 20151696 A JP20151696 A JP 20151696A JP H095793 A JPH095793 A JP H095793A
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electrodes
liquid crystal
plurality
formed
display device
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JP2701832B2 (en
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Genshirou Kawachi
Katsumi Kondo
Junichi Owada
淳一 大和田
玄士朗 河内
克己 近藤
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Hitachi Ltd
株式会社日立製作所
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Abstract

PROBLEM TO BE SOLVED: To improve an opening rate and brightness by adjacently arranging plural common electrodes so as to hold corresponding video signal electrodes between adjacent pixels and generating the electric fields parallel with substrates by the voltage impressed on the common electrodes and pixel electrodes. SOLUTION: Gate insulating films 20 are formed so as to cover gate electrode (scanning signal electrodes) 10 and common electrodes 16 formed on a glass substrate 1. Drain electrodes (video signal electrodes) 14 and source electrodes (pixel electrodes) 15 to be superposed on part of the patterns of amorphous silicon films 30 formed via the insulting films 20 on the gate electrodes 10 are formed and are coated with protective insulating films 23. Such unit pixels are arranged in a matrix form and the surface of an oriented film ORI1 formed on the surface is subjected to a rubbing treatment and a liquid crystal compsn. contg. bar-shaped liquid crystal molecules 513 is enclosed between the above substrate and a counter substrate 508. An electric field E1 parallel with the substrate 1 is induced between the source electrodes 15 and the common electrodes 16 and the direction of the liquid crystal molecules 513 is changed in the direction of this electric field when the voltage is impressed on the gate electrodes 10.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明はOA機器等の画像, BACKGROUND OF THE INVENTION The present invention relates to an image such as OA equipment,
文字情報の表示装置として用いられる、アクティブマトリックス方式の液晶表示装置の構造に関する。 Used as a display device of the character information on the structure of the liquid crystal display device of active matrix type.

【0002】 [0002]

【従来の技術】ガラス等の絶縁基板上に薄膜トランジスタ(以下TFTと記す)をマトリックス状に形成し、これをスイッチング素子として用いるアクティブマトリックス型の液晶表示装置(TFT−LCD)は高画質のフラットパネルディスプレイとして期待が大きい。 BACKGROUND ART on an insulating substrate such as glass a thin film transistor (hereinafter referred to as TFT) formed in a matrix, liquid crystal display device of active matrix type using as a switching element (TFT-LCD) is high-quality flat panel expected to be used as the display is large. 従来のアクティブマトリックス型液晶表示装置では、液晶層を駆動する電極として2枚の基板上に形成し対向させた透明電極を用いていた。 In the conventional active matrix type liquid crystal display device, it has been used a transparent electrode made to face formed on two substrates as an electrode for driving the liquid crystal layer. これは液晶に印加する電界の方向を基板面にほぼ垂直な方向とすることで動作するツイステッドネマチック表示方式に代表される表示方式を採用していることによる。 This is due to employing a display system represented by a twisted nematic display method which works by a direction substantially perpendicular to the direction of the electric field applied to the liquid crystal to the substrate surface.

【0003】一方、液晶に印加する電界の方向を基板面にほぼ平行な方向とする方式として、櫛歯電極を用いた方式が特公昭63−21907 号に開示されている。 On the other hand, the direction of the electric field applied to the liquid crystal as a method to a direction substantially parallel to the substrate surface, a method using the comb electrodes is disclosed in JP-B-63-21907.

【0004】 [0004]

【発明が解決しようとする課題】上記の従来技術は液晶層を相互に咬合する櫛歯状の電極により駆動するものであるが、駆動電極として櫛歯状の電極を用いたので光が透過できる有効面積(以下開口率という)を大きくすることが困難である。 [0007] of the prior art are those driven by comb-shaped electrodes to bite the liquid crystal layer to each other, the comb-shaped electrode light can pass since used as a driving electrode it is difficult to increase the effective area (hereinafter referred to as aperture ratio). 原理的には櫛歯電極の電極幅を1〜 1 the electrode width of the comb electrodes in principle
2μm程度まで縮小すれば開口率を実用レベルまで拡大できるが、実際には大型基板全面にわたってそのような細線を均一にかつ断線がないように形成することは極めて困難である。 Can enlarge the aperture ratio to a practical level if reduced to about 2 [mu] m, in fact it is formed so as not to uniformly and disconnection of such fine wire over large substrate entire surface is very difficult. 即ち、上記の従来技術では、相互に咬合する櫛歯状の電極を用いたために画素開口率と製造歩留まりがトレードオフの関係となり、明るい画像を有する液晶表示装置を低コストで提供することは困難であった。 That is, in the above prior art, inter pixel aperture ratio and production yield for using comb-shaped electrodes of occlusion becomes a trade off, it is difficult to provide a liquid crystal display device at low cost with a bright image Met.

【0005】本発明は上記の問題を解決するものであって、その目的は、より製造歩留まりが高くかつ開口率が高い、明るい液晶表示装置を提供することにある。 [0005] The present invention has been made to solve the above problems, its object is to provide a higher manufacturing yield and a high aperture ratio, a bright liquid crystal display device.

【0006】 [0006]

【課題を解決するための手段】本発明によれば、液晶表示装置の一対の基板の一方の基板には、複数の走査信号電極と、それらにマトリクス状に交差する複数の映像信号電極と、これらの電極のそれぞれの交点に対応して形成された複数の薄膜トランジスタとを有している。 According to Means for Solving the Problems] The present invention, in one of a pair of substrates of the liquid crystal display device, a plurality of scanning signal electrodes, a plurality of video signal electrodes intersecting in a matrix thereof, and a plurality of thin film transistors formed to correspond to each of the intersections of these electrodes.

【0007】複数の走査信号電極及び映像信号電極で囲まれるそれぞれの領域で少なくとも一つの画素が構成され、それぞれの画素には、複数の画素に渡って接続部によって接続された複数の共通電極と、これらの共通電極間に配置され対応する薄膜トランジスタに接続される少なくとも一本の画素電極とを有している。 [0007] At least one pixel is constituted by each of the region surrounded by the plurality of scanning signal electrodes and image signal electrodes, each pixel, and a plurality of common electrodes which are connected by a connecting portion over a plurality of pixels , and at least one of the pixel electrode is disposed between these common electrodes are connected to the corresponding thin film transistor.

【0008】複数の共通電極は、隣接する画素間で対応する映像信号電極を挟むように隣接配置され、共通電極と画素電極とに印加される電圧により、液晶層には基板に平行な電界が発生する。 [0008] a plurality of common electrodes, arranged adjacent so as to sandwich the corresponding video signal electrodes between adjacent pixels, the voltages applied to the common electrode and the pixel electrode, an electric field parallel to the substrate in the liquid crystal layer Occur.

【0009】好ましくは、共通電極上には絶縁層が形成され、この絶縁層に複数の映像信号電極が形成される。 [0009] Preferably, on the common electrode is formed an insulating layer, a plurality of video signal electrodes in the insulating layer is formed.
また、共通電極と走査信号電極とは同一の層に形成される。 Further, the common electrode and the scanning signal electrodes are formed in the same layer. 画素電極の一部を共通電極の接続部上に絶縁層を介して重ね合わせ、この重ね合わさった部分により付加容量をが形成してもよい。 A part of the pixel electrode on the connection portion of the common electrode superposed via an insulating layer, the additional capacitance this the superimposed portions may be formed.

【0010】共通電極に実施態様によれば、その表面は自己酸化膜または自己窒化膜で被覆されている。 [0010] According to an embodiment the common electrode, the surface thereof is covered with a self-oxide film or self nitride film.

【0011】更に、画素電極または共通電極の形状は、 Furthermore, the pixel electrode or the common electrode shape,
環状型,十字型,T字型,Π字型,工字型,梯子型のいずれかの形状であってもよい。 Cyclic type, cruciform, T-shape, [pi-shape, Engineering-shape may be any shape of a ladder.

【0012】本発明によれば、共通電極を映像信号電極を挟むように隣接配置することにより、開口率(光が透過する開口部の面積割合)を高くすることができる。 According to the invention, it can be increased by the adjacent arrangement of the common electrode so as to sandwich the video signal electrodes, the aperture ratio (area ratio of the openings through which light is transmitted). また、画素電極と共通電極の少なくとも一部を絶縁膜を介して互いに重畳させ付加容量を形成することにより画素開口率を更に高くでき、かつ電圧保持特性を改善できる。 In addition, it further increases the pixel aperture ratio by forming the additional capacitor is overlapped at least a portion of the pixel electrode and the common electrode through the insulating film, and can improve the voltage holding characteristics.

【0013】更に、共通電極と映像信号電極または、共通電極と画素電極を互いに絶縁膜より異層化することにより、これらの電極相互間の短絡不良は発生する確率が小さくできるので画素欠陥を低減できる。 Furthermore, reducing the common electrode and the video signal electrodes or by different layers of from the common electrode and the pixel electrode from each other insulating film, the pixel defect because short circuit between the electrodes mutually can be reduced the probability of occurrence it can.

【0014】共通電極または画素電極の形状としては、 [0014] The shape of the common electrode or the pixel electrode,
なるべく開口率が大きくなるようなパターンを採用することが望ましい。 As possible it is desirable to employ a pattern, such as the aperture ratio increases. そこで、画素電極または共通電極を、 Therefore, the pixel electrode or the common electrode,
環状型,十字型,T字型,Π字型,工字型,梯子型のいずれかの平面形状とし、開口率が最大となるような電極形状の設計が容易となる。 Cyclic type, cruciform, T-shape, [pi-shape, Engineering-shaped, and one of the planar shape of the ladder, the aperture ratio is easily designed electrode shape such that maximum.

【0015】また、共通電極をその表面が自己酸化膜または自己窒化膜で被覆された金属電極によって構成することにより、共通電極と画素電極を互いに重ねあわせた時にこれらの間の短絡不良の発生を防止できるので画素欠陥を低減できる。 Further, by the common electrode whose surface is made of a metal electrode coated with a self-oxide or self nitride film, the occurrence of short circuit between them when superposed to each other and a common electrode and a pixel electrode It can be prevented thereby reducing the pixel defect.

【0016】 [0016]

【発明の実施の形態】 DETAILED DESCRIPTION OF THE INVENTION

〔実施例1〕図1〜図4は本発明の第1の実施例の動作原理を示す単位画素の断面図及び平面図である。 Example 1 Figures 1-4 is a cross-sectional view and a plan view of a unit pixel illustrating the operation principle of the first embodiment of the present invention. ガラス基板1上にCrよりなるゲート電極10およびコモン電極(共通電極)16を形成し、これらの電極を覆うように窒化シリコン(SiN)膜からなるゲート絶縁膜20 The gate electrode 10 and the common electrode (common electrode) 16 made of Cr on the glass substrate 1 is formed, the gate insulating film 20 made of silicon nitride (SiN) film so as to cover these electrodes
を形成した。 It was formed. ゲート電極(走査信号電極)10上にゲート絶縁膜20上を介して非晶質シリコン(a−Si)膜30を形成しトランジスタの能動層とする。 A gate electrode (scanning signal electrode) 10 through the gate insulating film 20 above on amorphous silicon (a-Si) to form a film 30 active layer of the transistor. 前記a−S The a-S
i膜30のパターンの一部に重畳するようにMoよりなるドレイン電極(映像信号電極)14,ソース電極(画素電極)15を形成し、これらすべてを被覆するようにSiN膜よりなる保護絶縁膜23を形成した。 i drain electrode made of Mo so as to overlap a portion of the pattern of the film 30 (video signal electrode) 14, to form a source electrode (pixel electrode) 15, a protective insulating film made of SiN film so as to cover all these 23 was formed. 以上よりなる単位画素をマトリックス状に配置したアクティブマトリックス基板の表面にポリイミドよりなる配向膜OR Alignment film OR made of polyimide unit pixel composed of more than the surface of the active matrix substrate arranged in a matrix
I1,ORI2を形成し、表面にラビング処理を施した。 I1, ORI2 is formed and subjected to a rubbing treatment on the surface. 同じくラビング処理を施した配向膜ORI1,OR Orientation film ORI1, OR, which also was subjected to a rubbing treatment
I2を表面に形成した対向基板508と、前記アクティブマトリックス基板の間に棒状の液晶分子513を含む液晶組成物を封入し、二枚の基板の外表面に偏光板50 I2 and the counter substrate 508 formed on the surface of the liquid crystal composition including liquid crystal molecules 513 of the rod-shaped sealed between the active matrix substrate, a polarizing plate 50 on the outer surface of the two substrates
5を配置した。 5 was placed. 液晶分子513は無電界時(図1および図2)にはストライプ状のソース電極15およびコモン電極16の長手方向に対して若干の角度、即ち液晶分子の長軸(光学軸)と電界の方向(ソース電極とコモン電極の長手方向に垂直)のなす角度にして45°以上90 Liquid crystal molecules 513 no electric field when a slight angle, i.e. the long axis of the liquid crystal molecules (optical axis) and the direction of the electric field with respect to the longitudinal direction of the stripe-shaped source electrode 15 and the common electrode 16 (FIG. 1 and FIG. 2) in the angle of (perpendicular to the longitudinal direction of the source electrode and the common electrode) 45 ° or more 90
°未満を持つように配向されている。 It is oriented so as to have less than °. 尚、上下基板との界面での液晶分子の配向は互いに平行とした。 Incidentally, the orientation of the liquid crystal molecules at the interface between the upper and lower substrates were parallel to each other. また、液晶分子の誘電異方性は正である。 Further, the dielectric anisotropy of the liquid crystal molecules is positive. ここで、TFTのゲート電極10に電圧を印加してTFTをオンとするとソース電極15に電圧が印加し、ソース電極15−コモン電極16間に電界E1を誘起させると、図3および図4に示すように電界方向に液晶分子が向きを変える。 Here, a voltage is applied to the source electrode 15 when to turn on the TFT by applying a voltage to the gate electrode 10 of the TFT, when the induced electric field E1 between the source electrode 15 common electrode 16, in FIGS. 3 and 4 liquid crystal molecules in the direction of the electric field as indicated by changing the direction. 上下基板の表面に配置した2枚の偏光板505の偏光透過軸を所定角度AGL1に配置することで電界印加によって光の透過率を変化させることが可能になる。 The polarization transmission axis of two polarizing plates 505 disposed on a surface of the upper and lower substrates becomes possible to change the transmittance of light by an electric field applied by placing a predetermined angle AGL1. このように、 in this way,
本発明の表示方式では従来必要であった透明電極がなくてもコントラストを与える表示が可能となる。 Even without the transparent electrode was conventionally required in the display system of the present invention it is possible to display giving contrast. このため、透明電極の形成に関わる工程を全て省略できるので製造コスト削減が可能となる。 Therefore, manufacturing cost reduction can be achieved can be omitted all the steps involved in the formation of the transparent electrode. さらに、従来の透明電極を用いる表示方式では、電圧印加により液晶分子の長軸を基板界面から立ち上がらせ複屈折位相差を0とすることで暗状態を得ているが、複屈折位相差が0となる視角方向は正面、即ち基板界面に垂直な方向のみであり、僅かでも傾くと副屈折位相差が現れ、ノーマリーオープン型の表示では光が漏れコントラストの低下や階調レベルの反転を引き起こす。 Further, in the display system using a conventional transparent electrode, but to obtain a dark state birefringence phase difference caused rise the long axis from the substrate interface by zero of the liquid crystal molecules by applying voltage, birefringence phase difference is 0 and the viewing angle direction in which the front, i.e. it is only a direction perpendicular to the substrate surface, the inclined even slightly appear secondary refraction phase difference, causes a reduction and gray level of light leaks contrast reversal in the display of a normally open type . ところが、本実施例の表示方式では液晶分子の長軸は基板とほぼ平行であり電圧を印加しても立ち上がることがない、従って視角方向を変えたときの明るさの変化が小さく視角特性が大幅に改善される効果がある。 However, the long axes of liquid crystal molecules in the display system of the present embodiment is not to rise even when a voltage is applied substantially parallel to the substrate, thus significantly brightness is small viewing angle characteristic change of when changing the viewing direction there is an effect that is improved.

【0017】さらに、本実施例ではコモン電極16をゲート電極10と同一のレイヤーに形成し、ドレイン電極14および液晶駆動電極であるソース電極15とコモン電極16をゲート絶縁膜20によって絶縁分離した。 Furthermore, a common electrode 16 formed on the same layer and the gate electrode 10 in this embodiment, the drain electrode 14 and source electrode 15 and the common electrode 16 is a liquid crystal drive electrodes dielectrically isolated by a gate insulating film 20. また、従来使用されていた櫛歯状電極を廃し、ソース電極15とコモン電極16をゲート絶縁膜20を介して重畳させた。 Further, the comb-shaped electrode which is conventionally used to waste, and the source electrode 15 and the common electrode 16 is superimposed with the gate insulating film 20. このようにドレイン電極14およびソース電極15とコモン電極16を絶縁分離することによりソース電極15およびコモン電極16の平面パターンの設計自由度が大きくなり画素開口率を向上させることが可能となる。 Thus it is possible to improve the drain electrode 14 and source electrode 15 and the design freedom increases and the pixel aperture ratio of the plane pattern of the source electrode 15 and the common electrode 16 by the common electrode 16 is insulated and separated. また、ソース電極15とコモン電極16の重畳部は液晶容量と並列に接続される付加容量として作用するので液晶印加電圧の保持能を向上させることができる。 Further, it is possible to improve the holding ability of the liquid crystal application voltage since superposition of the source electrode 15 and the common electrode 16 acts as an additional capacitance connected in parallel to the liquid crystal capacitor.
このような効果は従来の櫛歯状電極では得られないものであり、ドレイン電極14およびソース電極15とコモン電極16を絶縁分離することにより初めて達成される。 Such effects are those which can not be obtained by the conventional comb-shaped electrodes, the first time is achieved by insulating separating drain electrode 14 and source electrode 15 and the common electrode 16. 以上のように、ドレイン電極14およびソース電極15とコモン電極16を異層化することにより平面パターンの設計自由度が大きくなったので、電極形状としては本実施例に限らず多種多彩な構造が採用できる。 As described above, since the design flexibility of the planar pattern by different layers of the drain electrode 14 and source electrode 15 and the common electrode 16 is increased, the electrode shape is a wide variety of structures is not limited to this example It can be adopted.

【0018】〔実施例2〕図5は本発明の第2の実施例の単位画素の平面図を示す。 [0018] Example 2 FIG. 5 shows a plan view of a unit pixel of a second embodiment of the present invention. 本実施例の断面構造は前記第1の実施例(図1)と同様である。 Sectional structure of this embodiment is the same as the first embodiment (FIG. 1). 本実施例ではコモン電極16を十字型とし、一方ソース電極15はリング型とした点に特徴がある。 And the common electrode 16 and the cross-shaped in the present embodiment, while the source electrode 15 is characterized in that a ring type. コモン電極16とソース電極15はC1,C2,C3,C4と記した箇所で互いに重なり付加容量を形成している。 The common electrode 16 and the source electrode 15 is formed overlapping the additional capacity to each other at points marked with C1, C2, C3, C4. 本実施例によれば、コモン電極16とゲート電極10の間の距離を大きくとれるのでコモン電極16とゲート電極10間の短絡不良を防止できる。 According to this embodiment, a short circuit between the common electrode 16 and the gate electrode 10 can be prevented because the distance between the common electrode 16 and the gate electrode 10 can be made large. また、ソース電極15をリング型にすることにより、ソース電極の任意の箇所で断線が発生しても2 Further, by setting the source electrode 15 to the ring, even if disconnected at any point of the source electrode is generated 2
箇所以上の断線がないかぎりソース電極全体に給電され、正常な動作が可能である。 It is fed to the entire source electrode unless more broken point are possible in normal operation. 即ち、本構造は断線に対し冗長性をもち歩留まりを向上させることができる。 That is, the present structure can improve the yield have redundancy against breakage.

【0019】〔実施例3〕図6は本発明の第3の実施例の単位画素の平面図を示す。 [0019] Example 3 Figure 6 shows a plan view of a unit pixel of a third embodiment of the present invention. 本実施例の断面構造は前記第1の実施例(図1)と同様である。 Sectional structure of this embodiment is the same as the first embodiment (FIG. 1). 本実施例では、ソース電極15は第2の実施例と同様にリング型とし、コモン電極16をT字型とした点に特徴がある。 In this embodiment, the source electrode 15 is a second embodiment similarly to the ring type, it is characterized in that the common electrode 16 is T-shaped. 本実施例では、リング状のソース電極の短辺の一方とコモン電極が重なるようにすることにより、開口率を低下させること無く大きな付加容量を形成でき、電圧保持特性を改善できる。 In this embodiment, by making the overlap is one and the common electrode of the short side of the ring-shaped source electrode, can form a large additional capacitance without decreasing the aperture ratio can be improved voltage holding characteristics. また、水平方向のコモン電極を光透過領域内から排除したので画素開口率向上に有利である。 Further, it is advantageous to the pixel aperture ratio increased since eliminated the horizontal common electrode from the light transmissive region.

【0020】〔実施例4〕図7は本発明の第4の実施例の単位画素の平面図を示す。 [0020] Example 4 Figure 7 shows a plan view of a unit pixel of a fourth embodiment of the present invention. 本実施例の断面構造は前記第1の実施例(図1)と同様である。 Sectional structure of this embodiment is the same as the first embodiment (FIG. 1). 本実施例では、ソース電極15は第2の実施例と同様にリング型とし、コモン電極16を工字型とした点に特徴がある。 In this embodiment, the source electrode 15 and likewise ring of the second embodiment is characterized in that the common electrode 16 and Engineering-shape. 本実施例では、リング状のソース電極の2つの短辺とコモン電極が重なるようにすることにより、開口率を低下させること無くより大きな付加容量を形成でき、電圧保持特性を改善できる。 In this embodiment, by the overlap of two short sides and the common electrode of the ring-shaped source electrode, without it can form a larger additional capacity to reduce the aperture ratio can be improved voltage holding characteristics.

【0021】〔実施例5〕図8は本発明の第5の実施例の単位画素の平面図を示す。 [0021] Example 5 Figure 8 shows a plan view of a unit pixel of a fifth embodiment of the present invention. 本実施例の断面構造は前記第1の実施例(図1)と同様である。 Sectional structure of this embodiment is the same as the first embodiment (FIG. 1). 本実施例では、コモン電極16はΠ字型とし、ソース電極15をT字型とした。 In this embodiment, the common electrode 16 is a Π-shape, the source electrode 15 is T-shaped. 本実施例は前記第2〜第4の実施例とはことなり、画素の中央にソース電極15を、その左右両側にコモン電極16を配置した点に特徴がある。 This embodiment differs from that of the second to fourth embodiments, the source electrode 15 to the center pixel, is characterized in that arranged common electrode 16 on the left and right sides. このような配置の利点は、コモン電極16とドレイン電極14がゲート絶縁膜により分離されているためにこれらの電極の間の距離を小さくできる点にある。 The advantage of such an arrangement is that possible to reduce the distance between these electrodes to the common electrode 16 and the drain electrode 14 are separated by the gate insulating film. これにより、コモン電極16をドレイン電極14にできる限り近付けることにより光透過領域を拡大でき開口率を向上させることができる。 Thus, it is possible to improve the aperture ratio can enlarge the light-transmitting region by close as possible to the common electrode 16 to the drain electrode 14. ただし、この時コモン電極16とドレイン電極1 However, this time the common electrode 16 and the drain electrode 1
4が重なると、これらの電極間の寄生容量が急激に増大する。 4 the overlap, the parasitic capacitance between these electrodes abruptly increases. コモン電極とドレイン電極の間の過大な寄生容量はコモン電極信号の波形歪をもたらし、スミアと呼ばれる画質低下が発生するので望ましくない。 Excessive parasitic capacitance between the common electrode and the drain electrode results in waveform distortion of the common electrode signal, undesirable degradation in image quality called smear is generated. したがって、 Therefore,
コモン電極とドレイン電極は可能な限り近付けても良いが決して重ならないようにすることが必要である。 It is necessary to ensure that the common electrode and the drain electrode may be as close as possible but never overlap.

【0022】〔実施例6〕図9は本発明の第6の実施例の単位画素の平面図を示す。 [0022] Example 6 FIG. 9 shows a sixth plan view of a unit pixel of an embodiment of the present invention. 本実施例の断面構造は前記第1の実施例(図1)と同様である。 Sectional structure of this embodiment is the same as the first embodiment (FIG. 1). 本実施例では、ソース電極15を工字型とし、コモン電極16はリング型とした点に特徴がある。 In this embodiment, the source electrode 15 and Engineering-shaped common electrode 16 is characterized in that a ring type. 本実施例では前記第5の実施例と同様に開口率を向上させることができることに加え、 In the present embodiment in addition to being able to improve the examples as well as aperture ratio of the fifth,
ソース電極15とコモン電極16の重なりを大きくできるので付加容量を大きくできる。 Since the overlap of the source electrode 15 and the common electrode 16 can be increased can be increased additional capacity.

【0023】〔実施例7〕図10は本発明の第7の実施例の単位画素の平面図を示す。 [0023] Example 7 Figure 10 shows a plan view of a unit pixel of a seventh embodiment of the present invention. 本実施例の断面構造は前記第1の実施例(図1)と同様である。 Sectional structure of this embodiment is the same as the first embodiment (FIG. 1). 本実施例では、 In this embodiment,
ソース電極15をはしご型とし、コモン電極16はリング型として互いに重ね合わせた構造を有し、前記第1〜 The source electrode 15 and ladder, the common electrode 16 has a structure obtained by superimposing each other as a ring-type, the first to
第6の実施例と異なり液晶を駆動する電界は画素の長手方向と平行な方向とした点に特徴がある。 Field for driving the liquid crystal differs from the sixth embodiment is characterized in that a direction parallel to the longitudinal direction of the pixel. 本実施例では、はしご型電極の段数を変えることによりコモン電極16とソース電極15間のギャップを任意に変えることができる。 In this embodiment, it is possible to vary the gap between the common electrode 16 and the source electrode 15 arbitrarily by changing the number of ladder-type electrodes. 電極間ギャップは液晶の応答速度を決めるので、ギャップを任意に調節することにより所望の応答速度を得ることが可能となる。 Since the inter-electrode gap determines the response speed of the liquid crystal, it is possible to obtain a desired response speed by adjusting arbitrarily the gap.

【0024】以上のように、コモン電極とソース電極, [0024] above, the common electrode and the source electrode,
ドレイン電極を異層化することにより多種多様な電極形状の設計が可能となり、用途に応じた表示性能を実現することができる。 The drain electrode enables the design of a wide variety of electrode shapes by different layers of, it is possible to realize the display performance depending on the application.

【0025】以上の実施例ではコモン電極をゲート電極と同一の電極材料で構成する場合を示してきたが、コモン電極またはソース電極を複数の電極を組み合わせて構成しても良い。 [0025] have been shown a case constituting the common electrodes of the same electrode material and the gate electrode in the above embodiments may constitute a common electrode or a source electrode by combining a plurality of electrodes. 以下、そのような実施例を示す。 Hereinafter, such an embodiment.

【0026】〔実施例8〕図11は本発明の第8の実施例の単位画素の平面図を示す。 [0026] EXAMPLE 8 Figure 11 shows a plan view of a unit pixel of an eighth embodiment of the present invention. 図12は図11中B− FIG. 12 is shown in FIG. 11 B-
B′における断面図を示す。 It shows a cross-sectional view at B '. 本実施例ではコモン電極は引出配線160とコモン側駆動電極161の2つの部材によって構成され、これらはゲート絶縁膜20に設けたスルーホールTHを介して接続されている。 Common electrode in this embodiment is constituted by two members of the lead wirings 160 and the common side drive electrodes 161, which are connected via a through hole TH formed in the gate insulating film 20. ここで引出配線160にはゲート電極10と同一の電極材料を、コモン側駆動電極161にはソース電極15と同一の電極材料を用いた。 Here the same electrode material and the gate electrode 10 to the lead wire 160, using the same electrode material and the source electrode 15 to the common side drive electrodes 161. 本実施例においてもコモン電極の引出配線160とソース電極15はゲート絶縁膜20によって異層化されているため、互いに交差させることができ交差部Cstにおいて付加容量を構成し、保持特性を改善できる。 Lead wiring 160 and the source electrode 15 of the common electrode in the present embodiment because it is different stratified by the gate insulating film 20 constitutes an additional capacitance at the intersection Cst can be crossed with each other can improve the retention characteristics . また、コモン側駆動電極161をソース電極1 The source electrode 1 and the common side drive electrodes 161
5と同一層内に形成することにより、ソース電極15と隣接するドレイン電極14との間で形成される不必要な電界をシールドすることが可能となる。 By forming the 5 same layer, it is possible to shield the unnecessary electric field formed between the drain electrode 14 adjacent to the source electrode 15. 液晶の駆動に直接関与しない電極によって形成される寄生電界は液晶の配向を乱し、表示画像のコントラスト低下を招くので、 Parasitic electric field formed by electrodes not participating directly in the liquid crystal drive disturbs the alignment of the liquid crystal, so leading to decrease in contrast of the display image,
通常電極の周囲を遮光層によって隠すことによって対策している。 Are measures by hiding around the normal electrode by the light-shielding layer. しかしこのような遮光層は開口率を低下させるという欠点を持つ。 However, such light-shielding layer has a disadvantage of reducing an aperture ratio. これにたいして本実施例のように、液晶の配向を乱す寄生電界をシールドすることにより遮光層の面積を縮小できるので開口率を向上させることが可能となる。 As in the present embodiment with respect to this, it becomes possible to improve the aperture ratio since the parasitic field disturbing the alignment of the liquid crystal can reduce the area of ​​the light shielding layer by the shield.

【0027】〔実施例9〕図13は本発明の第9の実施例の単位画素の平面図を示す。 [0027] EXAMPLE 9 Figure 13 shows a plan view of a unit pixel of a ninth embodiment of the present invention. 図14は図13中C− FIG. 14 is shown in FIG. 13 C-
C′における断面図を示す。 It shows a cross-sectional view at C '. 本実施例ではコモン電極の引出配線160は、前記第7の実施例と同様にゲート電極10と同一の電極材料で構成し、コモン側駆動電極1 Lead wiring 160 of the common electrode in this embodiment, constituted by the seventh same electrode material and the gate electrode 10 similarly to the embodiment of the common-side drive electrode 1
61は保護絶縁膜23上に設けた新たな電極によって構成し、これらをスルーホールによって接続した。 61 constituted by new electrode provided over the protective insulating film 23, and connecting them via a through-hole. 本実施例ではコモン電極は引出配線160,コモン側駆動電極161ともにソース電極15と絶縁分離されているので前記の実施例と同様な効果がある。 Common electrode in this embodiment has the same effect as the previous embodiment since the lead wire 160, and the common-side drive electrodes 161 source electrode 15 together are insulated and separated.

【0028】〔実施例10〕前記実施例ではコモン電極のコモン側駆動電極161は保護絶縁膜23上に設けた電極によって構成したが、コモン側駆動電極はゲート電極10の下層に設けても良い。 [0028] Although Example 10 common side drive electrodes 161 of the common electrode in the example was constituted by electrodes provided on the protective insulating film 23, the common side drive electrodes may be formed below the gate electrode 10 . 図15は本発明の第10 Figure 15 is a tenth of the present invention
の実施例の単位画素の平面図を示す。 It shows a plan view of a unit pixel of the embodiment of. 図16は図15中D−D′における断面図を示す。 Figure 16 is a cross-sectional view in the FIG. 15 D-D '. 本実施例ではコモン電極の引出配線160は、前記第7の実施例と同様にゲート電極10と同一の電極材料で構成し、コモン側駆動電極161はゲート電極10の下層に絶縁膜24を介して設けた新たな電極によって構成し、これらをスルーホールによって接続した。 Lead wiring 160 of the common electrode in this embodiment, through the seventh embodiment and is made of the same electrode material and the gate electrode 10 as well, lower layer insulating film 24 of the common side drive electrode 161 is a gate electrode 10 of the constituted by new electrodes provided Te, were connected to these via a through-hole. 本実施例ではコモン電極は引出配線160,コモン側駆動電極161ともにソース電極1 Common electrode in this embodiment lead wiring 160, the common side drive electrodes 161 are both a source electrode 1
5と絶縁分離されているので前記の実施例と同様な効果がある。 5 and because it is insulated and separated a similar effect as the previous embodiment.

【0029】〔実施例11〕図17は本発明の第11の実施例の単位画素の平面図を示す。 [0029] Example 11 Figure 17 shows an eleventh plan view of a unit pixel of an embodiment of the present invention. 図18は図17中E FIG. 18 is shown in FIG. 17 E
−E′における断面図を示す。 A cross sectional view taken along -E '. 本実施例ではコモン電極16はゲート電極10の下層に下地絶縁膜24を介して設けた新たな電極によって構成した。 The common electrode 16 in the present embodiment is constituted by a new electrode provided via an underlying insulating film 24 below the gate electrode 10. 従って、コモン電極はゲート電極10およびソース電極15,ドレイン電極14の全てと異層化される。 Therefore, the common electrode is the gate electrode 10 and source electrode 15 are all the different stratification drain electrode 14. そこで、本実施例はコモン電極16をゲート電極と平行な方向だけでなくゲート電極と垂直な方向にも引出して網目状とすることが可能となる。 Therefore, this embodiment makes it possible to reticulated also drawer in a direction perpendicular to the gate electrode, not only in the direction parallel to the gate electrode of the common electrode 16. このことにより、コモン電極の抵抗値を下げられるのでコモン電圧の波形歪を低減しスミアの発生を防止できる効果がある。 Thus, there is an effect of preventing the occurrence of smearing reduces the waveform distortion of the common voltage so lowered the resistance of the common electrode.

【0030】〔実施例12〕図19は本発明の第12の実施例の単位画素の平面図を示す。 [0030] Example 12 FIG. 19 shows a plan view of a unit pixel of a twelfth embodiment of the present invention. 図20は図19中F FIG. 20 is shown in FIG. 19 F
−F′における断面図を示す。 It shows a cross-sectional view of -F '. 本実施例ではコモン電極16は保護絶縁膜23上に設けた新たな電極によって構成した。 The common electrode 16 is constituted by a new electrode provided over the protective insulating film 23 in this embodiment. 本実施例においても、前記実施例11と同様にコモン電極はゲート電極10およびソース電極15,ドレイン電極14の全てと異層化されるので、コモン電極16をゲート電極と平行な方向だけでなくゲート電極と垂直な方向にも引出して網目状とすることが可能となりコモン電圧の波形歪を低減しスミアの発生を防止できる。 In this embodiment, the common electrode in the same manner as in Example 11 the gate electrode 10 and the source electrode 15, since it is all the different stratification drain electrode 14, but the common electrode 16 only in the direction parallel to the gate electrode also lead-out gate electrode and the direction perpendicular to reduce the waveform distortion can and become the common voltage to the mesh-like can be prevented smear.

【0031】〔実施例13〕図21は本発明の第13の実施例の単位画素の断面図を示す。 [0031] Example 13 FIG 21 shows a thirteenth sectional view of a unit pixel of an embodiment of the present invention. 本実施例の平面図は前記実施例1と同様である。 Plan view of this embodiment is the same as that of the Embodiment 1. 本実施例ではゲート電極1 The gate electrode 1 in this embodiment
0およびコモン電極16はアルミニウム(Al)で構成され、その表面はAlの自己酸化膜であるアルミナ(A 0 and the common electrode 16 is made of aluminum (Al), alumina its surface is self oxide film Al (A
23 )21によって被覆されている点に特徴がある。 l 2 O 3) is characterized in that it is covered by 21.
このような2層絶縁膜構造を採用することによりコモン電極16とドレイン,ソース電極との絶縁不良が低減できるので画素欠陥を低減できる。 The common electrode 16 and the drain by adopting such a two-layer insulating film structure, it is possible insulation failure reduction of the source electrode can be reduced pixel defects.

【0032】〔実施例14〕図22は本発明の第14の実施例の単位画素の平面図を示す。 [0032] Example 14 Figure 22 shows a plan view of a unit pixel of a fourteenth embodiment of the present invention. 図23は図22のG 23 G of FIG. 22
−G′断面図である。 -G 'is a cross-sectional view. 本実施例ではコモン電極16はタンタル(Ta)で構成し、その表面はTaの自己酸化膜である五酸化タンタル(Ta 25 )22によって被覆した。 The common electrode 16 in the present embodiment is composed of a tantalum (Ta), the surface was covered with the tantalum pentoxide is a self-oxide film of Ta (Ta 2 O 5) 22 . また、コモン電極16上のソース電極15と対向する側のゲート絶縁膜20および保護絶縁膜23をエッチング除去した点に特徴がある。 Further, there is a characteristic of the gate insulating film 20 and the protective insulating film 23 on the side facing the source electrode 15 on the common electrode 16 in that etched away. 比誘電率が23と大きいTa 25を露出させることによりソース電極側に電束を集中できるのでより低い印加電圧で液晶を駆動させることができる。 Relative dielectric constant can drive the liquid crystal with lower applied voltage because it concentrates the flux field source electrode side by exposing the Ta 2 O 5 as large as 23.

【0033】図24は本発明のアクティブマトリックス基板鏡の等価回路を含む平面模式図である。 FIG. 24 is a schematic plan view including an equivalent circuit of an active matrix substrate mirror invention. ガラス基板1上にゲート電極10とドレイン電極14とこれらに接続されたTFTとゲート電極10に平行に引き出されたコモン電極16とゲート電極ドレイン電極およびコモン電極の引出端子101,151,163が形成されたものである。 Lead terminals 101,151,163 is formed of a glass substrate 1 on the gate electrode 10 and the drain electrode 14 and those connected to the TFT and the common electrode 16 drawn parallel to the gate electrode 10 and the gate electrode a drain electrode and the common electrode it is those that have been. 引出端子はゲート電極10,ドレイン電極1 Lead terminals are gate electrodes 10, the drain electrode 1
4およびコモン電極16に外部回路から信号を供給するための端子である。 4 and the common electrode 16 is a terminal for supplying a signal from an external circuit.

【0034】図25はアクティブマトリックス部の画素配列の平面図である。 [0034] FIG. 25 is a plan view of a pixel array of an active matrix portion. 図25では単位画素として図9に示したものを使用した。 Were used as shown in FIG. 9 as a unit pixel in FIG. 25. 各画素はゲート電極10が延在する方向と同一方向に複数配置され、画素列X1,X Each pixel is more arranged in the same direction as the direction in which the gate electrode 10 extends, pixel columns X1, X
2,X3…のそれぞれを構成している。 2, X3 ... constitute the respective. 各画素列X1, Each pixel columns X1,
X2,X3…のそれぞれの画素は薄膜トランジスタTFT X2, X3 ... each pixel of the thin film transistor TFT
1,コモン電極16およびソース電極15の配置位置を同一に構成している。 1, constitutes a position of the common electrode 16 and the source electrode 15 to the same. ドレイン電極14はゲート電極1 A drain electrode 14 is the gate electrode 1
0と交差するように配置され各画素列の内の1個の画素に接続されている。 0 is arranged to cross are connected to one pixel of the pixel columns.

【0035】図26は本発明の液晶表示装置のセル断面図である。 [0035] FIG. 26 is a cell sectional view of a liquid crystal display device of the present invention. 下側のガラス基板1上にゲート電極10とドレイン電極14がマトリックス状に形成され、その交点付近に形成されたTFTを介してソース電極15を駆動する。 The gate electrode 10 and the drain electrode 14 are formed in a matrix on a glass substrate 1 of the lower, driving the source electrode 15 through the TFT formed in the vicinity of the intersection. 棒状の液晶分子513を含む液晶層を挾んで対向する対向基板508上にはカラーフィルタ507,カラーフィルタ保護膜511,遮光用ブラックマトリックス512が形成されている。 The color filter 507 on the counter substrate 508 facing across the liquid crystal layer including liquid crystal molecules 513 of the rod-like, a color filter protective film 511, the light-shielding black matrix 512 is formed. 図26の中央部は単位画素の断面図を、左側は外部接続端子の存在する部分の断面図を、右側は外部接続端子の存在しない部分の断面図を示している。 The central portion is a sectional view of a unit pixel in FIG. 26, left side cross-sectional view of a portion of the presence of the external connection terminal, and the right side shows a cross-sectional view of a non-existent portion of the external connection terminals. 図26の右側,左側に示すシール材SLは液晶層を封止するように構成されており、液晶封入口(図示せず)を除くガラス基板1,508の縁全体に沿って形成されている。 Right side of FIG. 26, the sealing material SL shown on the left side is configured to seal the liquid crystal layer, and is formed along the entire edge of the glass substrate and 508 excluding the liquid crystal filling port (not shown) . シール材は例えばエポキシ樹脂で形成されている。 Sealing material is formed of, for example, epoxy resin. 配向制御膜ORI1,ORI2,保護絶縁膜23,カラーフィルタ保護膜511の各層はシール材SLの内側に形成される。 Alignment layer ORI1, ORI2, the protective insulating film 23, the layers of the color filter protective film 511 is formed inside the sealing material SL. 偏光板505は一対のガラス基板1,508の外側表面に形成されている。 Polarizer 505 is formed on the outer surface of the pair of glass substrates 1,508. 液晶層内の液晶分子513は配向制御膜ORI1,ORI2によって所定の方向に配向されており、バックライトBLからの光をソース電極15とコモン電極16の間の部分の液晶層で調節することによりカラー画像の表示が可能となる。 Liquid crystal molecules 513 in the liquid crystal layer is oriented in a predetermined direction by the alignment layer ORI1, ORI2, by adjusting the light from the backlight BL in the liquid crystal layer in a portion between the source electrode 15 and the common electrode 16 display of color image can be.

【0036】 [0036]

【発明の効果】以上のように本発明によれば、複数の共通電極を、隣接する画素間で対応する映像信号電極を挟むように隣接配置することにより、開口率が高い液晶表示装置が実現できる。 According to the present invention as described above, according to the present invention, a plurality of common electrodes, by adjacently arranged so as to sandwich the corresponding video signal electrodes between adjacent pixels, the aperture ratio is high liquid crystal display device realized it can.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明に係る液晶表示装置の第1の実施例の電界無印加時の画素平面模式図。 The first pixel schematic plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to the invention; FIG.

【図2】本発明に係る液晶表示装置の第1の実施例の電界無印加時の画素断面模式図。 The first pixel cross-sectional schematic view of when no electric field is applied in the embodiment of the liquid crystal display device according to the invention; FIG.

【図3】本発明に係る液晶表示装置の第1の実施例の電界印加時の画素平面模式図。 The first embodiment pixel schematic plan view of when an electric field is applied in the liquid crystal display device according to the present invention; FIG.

【図4】本発明に係る液晶表示装置の第1の実施例の電界印加時の画素断面模式図。 Pixel cross-sectional schematic view of when an electric field is applied to the first embodiment of the liquid crystal display device according to the present invention; FIG.

【図5】本発明に係る液晶表示装置の第2の実施例の電界無印加時の画素平面図。 Pixel plan view of when no electric field is applied to the second embodiment of the liquid crystal display device according to the present invention; FIG.

【図6】本発明に係る液晶表示装置の第3の実施例の電界無印加時の画素平面図。 Third pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to the present invention; FIG.

【図7】本発明に係る液晶表示装置の第4の実施例の電界無印加時の画素平面図。 Pixel plan view of when no electric field is applied in the fourth embodiment of the liquid crystal display device according to the present invention; FIG.

【図8】本発明に係る液晶表示装置の第5の実施例の電界無印加時の画素平面図。 Pixel plan view of when no electric field is applied to the fifth embodiment of the liquid crystal display device according to the present invention; FIG.

【図9】本発明に係る液晶表示装置の第6の実施例の電界無印加時の画素平面図。 6 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to the present invention; FIG.

【図10】本発明に係る液晶表示装置の第7の実施例の電界無印加時の画素平面図。 7 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to the invention; FIG.

【図11】本発明に係る液晶表示装置の第8の実施例の電界無印加時の画素平面図。 8 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to [11] the present invention.

【図12】本発明に係る液晶表示装置の第8の実施例の電界無印加時の画素断面図。 8 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to the present invention; FIG.

【図13】本発明に係る液晶表示装置の第9の実施例の電界無印加時の画素平面図。 9 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to [13] the present invention.

【図14】本発明に係る液晶表示装置の第9の実施例の電界無印加時の画素断面図。 9 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to [14] the present invention.

【図15】本発明に係る液晶表示装置の第10の実施例の電界無印加時の画素平面図。 10 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to the present invention; FIG.

【図16】本発明に係る液晶表示装置の第10の実施例の電界無印加時の画素断面図。 10 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to [16] the present invention.

【図17】本発明に係る液晶表示装置の第11の実施例の電界無印加時の画素平面図。 11 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to [17] the present invention.

【図18】本発明に係る液晶表示装置の第11の実施例の電界無印加時の画素断面図。 11 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to [18] the present invention.

【図19】本発明に係る液晶表示装置の第12の実施例の電界無印加時の画素平面図。 12 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to [19] the present invention.

【図20】本発明に係る液晶表示装置の第12の実施例の電界無印加時の画素断面図。 12 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to [20] the present invention.

【図21】本発明に係る液晶表示装置の第13の実施例の電界無印加時の画素断面図。 13 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to [21] the present invention.

【図22】本発明に係る液晶表示装置の第14の実施例の電界無印加時の画素平面図。 14 pixel plan view of when no electric field is applied in the embodiment of the liquid crystal display device according to [22] the present invention.

【図23】本発明に係る液晶表示装置の第14の実施例の電界無印加時の画素断面図。 14 pixel cross-sectional view of when no electric field is applied in the embodiment of the liquid crystal display device according to [23] the present invention.

【図24】本発明に係る液晶表示装置の等価回路を示す平面図。 Plan view showing an equivalent circuit of the liquid crystal display device according to [24] the present invention.

【図25】本発明に係る液晶表示装置の表示部TFTマトリックス部の平面図。 Plan view of a display unit TFT matrix portion of a liquid crystal display device according to [25] the present invention.

【図26】本発明に係る液晶表示装置のセル断面図。 Cell cross-sectional view of a liquid crystal display device according to [26] the present invention.

【符号の説明】 DESCRIPTION OF SYMBOLS

1…ガラス基板、10…ゲート電極、14…ドレイン電極、15…ソース電極、16…コモン電極、20…ゲート絶縁膜、21…アルミナ膜、22…五酸化タンタル膜、23…保護絶縁膜、24…下地絶縁膜、30…非晶質シリコン膜、101…ゲート電極の引出し端子、14 1 ... glass substrate, 10 ... gate electrode, 14 ... drain electrode, 15 ... Source electrode, 16 ... common electrode 20 ... gate insulating film, 21 ... alumina film, 22 ... tantalum pentoxide film, 23 ... protective insulating film, 24 ... base insulating film, 30 ... amorphous silicon film, lead-out terminals 101 ... gate electrode, 14
1…ドレイン電極の引出し端子、160…コモン電極の引出配線、161…コモン側駆動電極、505…偏光板、507…カラーフィルタ、508…対向基板、51 1 ... lead terminal of the drain electrode, 160 ... lead-out lines of the common electrode, 161 ... common side drive electrodes, 505 ... polarization plate, 507 ... color filter, 508 ... counter substrate 51
1…カラーフィルタ保護膜、512…遮光用ブラックマトリックス、513…液晶分子、ORI1,ORI2… 1 ... color filter protective film, 512 ... light-shielding black matrix 513 ... liquid crystal molecules, ORI1, ORI2 ...
配向膜、SL…シール材、C1,C2,C3,C4,C Alignment film, SL ... sealing material, C1, C2, C3, C4, C
st…付加容量、TH…スルーホール、E1…液晶駆動電界。 st ... additional capacity, TH ... through-hole, E1 ... liquid crystal driving electric field.

Claims (12)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】一対の基板と、この一対の基板に挟持された液晶層とを有する液晶表示装置において、 前記一対の基板の一方の基板には、複数の走査信号電極と、それらにマトリクス状に交差する複数の映像信号電極と、これらの電極のそれぞれの交点に対応して形成された複数の薄膜トランジスタとを有し、 前記複数の走査信号電極及び映像信号電極で囲まれるそれぞれの領域で少なくとも一つの画素が構成され、それぞれの画素には、複数の画素に渡って接続部によって接続された複数の共通電極と、これらの共通電極間に配置され対応する薄膜トランジスタに接続される少なくとも一本の画素電極とを有し、前記複数の共通電極は、隣接する画素間で対応する映像信号電極を挟むように隣接配置され、 前記共通電極と前記画素電極とに [1 claim: a pair of substrates, the liquid crystal display device having a liquid crystal layer held the pair of substrates, one of the pair of substrates includes a plurality of scanning signal electrodes, a matrix in their a plurality of video signal electrodes intersecting in, and a plurality of thin film transistors formed to correspond to each of the intersections of these electrodes, at least in each region surrounded by the plurality of scanning signal electrodes and image signal electrodes one pixel is constituted, each pixel, and a plurality of common electrodes which are connected by a connecting portion over a plurality of pixels, is disposed between these common electrodes of the at least one connected to the corresponding thin film transistor and a pixel electrode, the plurality of common electrodes, arranged adjacent so as to sandwich the corresponding video signal electrodes between adjacent pixels, to said common electrode and the pixel electrode 加される電圧により、前記液晶層には前記基板に平行な電界が発生することを特徴とする液晶表示装置。 The voltage to be pressurized, wherein the liquid crystal layer liquid crystal display device characterized by parallel electric field is generated in the substrate.
  2. 【請求項2】請求項1において、前記複数の映像信号電極と、これらの映像信号電極に隣接配置された前記複数の共通電極とは絶縁層を介して形成されていることを特徴とする液晶表示装置。 2. The method of claim 1, the liquid crystal in which the plurality of video signal electrodes, and said plurality of common electrodes disposed adjacent to these video signal electrodes, characterized in that it is formed through an insulating layer display device.
  3. 【請求項3】請求項2において、前記複数の共通電極上に前記絶縁層が形成されていることを特徴とする液晶表示装置。 3. The method of claim 2, the liquid crystal display device, wherein the insulating layer is formed on the plurality of common electrodes.
  4. 【請求項4】請求項3において、前記絶縁層上に前記複数の映像信号電極が形成されていることを特徴とする液晶表示装置。 4. The method of claim 3, a liquid crystal display device, wherein the plurality of image signal electrodes on said insulating layer is formed.
  5. 【請求項5】請求項1,2,3、または4において、前記複数の共通電極と前記複数の走査信号電極とは同一の層に形成されていることを特徴とする液晶表示装置。 5. A method according to claim 1, 2, 3 or 4, a liquid crystal display device characterized by being formed in the same layer and the plurality of scanning signal electrodes and said plurality of common electrodes.
  6. 【請求項6】請求項5において、前記複数の走査信号電極上には前記絶縁層が形成されていることを特徴とする液晶表示装置。 6. The method of claim 5, a liquid crystal display device, wherein the insulating layer is formed on the plurality of scanning signal electrodes.
  7. 【請求項7】請求項1において、前記少なくとも一本の画素電極の一部は、前記複数の共通電極の前記接続上に絶縁層を介して重ね合わさり、この重ね合わさった部分により付加容量が形成されることを特徴とする液晶表示装置。 7. The method of claim 1, wherein at least a portion of one of the pixel electrodes, Kasaneawasari via an insulating layer on said connection of said plurality of common electrodes, additional capacitance this the superimposed portion formed a liquid crystal display device comprising the to be.
  8. 【請求項8】請求項7において、前記複数の共通電極上には前記絶縁層が形成されていることを特徴とする液晶表示装置。 8. The method of claim 7, the liquid crystal display device, wherein the insulating layer is formed on the plurality of common electrodes.
  9. 【請求項9】請求項7または8において、前記複数の共通電極と前記複数の走査信号電極とは同一の層に形成され、前記走査信号電極上に前記絶縁層が形成されていることを特徴とする液晶表示装置。 9. The method of claim 7 or 8, wherein the plurality of common electrodes and the plurality of scanning signal electrodes are formed in the same layer, the insulating layer on the scan signal electrode is formed a liquid crystal display device.
  10. 【請求項10】請求項8または9において、前記絶縁層上に前記少なくとも一本の画素電極が形成されていることを特徴とする液晶表示装置。 10. The method of claim 8 or 9, a liquid crystal display device, characterized in that at least one of the pixel electrode on the insulating layer is formed.
  11. 【請求項11】請求項10において、前記絶縁層上に前記複数の映像信号電極が形成されていることを特徴とする液晶表示装置。 11. The method of Claim 10, a liquid crystal display device, wherein the plurality of image signal electrodes on said insulating layer is formed.
  12. 【請求項12】請求項1から11のいずれか1項において、前記複数の共通電極はその表面が自己酸化膜または自己窒化膜で被覆されていることを特徴とする液晶表示装置。 12. The any one of claims 1 to 11, wherein the plurality of common electrodes liquid crystal display device wherein a surface thereof is coated with a self-oxide or self nitride film.
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