JPH09329947A - Image forming device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image forming device capable of attaining optimum jumping development, at a low cost. SOLUTION: In a circuit 2 for switching a developing AC converter rectifying voltage, a switching transistor Q1 and a switching transistor Q4 are connected by a cascode and the working state of the switching transistor Q4 is controlled according to the bias voltage of the transistor Q4 applied by a transistor Q5 and the working state of the transistor Q1. Then, the working state of the transistor Q1 is controlled by a developing AC switching frequency and the bias voltage of the transistor Q4 is controlled by the transistor Q5 for monitoring the base voltage of the transistor Q1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention develops an electrostatic latent image formed on an image carrier into a visible image in an image forming apparatus such as an electrophotographic process type laser printer, a digital copying machine or a facsimile. The present invention relates to an image forming apparatus provided with a developing device that

[0002]

2. Description of the Related Art In an image forming apparatus using an electrophotographic system, an electrostatic latent image formed on an image carrier is developed by a developing device and visualized as a toner image. less than,
An example of an image forming apparatus provided with a general developing device will be described with a focus on the electrostatic latent image forming section.

First, as shown in FIG. 4, the electrostatic latent image forming section is provided with a photosensitive drum 36 coated with a photosensitive layer made of an organic semiconductor as an image bearing member.
Rotates at a predetermined speed in the direction of the arrow in the figure, and is charged uniformly to a negative potential of, for example, about −650 V by the primary charger 34 arranged around it in preparation for latent image formation.

FIG. 5 is a block diagram showing in detail the primary charging section. This primary charger 34 is a roller type,
A negative charge is directly applied to the photosensitive drum 36 via a roller whose DC bias rotates. Further, in order to keep the surface potential charged on the surface of the photosensitive drum 36 uniform, an AC bias is also superimposed on the primary charger 34 in addition to the DC bias. Such a change in the surface potential of the photosensitive drum 36 by the primary charger 34 is shown in the section of step 1 in FIG.

Next, as shown in FIG.
Is exposed based on image information by a light beam 32 emitted from a light beam emitting unit 31 including a light emitting element such as a semiconductor laser or an LED, and the potential of the exposed portion is -100V.
After that, an electrostatic latent image is formed on the photosensitive drum 36. The change in the surface potential of the photosensitive drum 36 at this time is
This is shown as a change in the surface potential of the bright portion in the exposure section of step 2 in FIG.

On the other hand, in the dark portion of the surface of the photosensitive drum 36 which has not been exposed, the negative charge supplied by the primary charging remains as it is, as shown by the change of the surface potential of the dark portion in the exposure section of step 2 in FIG.

As described above, since the negative charge is removed from the light portion of the exposed surface of the photosensitive drum 36 and the negative charge remains in the dark portion of the surface of the photosensitive drum 36 which is not exposed, a negative charge is left on the surface of the photosensitive drum 36. An image is formed by the charge distribution, and this image is generally called an electrostatic latent image because it cannot be recognized by human eyes.

The electrostatic latent image formed on the surface of the photosensitive drum 36 is developed by applying a developer by a developing device arranged around the photosensitive drum 36. As shown in FIG. 4, this developing device includes a developing container 40 containing a non-magnetic toner as a developer, a developing sleeve 37 as a developer carrying member disposed in the developing container 40, and the developing sleeve 37. Coating roller 3 disposed so as to come into contact with
8 and an elastic blade 39.

The developing sleeve 37 is the developing sleeve 37.
The non-magnetic toner in the developing container 40 is rubbed against the surface of the developing sleeve 37 by the rotation of the coating roller 38 arranged so as to abut at the lower diagonal position of the developing roller 37, and the non-magnetic toner in the developing container 40 is carried while being exposed. By rotating in the direction of the arrow in the opening facing the drum 36, the toner is conveyed to the developing portion facing the photosensitive drum 36. During this conveyance, the toner layer thickness is regulated by the elastic blade 38, and a thin toner layer having a constant thickness is applied onto the developing sleeve 37. The elastic blade 38 is made of urethane or the like, is disposed above the opening of the developing container 40, and hangs down from above to elastically contact the surface of the developing sleeve 37.

By agitating the toner in the above steps, the toner coated in a thin layer on the developing sleeve 37 is imparted with a charge of −6.0 μC / g to −30.0 μC / g. , The photosensitive drum 36 and the developing sleeve 3 described above.
By the developing bias formed in the developing section with 7,
The developing sleeve 37 is transferred to the photosensitive drum 36, and the photosensitive drum 36 is transferred to the developing sleeve 37.

That is, the photosensitive drum 3 in this developing section
6 and the developing sleeve 37 are arranged with a space (hereinafter referred to as an SD gap) spaced from 50 μm to 500 μm, usually about 300 μm, and a frequency of 80 Hz to 30 Hz is applied to the SD gap by the developing bias power supply 41.
A developing bias in which a DC bias and an AC bias of 00 Hz, an amplitude of 400 V to 3000 V, and an integrated average value of a waveform of about −50 V to −550 V are superimposed is applied to generate a developing electric field.

An example of this developing bias waveform is shown in FIG. As shown in FIG. 7, the developing bias exposes the toner opposite to the time t1 at which the first peak value Vmax that forms an electric field that urges the toner in the direction from the developing sleeve 37 to the photosensitive drum 36 is applied. Second for forming an electric field that urges in the direction from the drum 36 toward the developing sleeve 37
Of the peak value Vmin of time t2, and has a so-called duty bias waveform.
In addition to the duty bias, a bias waveform such as a sine wave, a triangular wave, a sawtooth wave, and a rectangular wave can be used for development, but the duty bias waveform is excellent for generating a high-quality visible image.

The negatively charged toner on the developing sleeve 37 is exposed from the surface of the developing sleeve 37 to the photosensitive drum 36 as shown in FIG. 8 in the developing section by the force received from the developing electric field generated by the developing bias as described above. Of the toner, and the toner makes the electrostatic latent image visible.

That is, since the exposed light portion on the photosensitive drum 36 has a relatively higher potential than the negatively charged toner on the developing sleeve 37, when this layer approaches the toner layer on the developing sleeve 37, SD is generated. Due to the potential difference in the gap, the toner jumps and adheres to the drum surface. This is generally called jumping development.

The AC bias (Vmax, Vmin, t1, t2) is superimposed on the DC bias (VDC (ave)) like the duty bias.
Facilitates toner to jump to the surface of the photosensitive drum, and
This is to improve the contrast of the image.

Next, the process of generating the AC developing bias waveform will be described in detail with reference to FIGS. 9 and 10. First, a converter switching frequency is generated by a predetermined circuit, and this converter switching frequency is input to the switching circuit 71 as shown in FIG. In the switching circuit 71, a boosting transformer or the like outputs a boosted AC high voltage according to the converter switching frequency, and this AC high voltage is output to the developing AC voltage generating circuit 72 shown in FIG.

The developing AC voltage generating circuit 72 is
DC voltage is generated by rectifying this output,
It outputs to the waveform shaping switching circuit 76. On the other hand, the DC voltage thus obtained is monitored by the voltage detection circuit 73, and the monitor output is input to the constant voltage control circuit 74. A value obtained by converting the voltage setting reference PWM signal for setting the target of the developing AC bias voltage into a direct current by the integrating circuit 75 is also input to the constant voltage control circuit 74. The constant voltage control circuit 74 outputs the monitor output and the developing voltage. The target value of the AC bias voltage is compared, and the switching time of the switching circuit 71 is controlled according to the output of the comparison result. Therefore, a stable developing AC bias voltage (Vmin) is generated by the feedback loop as described above.

This developing AC bias voltage (Vmin)
Is to form an electric field for urging the toner in the direction from the photosensitive drum 36 toward the developing sleeve 37. In order to form a duty bias having a frequency as shown in FIG. 7, the application time is set to t2. There is a need. Therefore, as shown in FIG. 10, the converter switching frequency is output to the switching circuit 71 only during the period of t2 and not during the period of t1.

When the converter switching frequency is not output to the switching circuit 71, the feedback loop does not operate and the developing AC voltage generating circuit 72 outputs Vmax as the developing AC bias voltage. This Vmax is for developing toner 3
7 forms an electric field that is urged in the direction from the photosensitive drum 36 to the photosensitive drum 36, and the application time is t1.

As described above, the developing AC voltage generating circuit 72
From, the voltage of Vmin in the period of t2 is
The voltage of Vmax is alternately output during the period of t1, but Vm is actually used as the developing AC bias.
Since it is necessary to sharply shape the deviation slope from in to the Vmax voltage, the output from the developing AC voltage generating circuit 72 is shaped by the waveform shaping switching circuit 76 as shown in FIG.

The waveform shaping switching circuit 76 uses a switching element such as a transistor to generate Vmin based on the developing AC bias frequency having a cycle as shown in FIG.
And Vmax are switched, and a developing AC bias having a waveform as shown in FIG. 10 is generated.

FIG. 11 shows a concrete circuit example of the developing AC voltage generating circuit 72 and the waveform shaping switching circuit 76 shown in FIG. As shown in FIG. 11, the developing AC voltage generating circuit 72 includes a converter transformer T and a rectifying diode D1.
And a smoothing capacitor C1. On the other hand, the waveform shaping switching circuit 76 includes transistors Q1 and Q2.
And a digital transistor Q3 and resistors R2 and R3. Q1 is a developing AC switching transistor.

In the circuit as described above, the developing AC switching frequency is supplied to the base terminal of the transistor Q3, and the collector of Q3 is connected to the base of Q1. Controlled according to frequency. Also,
While Q1 is in the ON state, the suction current flowing through Q1 is a constant current due to the operation of Q2. That is, Q1
Since the emitter is connected to the base of Q2, and the collector of Q2 is connected to the base of Q1,
A constant current flows in Q1 by monitoring the amount of current detected by a resistor R2 connected between the emitter and the ground at Q2 base terminal and controlling the base of Q1 by the collector of Q2.

The output terminal of the developing AC voltage generating circuit 72 is connected to the Q1 collector via a resistor R1. When Q1 is in the OFF state, the potential at the connection point between the resistor R1 and the collector is Vmin. , Q1 is in the ON state, the potential at the connection point between the resistor R1 and the collector is V
max.

The developing AC voltage waveform which changes from the Vmin potential to the Vmax potential is the coupling capacitor C.
Is added to the converter AC rectified voltage for development via 2
A developing AC bias is generated.

Therefore, the developing AC bias is Vma.
The rising edge that transitions from x to Vmin is governed by the response characteristics of the feedback loop described above, and
Regarding the fall that transitions from min to Vmax,
The relationship is governed by the response characteristics of the waveform shaping switching circuit 76.

Further, some of the parameters of the developing AC waveform described above have a limited setting range.

First, Vmax has a lower potential (leakage limit) at which sparks are generated in a highland area where the atmospheric pressure is low, as compared with a level ground, and the use endurance period is extended when the toner cartridge capacity is increased, so that the roller is covered with a roller. -13 considering that there is a possibility that sparks may occur due to misalignment
It is set to about 00V to -1500V.

Next, since VDC (ave) is set with respect to the photoconductor charging potential from the viewpoint of removing background fog in reversal development, the setting range is also limited, and the photoconductor charging potential is set to about -650V. If set, -550V to -170
It is set to about V.

Further, the developing AC switching frequency is
When the primary AC frequency of the charging of the photoconductor is determined, the selection range is determined within a range without moire, and when the primary AC switching frequency is 1008 Hz, the developing AC switching frequency is 2016 Hz.

Under the above restrictions, the toner has different characteristics due to the difference in particle size, whether the particle shape is circular or elliptical, or the material used.
In order to realize the optimum jumbing development, the duty of the developing AC frequency and the SD gap are changed.

Therefore, Vmax, VDC, the developing AC cycle T (t1 + t2), and the time t1 at which the first peak value Vmax that forms the electric field for urging the toner in the direction from the developing sleeve 37 toward the photosensitive drum 36 is applied. When specified, the developing AC bias amplitude VDEV is VDEV =
It is determined by (-VDC-(-Vmax)) x T / t2. As an example, Vmax: -1500V, VDC:
Assuming -200V and t2 / T: 0.55, VDEV:
It becomes 2364V _PP , Vmin with respect to the ground potential
Becomes VDEV− | Vmax | = 1864V ∴Vmin = 1864− | VDC | = 1664V.

[0033]

However, FIG.
While the transistor Q1 of the waveform shaping switching circuit 76 described in 1. above generally has a maximum withstand voltage of 2000V to 2100V, in the case of 2364V _PP as described above, considering the ASO margin of the element Q1. More than 2500V breakdown voltage is required,
It is difficult to obtain such a high breakdown voltage device at this stage.
Moreover, even if it was available, the cost could increase significantly. Therefore, when a high voltage AC amplitude such as 2364 V _PP is required, it is difficult to realize a developing AC bias for performing optimum jumping development with the circuit configuration described above.

Therefore, an object of the present invention is to provide an image forming apparatus capable of performing optimum jumping development at low cost.

[0035]

According to the first invention of the present application, the above-mentioned object is to carry a developer on a developer carrying member and convey the developer to a developing section facing the image carrying member. In the developing section, a developing bias voltage in which a DC voltage is superimposed with an AC voltage is applied between the developer bearing member and the image bearing member to apply an electrostatic latent image formed on the image bearing member with the developer. In an image forming apparatus for developing, this is achieved by using a cascode connection as a switching element of a switching circuit for switching a developing high voltage for generating the developing AC bias voltage.

According to the second invention of the present application,
The above-mentioned object can be achieved by, in the above-mentioned first invention, a circuit for dividing a withstand voltage against a high development voltage by each of at least two or more switching elements cascode-connected to the high development voltage.

Further, according to a third invention of the present application, the above-mentioned object is, in the above-mentioned first invention or the second invention, a grounding side connected between a high voltage for development and a voltage for grounding. A first switching element, and a second switching element that is cascode-connected to the first switching element between the output terminal of the first switching element and a terminal from the developing high voltage through a load. This is achieved by setting the switching control bias of the two switching elements to an arbitrary potential between the switching control bias of the first switching element and the developing high voltage potential.

That is, in the first aspect of the present invention, the switching element of the waveform shaping switching circuit section in the development AC bias waveform generation is cascode-connected, so that the withstand voltage can be easily divided by each switching element. That is, a high-voltage development AC voltage having a large amplitude necessary for optimum jumping development is generated. Also, because of the cascode connection, the switching element is driven in a state where the influence of the mirror capacitance of the switching element can be ignored as much as possible, and the frequency response of the circuit is broadened. Therefore, the rising edge at which the Vmin potential of the developing AC voltage waveform transitions to the Vmax potential is made steep to improve the image quality.

Further, in the second invention according to the present application, with respect to the developing high voltage of the first invention, the withstand voltage against the developing high voltage is divided by each of at least two switching elements which are cascode-connected. Since it is a circuit,
A high-voltage developing AC voltage having a large amplitude necessary for optimum jumping development is generated by an element having a normal breakdown voltage.

Further, in the third invention according to the present application, as the switching element of the first invention or the second invention, the first element connected to the ground side between the developing high voltage and the ground voltage is used. A second switching element that is cascode-connected to the first switching element between the output terminal of the first switching element and a terminal from the developing high voltage through a load; and the second switching element. The switching control bias of the device is
Since an arbitrary potential between the switching control bias of the switching element and the developing high voltage potential is set, stable operation of both switching elements is ensured and the breakdown voltage against the developing high voltage is appropriately divided.

[0041]

DETAILED DESCRIPTION OF THE INVENTION An embodiment of the present invention will be described below with reference to FIGS. 1 to 3 of the accompanying drawings. The same parts as those in the conventional example described above are designated by the same reference numerals.

As shown in FIG. 2, the image forming apparatus of the present embodiment is provided with a photosensitive drum 36 having an electrostatic latent image forming section coated with a photosensitive layer made of an organic semiconductor as an image bearing member. The drum 36 rotates at a predetermined speed indicated by an arrow in the figure, and is uniformly charged to a negative potential of, for example, about −650 V by a primary charger 34 arranged around the drum 36 as a preparation for latent image formation.

The photosensitive drum 36 is exposed on the basis of image information by a light beam 32 emitted from a light beam emitting portion 31 including a light emitting element such as a semiconductor laser or an LED, and the potential of the exposed portion is -100V. After that, an electrostatic latent image is formed on the photosensitive drum 36.

The electrostatic latent image formed on the surface of the photosensitive drum 36 is developed by applying a developer by a developing device arranged around the photosensitive drum 36. This developing device is provided with a developing container 40 containing a non-magnetic toner as a developer, a developing sleeve 37 as a developer carrying member arranged in the developing container 40, and a developing sleeve 37 so as to be in contact with the developing sleeve 37. The coating roller 38 and the elastic blade 39 are provided.

The developing sleeve 37 is the developing sleeve 37.
The non-magnetic toner in the developing container 40 is rubbed against the surface of the developing sleeve 37 by the rotation of the coating roller 38 disposed so as to contact the lower diagonal position of the developing roller 37. By rotating in the direction of the arrow in the opening facing the drum 36, the toner is conveyed to the developing portion facing the photosensitive drum 36. During this conveyance, the toner layer thickness is regulated by the elastic blade 38, and a thin toner layer having a constant thickness is applied onto the developing sleeve 37. The elastic blade 38 is made of urethane or the like, is disposed above the opening of the developing container 40, and hangs down from above to elastically contact the surface of the developing sleeve 37.

By agitating the toner in the above steps, the toner coated in a thin layer on the developing sleeve 37 is imparted with a charge of −6.0 μC / g to −30.0 μC / g. , The photosensitive drum 36 and the developing sleeve 3 described above.
By the developing bias formed in the developing section with 7,
The developing sleeve 37 is transferred to the photosensitive drum 36, and the photosensitive drum 36 is transferred to the developing sleeve 37.

Therefore, in the case of such jumping development, it is necessary to set an appropriate developing AC frequency and duty in response to changes in the characteristics of the toner.
Further, the level of the electric potential needs to be set in consideration of prevention of spark generation, removal of background fog, and the like. As a result, the developing AC bias amplitude needs to be about 2400 V, for example.

Therefore, in this embodiment, such a high-voltage developing AC bias is realized by configuring the switching circuit in the developing bias power source 1 as follows. The configuration of the switching circuit and the process of generating the developing AC bias in this embodiment will be described below.

FIG. 1 is a diagram showing a specific example of the developing AC voltage generating circuit 72 and the waveform shaping switching circuit 2 in this embodiment, and FIG. 3 is a developing AC bias generating process in this embodiment and the voltage of the circuit in FIG. It is a figure which shows a relationship.

As shown in FIG. 1, the circuit of the present embodiment is different from the conventional example shown in FIG. 11 in a block surrounded by a chain line. That is, in the present embodiment, the first
The switching transistor Q1 and the second switching transistor Q4, which are switching elements, are cascode-connected, and the operating state of the switching transistor Q4 is controlled according to the bias voltage applied by the transistor Q5 and the operating state of the switching transistor Q1. It The operating state of the switching transistor Q1 is controlled by the developing AC switching frequency, and the bias voltage of the switching transistor Q4 is controlled by the transistor Q5 that monitors the base voltage of the switching transistor Q1. That is, the resistor R4 is connected between the emitter of the transistor Q5 and the power supply voltage 24V, and the transistor Q5 is connected.
Has a buffer function for outputting a predetermined bias voltage from the emitter based on the result of monitoring the base voltage of the switching transistor Q1.

The capacitor C3 is a bypass capacitor having a function of setting the AC impedance to the ground potential in order to operate Q4 as a grounded base amplifier.

The operation of the circuit of this embodiment will be described below. First, during the period when the developing AC switching frequency is'H 'active logic, the transistor Q3
Is turned on, the current flowing from the power supply voltage 24V through the resistor R3 flows from the collector of Q3 to the ground via the emitter, and Q3 is in the saturated state [VCE / (sat) -Q
3], the forward voltage of the diode D3 is VF
If (D3) is set, the base potential of the switching transistor Q1 becomes [VCE / (sat) -Q3], and Q1 is cut off. Therefore, the switching transistor Q4 is also cut off, and the collector voltage of Q4 is Vmin.
Becomes

The base potential of the transistor Q5 at this time is VF (D3) + [VCE / (sat) -Q3], and the emitter potential of Q5 is Vbe (Q5), which is the base-emitter voltage of Q5. , [VCE / (sat)-Q
3] + VF (D3) + Vbe (Q5). The base potential of the switching transistor Q4 is {(Vm
in-VF (D2))-([VCE / (sat)-Q3] + V
F (D3) + Vbe (Q5))} × R5 / (R5 + R
6) + [VCE / (sat)-Q3] + VF (D3) + Vbe
(Q5). Further, since the emitter potential of Q4 does not become lower than the base potential in the cutoff state, it can be considered to be approximately the same as the base potential.

That is, the emitter potential of Q4, that is, the collector potential of Q1 is {(Vmin-VF (D2))-
([VCE / (sat)-Q3] + VF (D3) + Vbe (Q
5))} × R5 / (R5 + R6) + [VCE / (sat)-Q
3] + VF (D3) + Vbe (Q5)
The developing AC bias Vmin at this time is divided by the two switching transistors Q4 and Q1.

The relationship between the developing AC bias, the converter switching frequency, and each potential up to this point is shown in FIG.
Shown in period 2.

On the other hand, the developing AC switching frequency is'
During the L'active logic period, the transistor Q3 is OF
Since the F state is entered and a current flows from the power supply voltage 24V to the base of the switching transistor Q1 via the resistor R3, Q1 is activated and becomes conductive. Then Q1
Is converted into a voltage by the resistor R2 and input to the base of the transistor Q2 that monitors the emitter potential of Q1, so that the base potential of Q1 is controlled by the collector output of Q2 and the conduction current of Q1 is controlled. Will perform a constant current operation.

In this state, the base-emitter voltages of Q1 and Q2 are Vbe (Q1) and Vbe (Q
2), the base potential of Q1 is Vbe (Q1) + V
be (Q2). At this time, the base potential of Q5 becomes VF (D3) + Vbe (Q1) + Vbe (Q2), so that the emitter of Q5 is VF (D3) + Vb.
A voltage of e (Q1) + Vbe (Q2) + Vbe (Q5) is output, and the switching transistor Q4 is activated and becomes conductive.

Therefore, in this case, the collector voltage of Q4 is Vmax = Vbe (Q2) + [VCE / (sat)
-Q1] + [VCE / (sat) -Q4], and the collector voltage of Q1 becomes Vmax- [VCE / (sat) -Q4].

The relationship between the developing AC bias, the converter switching frequency, and each potential up to this point is shown in FIG.
It is shown in period 1.

The developing AC voltage generated as described above is superimposed on the developing DC bias via the coupling capacitor C2 to generate and output a developing bias voltage.

As described above, in the present embodiment, the collector potential of the switching transistor Q4 is changed in the potential range of Vmin to Vmax, and this potential range is optimum as described in the conventional example. 2400V at maximum for realization of advanced jumping development
In some cases, it is considered as a degree.

Therefore, the potential level from Vmin to Vmax is
1800V_ppIf it becomes about the same as before
With the configuration, the breakdown voltage of the switching transistor is low.
Tomo 2000V to 2100V is required, and the acquisition route
Is also limited, and the cost of the transistor element is high.
was there. Furthermore, the potential range from Vmin to Vmax is
2400V maximum_ppAnd consider ASO margin
If the withstand voltage becomes about 2500V,
It is difficult to obtain a high withstand voltage element and
Sometimes it was.

However, in the circuit configuration of the present invention, Vm
Since the potential range from in to Vmax is divided by the switching transistors Q1 and Q4, the withstand voltage of each transistor can be realized at about 1/2 of the required withstand voltage of the conventional circuit example. That is, even if the potential range of Vmin to Vmax is about 2500 V at the maximum, the withstand voltage of the switching transistor element required for Q1 and Q4 may be about 1300 V, and it is easily available and inexpensive.

Further, because of the cascode connection, the capacitance Cob between the base and collector of the switching transistor Q1 is
Since the transistor can be driven in a state in which the influence of the mirror capacitance generated by the above can be ignored as much as possible, the frequency response characteristic of the developing AC bias generation switching circuit can be broadened.

Therefore, Vmin of the developing AC voltage waveform
Since the falling edge at which the potential changes to the Vmax potential can be made steep and jumping development can be efficiently operated, it contributes to high image quality.

Depending on the characteristics of the toner, it may be necessary to make the falling edge gentle. In such a case, it is not easy to broaden the frequency response characteristic, but it is widened. It is easy to shift the band from to the low range.

In the above description, one component non-magnetic toner is assumed as the developer, but the present invention is not limited to this, and one component magnetic toner may be used. Good, and can be similarly applied to a developing device using a two-component toner. Although the negatively charged toner is used as an example in the description, positively charged toner may be used. In this case, the positive and negative polarities of the bias polarities in the present invention may be set to be opposite. Further, the developing process was described assuming a reversal developing method on the assumption that the portion irradiated on the photosensitive drum is a bright portion and the toner is negatively charged. Can be similarly applied. Further, in the circuit configuration of the present embodiment, the case of two switching elements forming the cascode connection has been described, but the number is not particularly limited, and at least two or more switching elements may be used. Furthermore, in the circuit configuration of this embodiment, a transistor is used as an example of a switching element, but for example, an FET, a power MOS, an I
It is not particularly limited as long as it is a high voltage switching element such as GBT.

[0068]

As described above, the first embodiment according to the present application is described.
According to the invention, the switching element of the waveform shaping switching circuit section in the AC developing bias waveform generation is cascode-connected, so that even when the developing AC voltage has a large amplitude, the withstand voltage of each switching element can be easily increased. Since the switching element can be divided, the withstand voltage of each switching element may be a normal withstand voltage, the element can be easily obtained, and the cost is low, and the optimum jumping development can be easily realized at low cost. Further, since the connection is cascode, the switching element can be driven in a state where the influence of the mirror capacitance of the switching element can be ignored as much as possible, so that the frequency response of the circuit can be broadened. Therefore, the falling edge of the developing AC voltage waveform transitioning from the Vmin potential to the Vmax potential can be made steep, and high image quality can be achieved.

According to the second invention of the present application,
With respect to the developing high voltage of the first aspect of the invention, since the circuit is configured to divide the withstand voltage against the developing high voltage by each of at least two or more switching elements that are cascode-connected, it is possible to use an element with normal withstand voltage, A high-voltage development AC voltage having a large amplitude necessary for optimum jumping development can be generated by an element having a normal breakdown voltage.

Further, according to the third invention of the present application, as the switching element of the first invention or the second invention, the first element connected to the ground side between the developing high voltage and the ground voltage is used. And a second switching element that is cascode-connected to the first switching element between the output terminal of the first switching element and the terminal from the developing high voltage through the load. The switching control bias of the switching element is set to the first
Since it is set to an arbitrary potential between the switching control bias of the switching element and the developing high voltage potential, stable operation of both switching elements can be guaranteed.
In addition, it is possible to appropriately divide the breakdown voltage against the developing high voltage.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a developing AC bias switching circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a schematic configuration of an image forming apparatus according to an embodiment of the present invention.

FIG. 3 is a diagram showing a developing AC bias generation process and a voltage relationship of the circuit of FIG. 1 in an embodiment of the present invention.

FIG. 4 is a block diagram of a developing device in a conventional example.

FIG. 5 is a detailed view of a primary charging unit in a conventional example.

FIG. 6 is a diagram illustrating a process of generating an electrostatic latent image in a conventional example.

FIG. 7 is an example of a developing bias waveform in a conventional example.

FIG. 8 is a detailed view of a developing unit in a conventional example.

FIG. 9 is a development AC bias generation block diagram in a conventional example.

FIG. 10 is a diagram showing a developing AC bias generation process in a conventional example.

FIG. 11 is a configuration diagram of a developing AC bias switching circuit in a conventional example.

[Explanation of symbols]

2 waveform shaping switching circuit 36 photosensitive drum (image carrier) 37 developing sleeve (developer carrier) Q1 switching transistor (first switching element) Q4 switching transistor (second switching element)

Claims (3)

[Claims] 1. A developer carrying member carries a developer and conveys the developer to a developing unit facing the image carrying member, and in the developing unit, a DC voltage is applied between the developer carrying member and the image carrying member. In an image forming apparatus that applies a developing bias voltage superposed with an AC voltage to develop an electrostatic latent image formed on the image bearing member with the developer, switches a developing high voltage to generate the developing bias voltage. An image forming apparatus characterized in that a switching element of a circuit to be connected is cascode-connected. 2. The image forming apparatus according to claim 1, wherein the image forming apparatus is a circuit that divides the breakdown voltage against the high development voltage by each of at least two switching elements that are cascode-connected to the high development voltage. 3. A first switching element connected to the ground side between a developing high voltage and a ground voltage, and the first switching element.
A second switching element cascode-connected to the first switching element between the output terminal of the switching element and a terminal through the load from the developing high voltage,
The image forming apparatus according to claim 1 or 2, wherein the switching control bias of the switching element is set to an arbitrary potential between the switching control bias of the first switching element and the developing high voltage potential.