JPH09260193A - Multilayer capacitor - Google Patents

Multilayer capacitor

Info

Publication number
JPH09260193A
JPH09260193A JP7060496A JP7060496A JPH09260193A JP H09260193 A JPH09260193 A JP H09260193A JP 7060496 A JP7060496 A JP 7060496A JP 7060496 A JP7060496 A JP 7060496A JP H09260193 A JPH09260193 A JP H09260193A
Authority
JP
Japan
Prior art keywords
multilayer capacitor
internal electrode
external electrode
electrode
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7060496A
Other languages
Japanese (ja)
Inventor
Satoshi Kazama
智 風間
Katsuyuki Horie
克之 堀江
Yoichi Mizuno
洋一 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP7060496A priority Critical patent/JPH09260193A/en
Publication of JPH09260193A publication Critical patent/JPH09260193A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer capacitor which can reduce its stray capacitance and can suppress crack generation. SOLUTION: The multilayer capacitor comprises an element body 23 of a rectangular parallelopiped shape made up of dielectrid layers and internal electrodes 22 alternately stacked and also comprises a pair of external electrodes 24 provided to both ends of the element body 23 as connected alternately in parallel to the internal electrodes 22. Parts (leads 22a of the internal electrodes) of the internal electrodes 22 connected to the pair of external electrodes 24 in the vicinity of their connections with the external electrodes 24 are gradually bent toward the direction of its center layer as it goes to the external electrodes 24. Further, in formation sites of the external electrodes 24, a peripheral edge parts 23a of the element body 23 are curved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明が属する技術分野】本発明は、積層コンデンサに
関するものである。
TECHNICAL FIELD The present invention relates to a multilayer capacitor.

【0002】[0002]

【従来の技術】図2乃至図4に従来例の積層コンデンサ
を示す。図2は分解斜視図、図3は平面図、図4は図3
のA−A線矢視方向断面図である。
2. Description of the Related Art FIGS. 2 to 4 show a conventional multilayer capacitor. 2 is an exploded perspective view, FIG. 3 is a plan view, and FIG.
3 is a sectional view taken along line AA of FIG.

【0003】図において、10は積層コンデンサで、誘
電体層11と内部電極12とを交互に積層してなる素体
13と、素体13の両端部において内部電極を交互に並
列に接続している一対の外部電極14とから構成されて
いる。
[0003] In the drawing, reference numeral 10 denotes a multilayer capacitor in which a dielectric body 13 formed by alternately laminating dielectric layers 11 and internal electrodes 12 and internal electrodes are alternately connected in parallel at both ends of the dielectric body 13. And a pair of external electrodes 14.

【0004】内部電極12は、誘電体層11の中央領域
付近に設けられた内部電極片12aと、外部電極14に
沿って外部電極14に接続した状態で設けられた内部電
極引出部12bとから成り、内部電極片12aは内部電
極引出部12bを介して外部電極14に接続されてい
る。
The internal electrode 12 is composed of an internal electrode piece 12a provided near the central region of the dielectric layer 11 and an internal electrode lead portion 12b provided along the external electrode 14 and connected to the external electrode 14. The internal electrode piece 12a is connected to the external electrode 14 via the internal electrode lead-out portion 12b.

【0005】誘電体層11は矩形のシート上のセラミッ
ク焼結体からなり、セラミック焼結体は、例えばチタン
酸バリウム等を主成分とする誘電体磁器材料から形成さ
れている。内部電極12は金属ペーストを焼結させた金
属薄膜からなり、金属ペーストとしては、例えばPdや
Ag−Pdのような貴金属材料を主成分とするものが使
用されている。外部電極14も内部電極12と同様の材
料により形成され、表面には半田濡れ性をよくするため
に半田メッキが施されている。
[0005] The dielectric layer 11 is formed of a ceramic sintered body on a rectangular sheet, and the ceramic sintered body is formed of a dielectric ceramic material containing, for example, barium titanate as a main component. The internal electrode 12 is formed of a metal thin film obtained by sintering a metal paste. As the metal paste, for example, an electrode mainly containing a noble metal material such as Pd or Ag-Pd is used. The external electrode 14 is also formed of the same material as the internal electrode 12, and the surface is plated with solder to improve solder wettability.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、前述し
た従来の積層コンデンサにおいては、内部電極12と外
部電極14との間に浮遊容量が生じ、容量値が規格範囲
外となることが多々あり、歩留まりの低下を招くことが
あった。また、外部電極を形成する際に、素体に応力に
よってクラックが生じることもあった。
However, in the above-mentioned conventional multilayer capacitor, stray capacitance is often generated between the internal electrode 12 and the external electrode 14, and the capacitance value is often out of the standard range. Sometimes caused a decrease. Further, when forming the external electrode, the element body may be cracked due to stress.

【0007】本発明の目的は上記の問題点に鑑み、浮遊
容量を低減し、またクラックの発生を低減した積層コン
デンサを提供することにある。
In view of the above problems, it is an object of the present invention to provide a multilayer capacitor which has reduced stray capacitance and reduced cracking.

【0008】[0008]

【課題を解決するための手段】本発明は上記の目的を達
成するために請求項1では、誘電体層と内部電極層とを
交互に積層してなる直方体形状の素体と、該素体の両端
部において該内部電極層に形成された内部電極を交互に
並列に接続している一対の外部電極とからなる積層コン
デンサであって、前記一対の外部電極に接続されたそれ
ぞれの内部電極の上層部若しくは下層部の少なくとも一
方は、前記外部電極との接続部近傍において、中心層方
向に偏曲している積層コンデンサを提案する。
In order to achieve the above object, the present invention provides a rectangular parallelepiped shaped element body in which dielectric layers and internal electrode layers are alternately laminated, and the element body. A multilayer capacitor composed of a pair of external electrodes in which the internal electrodes formed in the internal electrode layers are alternately connected in parallel at both ends of the internal electrode of each internal electrode connected to the pair of external electrodes. A multilayer capacitor is proposed in which at least one of the upper layer portion and the lower layer portion is bent in the direction of the central layer in the vicinity of the connection portion with the external electrode.

【0009】該積層コンデンサによれば、内部電極にお
ける外部電極との接続部近傍が、中心層方向に偏曲して
いるので、最外層の内部電極と外部電極との間隔が広が
り、該内部電極と外部電極との間に生じる静電容量が低
減される。
According to the multilayer capacitor, since the vicinity of the connection portion of the internal electrode with the external electrode is bent in the direction of the center layer, the distance between the internal electrode of the outermost layer and the external electrode is increased, and the internal electrode is The capacitance generated between the external electrode and the external electrode is reduced.

【0010】また、請求項2では、請求項1記載の積層
コンデンサにおいて、一方の外部電極に接続された内部
電極は、該外部電極との接続部近傍において、他方方の
外部電極に接続された内部電極の先端に対向する部分を
有している積層コンデンサを提案する。
According to a second aspect of the present invention, in the multilayer capacitor according to the first aspect, the internal electrode connected to one external electrode is connected to the other external electrode in the vicinity of the connecting portion with the external electrode. We propose a multilayer capacitor that has a portion facing the tip of the internal electrode.

【0011】該積層コンデンサによれば、一方の外部電
極に接続された内部電極は、該外部電極との接続部近傍
において、他方の外部電極に接続された内部電極の先端
に対向する部分を有し、該対向部分において静電容量を
得ることができる。
According to the multilayer capacitor, the internal electrode connected to one of the external electrodes has a portion in the vicinity of the connection portion with the external electrode, the portion facing the tip of the internal electrode connected to the other external electrode. However, the capacitance can be obtained at the facing portion.

【0012】また、請求項3では、請求項1又は2記載
の積層コンデンサにおいて、前記素体の少なくとも外部
電極形成部分の周縁部が曲面に形成されている積層コン
デンサを提案する。
A third aspect of the present invention proposes the multilayer capacitor according to the first or second aspect, wherein at least the peripheral portion of the external electrode forming portion of the element body is formed into a curved surface.

【0013】該積層コンデンサによれば、素体の外部電
極形成部分の周縁部が曲面に形成されているので、外部
電極形成時に生じる応力が緩和される。
According to the multilayer capacitor, since the peripheral portion of the external electrode forming portion of the element body is formed into a curved surface, the stress generated when the external electrode is formed is relaxed.

【0014】[0014]

【発明の実施の形態】以下、図面に基づいて本発明の一
実施形態を説明する。図1は本発明の第1の実施形態の
積層コンデンサを示す側面断面図である。図において、
20は積層コンデンサで、誘電体層21と内部電極22
とを交互に積層してなる素体23と、素体23の両端部
において内部電極22を交互に並列に接続している一対
の外部電極24とから構成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a side sectional view showing a multilayer capacitor according to a first embodiment of the present invention. In the figure,
Reference numeral 20 denotes a multilayer capacitor, which includes a dielectric layer 21 and internal electrodes 22.
The element body 23 is formed by alternately stacking and, and a pair of external electrodes 24 that alternately connect the internal electrodes 22 in parallel at both ends of the element body 23.

【0015】誘電体層21は、矩形のシート状のセラミ
ック焼結体からなり、焼結体は例えばチタン酸バリウム
を主成分とするグリーンシートを焼成して形成した誘電
体磁器材料からなる。
The dielectric layer 21 is made of a rectangular sheet-shaped ceramic sintered body, and the sintered body is made of a dielectric ceramic material formed by firing a green sheet containing barium titanate as a main component, for example.

【0016】誘電体層21を介して隣り合う一対の内部
電極22のそれぞれは矩形になっており、内部電極22
の長辺は外部電極24に対して略直角になっている。ま
た、各内部電極22の幅は各々等しく形成されている。
Each of the pair of internal electrodes 22 adjacent to each other with the dielectric layer 21 in between has a rectangular shape.
The long side of is substantially perpendicular to the external electrode 24. The width of each internal electrode 22 is formed to be equal.

【0017】一方、上層部における内部電極22と外部
電極24との接続部近傍(内部電極引出部22a)は、
外部電極24に近づくにつれて徐々に中心層方向に偏曲
している。これは、製造時において上層部から下層部方
向に加圧することによって形成される。
On the other hand, in the vicinity of the connecting portion between the internal electrode 22 and the external electrode 24 (internal electrode lead-out portion 22a) in the upper layer portion,
As it approaches the outer electrode 24, it gradually bends toward the center layer. This is formed by applying pressure from the upper layer portion toward the lower layer portion during manufacturing.

【0018】さらに、外部電極24の形成部位におい
て、素体23の周縁部23aは曲面状に形成されてい
る。
Further, at the formation portion of the external electrode 24, the peripheral edge portion 23a of the element body 23 is formed into a curved surface.

【0019】前述の内部電極22は導電性ペーストの薄
膜を焼結させた金属薄膜からなり、導電性ペーストとし
ては、例えばパラジウム粉末を主成分とするものが使用
されている。また、外部電極24も内部電極22と同様
の材料により形成され、表面には半田濡れ性をよくする
ために半田メッキが施されている。
The above-mentioned internal electrode 22 is made of a metal thin film obtained by sintering a thin film of a conductive paste, and as the conductive paste, for example, one containing palladium powder as a main component is used. The external electrode 24 is also made of the same material as the internal electrode 22, and the surface thereof is plated with solder to improve solder wettability.

【0020】この積層コンデンサは次のようにして製造
した。まず、誘電体の原料粉末に有機バインダーを15
重量%添加し、さらに水を50重量%加え、これらをボ
ールミルに入れて十分に混合し、誘電体磁器原料のスラ
リーを作成した。
This multilayer capacitor was manufactured as follows. First, an organic binder was added to the dielectric raw material powder.
% By weight, and further 50% by weight of water, and these were put into a ball mill and mixed well to prepare a slurry of a dielectric ceramic raw material.

【0021】次に、このスラリーを真空脱泡器に入れて
脱泡した後、リバースロールコーターに入れ、ポリエス
テルフィルム上にこのスラリーからなる薄膜を形成し、
この薄膜をポリエステルフィルム上で100℃に加熱し
て乾燥させ、これを打ち抜いて、10cm角、厚さ約2
0μmのグリーンシートを得た。
Next, after putting this slurry in a vacuum defoamer to defoam it, put it in a reverse roll coater to form a thin film of this slurry on the polyester film,
This thin film is dried by heating to 100 ° C. on a polyester film, punched out, and 10 cm square, about 2 mm thick.
A green sheet of 0 μm was obtained.

【0022】一方、平均粒径が1.5μmのパラジウム
粉末10gと、エチルセルロース0.9gをブチルカル
ビトール9.1gに溶解させたものとを攪拌器に入れ、
10時間攪拌することにより内部電極用の導電性ペース
トを得た。
On the other hand, 10 g of palladium powder having an average particle diameter of 1.5 μm and 0.9 g of ethyl cellulose dissolved in 9.1 g of butyl carbitol were placed in a stirrer.
By stirring for 10 hours, a conductive paste for an internal electrode was obtained.

【0023】この後、上述した内部電極のパターンを5
0個有する各スクリーンを用いて、上記グリーンシート
の片面にこの導電性ペーストからなる内部電極のパター
ンを各々印刷し、これを乾燥させた。
After this, the above-mentioned internal electrode pattern
Using each of the screens having zero, a pattern of the internal electrode made of the conductive paste was printed on one surface of the green sheet, and dried.

【0024】次に、上記印刷面を上にしてグリーンシー
トを複数枚積層し、さらにこの積層物の上下両面に印刷
の施されていないグリーンシートを積層した。次いで、
この積層物を約50℃の温度で厚さ方向に約40トンの
圧力を加えて圧着させた。この後、この積層物を格子状
に裁断し、約50個の積層チップを得た。
Next, a plurality of green sheets were laminated with the printed surface facing upward, and further, unprinted green sheets were laminated on the upper and lower surfaces of this laminate. Then
This laminate was pressed at a temperature of about 50 ° C. by applying a pressure of about 40 tons in the thickness direction. Thereafter, the laminate was cut into a lattice to obtain about 50 laminated chips.

【0025】次に、この積層チップを雰囲気焼成可能な
炉に入れ、大気中で600℃まで加熱して、有機バイン
ダーを焼成させ、その後、炉の雰囲気を大気中雰囲気と
し、積層体チップの加熱温度を600℃から焼成温度の
1150℃(最高温度)を3時間保持した。この後、1
00℃/hrの速度で600℃まで降温し、室温まで冷
却して、焼結体チップを得た。
Next, this laminated chip is put in a furnace capable of performing atmospheric firing, heated to 600 ° C. in the atmosphere to fire the organic binder, and then the atmosphere of the oven is set to the atmospheric atmosphere to heat the laminated chip. The temperature was maintained at 600 ° C. to 1150 ° C. (maximum temperature), which is the firing temperature, for 3 hours. After this, 1
The temperature was lowered to 600 ° C. at a rate of 00 ° C./hr and cooled to room temperature to obtain a sintered body chip.

【0026】次いで、内部電極が露出する焼結体チップ
の側面に銀とガラスフリットとビヒクルからなる導電性
ペーストを塗布して乾燥させ、これを大気中で800℃
の温度で15分間焼き付け、銀電極層を形成し、さらに
この上に銅を無電解メッキで被着させ、この上に電気メ
ッキ法でPb−Sn半田層を設けて、一対の外部電極を
形成した。これによって積層コンデンサが得られた。
Next, a conductive paste composed of silver, glass frit and vehicle is applied to the side surface of the sintered body chip where the internal electrodes are exposed and dried, and this is dried in air at 800 ° C.
Baking at a temperature of 15 minutes to form a silver electrode layer, further depositing copper thereon by electroless plating, and providing a Pb-Sn solder layer thereon by electroplating to form a pair of external electrodes did. As a result, a multilayer capacitor was obtained.

【0027】前述の構成よりなる積層コンデンサ20に
よれば、内部電極引出部22aが、中心層方向に偏曲し
ているため、最上層の内部電極引出部22aと外部電極
24との間隔Lが広がり、内部電極引出部22aと外部
電極24との間に生じる浮遊容量が低減されるので、容
量値を規格範囲内に設定でき、歩留まりの向上を図るこ
とができる。
According to the multilayer capacitor 20 having the above-described structure, since the internal electrode lead-out portion 22a is bent toward the center layer, the distance L between the uppermost internal electrode lead-out portion 22a and the external electrode 24 is reduced. Since the stray capacitance spreading between the internal electrode lead-out portion 22a and the external electrode 24 is reduced, the capacitance value can be set within the standard range, and the yield can be improved.

【0028】また、図5に示すように、一方の外部電極
24に接続された内部電極22は、その内部電極引出部
22aにおいて、他方の外部電極24に接続された内部
電極22の先端に対向する部分を有しているため、この
対向部分においても静電容量Cを得ることができるの
で、同等の静電容量を持つ積層コンデンサを従来よりも
小型に形成することができる。
Further, as shown in FIG. 5, the internal electrode 22 connected to one external electrode 24 faces the tip of the internal electrode 22 connected to the other external electrode 24 at the internal electrode lead-out portion 22a. Since the capacitor C has a portion to be provided, the electrostatic capacitance C can be obtained also in this facing portion, so that a multilayer capacitor having an equivalent capacitance can be formed smaller than the conventional one.

【0029】また、内部電極と外部電極とが斜面で対向
しているため、外部電極とセラミックスの境界面にクラ
ックが入り難くなる。
Further, since the internal electrode and the external electrode face each other on the inclined surface, it is difficult for cracks to occur at the boundary surface between the external electrode and the ceramic.

【0030】さらに、素体23の外部電極形成部分の周
縁部23aが曲面状に形成されているため、外部電極形
成時に素体23生じる応力が緩和されるので、素体23
にクラックやデラミネーション等の構造欠陥が発生する
ことがない。これにより、さらに歩留まりの向上を図る
ことができる。
Further, since the peripheral edge portion 23a of the external electrode forming portion of the element body 23 is formed in a curved shape, the stress generated in the element body 23 at the time of forming the external electrode is relieved.
No structural defects such as cracks and delamination occur. Thereby, the yield can be further improved.

【0031】次に、本発明の第2の実施形態を説明す
る。図6は第2の実施形態の積層コンデンサを示す側面
断面図である。図において、前述した第1の実施形態と
同一構成部分は同一符号をもって表しその説明を省略す
る。また、第1の実施形態と第2の実施形態との相違点
は、上層部に加えて下層部においても、内部電極22と
外部電極24との接続部近傍(内部電極引出部22a)
が、外部電極24に近づくにつれて徐々に中心層方向に
偏曲するように構成されている。これは、製造時におい
て静水圧プレス等を用いて上層部及び下層部から中心層
方向に加圧することによって形成されている。
Next, a second embodiment of the present invention will be described. FIG. 6 is a side sectional view showing the multilayer capacitor of the second embodiment. In the figure, the same components as those in the first embodiment described above are denoted by the same reference numerals, and description thereof will be omitted. Further, the difference between the first embodiment and the second embodiment is that in the lower layer portion in addition to the upper layer portion, in the vicinity of the connection portion between the internal electrode 22 and the external electrode 24 (internal electrode lead-out portion 22a).
However, it is configured such that it gradually bends toward the center layer as it approaches the external electrode 24. This is formed by applying pressure from the upper layer portion and the lower layer portion toward the center layer using a hydrostatic press or the like during manufacturing.

【0032】この第2の実施形態の積層コンデンサ20
によれば、上層部及び下層部における内部電極引出部2
2aが、中心層方向に偏曲しているため、最上層及び最
下層の内部電極引出部22aと外部電極24との間隔が
広がり、内部電極引出部22aと外部電極24との間に
生じる浮遊容量がさらに低減されるので、容量値の製造
精度をさらに高めることができ、さらに歩留まりの向上
を図ることができる。
The multilayer capacitor 20 of this second embodiment
According to the above, the internal electrode lead-out portions 2 in the upper layer portion and the lower layer portion are
Since 2a is bent in the direction of the central layer, the distance between the inner electrode lead-out portions 22a and the outer electrodes 24 of the uppermost layer and the lowermost layer is widened, and the floating that occurs between the inner electrode lead-out portions 22a and the outer electrode 24. Since the capacity is further reduced, the manufacturing accuracy of the capacity value can be further improved, and the yield can be further improved.

【0033】尚、これらの実施形態は一例であり本発明
がこれに限定されることはない。例えば、内部電極22
の先端部分が偏曲していても良い。この場合、その偏曲
は、最外層の内部電極に設けることが望ましい。
These embodiments are merely examples, and the present invention is not limited to these. For example, the internal electrode 22
The tip portion of may be bent. In this case, it is desirable that the deflection be provided in the innermost electrode of the outermost layer.

【0034】[0034]

【発明の効果】以上説明したように本発明の請求項1に
よれば、内部電極における外部電極との接続部近傍が、
中心層方向に偏曲しているため、最外層の内部電極と外
部電極との間隔が広がり、該内部電極と外部電極との間
に生じる静電容量が低減されるので、容量値を規格範囲
内に設定でき、歩留まりの向上を図ることができる。
As described above, according to claim 1 of the present invention, the vicinity of the connection portion of the internal electrode with the external electrode is
Since it is bent in the direction of the central layer, the distance between the inner and outer electrodes of the outermost layer is widened, and the electrostatic capacitance generated between the inner and outer electrodes is reduced. It can be set within the range, and the yield can be improved.

【0035】また、請求項2によれば、上記の効果に加
えて、一方の外部電極に接続された内部電極は、該外部
電極との接続部近傍において、他方の外部電極に接続さ
れた内部電極の先端に対向する部分を有し、該対向部分
において静電容量を得ることができるので、同等の静電
容量を持つ積層コンデンサを従来よりも小型に形成する
ことができる。
According to claim 2, in addition to the above effects, the internal electrode connected to one external electrode is connected to the other external electrode in the vicinity of the connection portion with the external electrode. Since it has a portion facing the tip of the electrode and the capacitance can be obtained at the facing portion, a multilayer capacitor having an equivalent capacitance can be formed smaller than the conventional one.

【0036】また、請求項3によれば、上記の効果に加
えて、素体の外部電極形成部分の周縁部が曲面に形成さ
れているため、外部電極形成時に生じる応力が緩和され
るので、前記素体にクラックが発生することがない。こ
れにより、さらに歩留まりの向上を図ることができる。
According to the third aspect, in addition to the above effects, since the peripheral portion of the external electrode forming portion of the element body is formed into a curved surface, the stress generated when the external electrode is formed is relaxed. No crack is generated in the element body. Thereby, the yield can be further improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施形態の積層コンデンサを示
す側面断面図
FIG. 1 is a side sectional view showing a multilayer capacitor according to a first embodiment of the present invention.

【図2】従来例の積層コンデンサを示す分解斜視図FIG. 2 is an exploded perspective view showing a conventional multilayer capacitor.

【図3】従来例の積層コンデンサを示す平断面図FIG. 3 is a cross-sectional plan view showing a conventional multilayer capacitor.

【図4】図3のA−A線矢視方向断面図FIG. 4 is a sectional view taken along line AA of FIG. 3;

【図5】本発明の第1の実施形態の積層コンデンサの要
部を示す図
FIG. 5 is a diagram showing a main part of the multilayer capacitor according to the first embodiment of the present invention.

【図6】本発明の第2の実施形態の積層コンデンサを示
す側面断面図
FIG. 6 is a side sectional view showing a multilayer capacitor according to a second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

20…積層コンデンサ、21…誘電体層、22…内部電
極、22a…内部電極引出部、23…素体、23a…周
縁部、24…外部電極。
20 ... Multilayer capacitor, 21 ... Dielectric layer, 22 ... Internal electrode, 22a ... Internal electrode lead-out part, 23 ... Element body, 23a ... Peripheral part, 24 ... External electrode.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 誘電体層と内部電極層とを交互に積層し
てなる直方体形状の素体と、該素体の両端部において該
内部電極層に形成された内部電極を交互に並列に接続し
ている一対の外部電極とからなる積層コンデンサであっ
て、 前記一対の外部電極に接続されたそれぞれの内部電極の
上層部若しくは下層部の少なくとも一方は、前記外部電
極との接続部近傍において、中心層方向に偏曲している
ことを特徴とする積層コンデンサ。
1. A rectangular parallelepiped element body in which dielectric layers and internal electrode layers are alternately laminated, and internal electrodes formed on the internal electrode layers at both ends of the element body are alternately connected in parallel. At least one of the upper layer portion or the lower layer portion of each internal electrode connected to the pair of external electrodes, in the vicinity of the connection portion with the external electrode, A multilayer capacitor characterized by being bent toward the center layer.
【請求項2】 一方の外部電極に接続された内部電極
は、該外部電極との接続部近傍において、他方の外部電
極に接続された内部電極の先端に対向する部分を有して
いることを特徴とする請求項1記載の積層コンデンサ。
2. The internal electrode connected to one of the external electrodes has a portion near the tip of the internal electrode connected to the other external electrode in the vicinity of the connection portion with the external electrode. The multilayer capacitor according to claim 1, which is characterized in that.
【請求項3】 前記素体の少なくとも外部電極形成部分
の周縁部が曲面に形成されていることを特徴とする請求
項1又は2記載の積層コンデンサ。
3. The multilayer capacitor according to claim 1, wherein at least a peripheral portion of the external electrode forming portion of the element body is formed into a curved surface.
JP7060496A 1996-03-26 1996-03-26 Multilayer capacitor Pending JPH09260193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7060496A JPH09260193A (en) 1996-03-26 1996-03-26 Multilayer capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7060496A JPH09260193A (en) 1996-03-26 1996-03-26 Multilayer capacitor

Publications (1)

Publication Number Publication Date
JPH09260193A true JPH09260193A (en) 1997-10-03

Family

ID=13436355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7060496A Pending JPH09260193A (en) 1996-03-26 1996-03-26 Multilayer capacitor

Country Status (1)

Country Link
JP (1) JPH09260193A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006270010A (en) * 2004-05-27 2006-10-05 Kyocera Corp Chip type electronic component
WO2006126333A1 (en) 2005-05-26 2006-11-30 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component and method for manufacturing same
JP2007123389A (en) * 2005-10-26 2007-05-17 Kyocera Corp Laminated electronic component
US7394644B2 (en) 2005-05-25 2008-07-01 Tdk Corporation Laminated ceramic capacitor and manufacturing method therefor
JP2012015543A (en) * 2004-05-27 2012-01-19 Kyocera Corp Chip type electronic component
KR101331985B1 (en) * 2011-06-15 2013-11-25 가부시키가이샤 무라타 세이사쿠쇼 Laminated ceramic electronic component
KR20150050422A (en) * 2013-10-30 2015-05-08 가부시키가이샤 무라타 세이사쿠쇼 Multilayer ceramic electronic component and mother ceramic multilayer body
US9099246B1 (en) * 2014-09-18 2015-08-04 Murata Manufacturing Co. Ltd. Multilayer ceramic capacitor

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006270010A (en) * 2004-05-27 2006-10-05 Kyocera Corp Chip type electronic component
JP2012015543A (en) * 2004-05-27 2012-01-19 Kyocera Corp Chip type electronic component
US7394644B2 (en) 2005-05-25 2008-07-01 Tdk Corporation Laminated ceramic capacitor and manufacturing method therefor
WO2006126333A1 (en) 2005-05-26 2006-11-30 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component and method for manufacturing same
EP1884967A1 (en) * 2005-05-26 2008-02-06 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component and method for manufacturing same
EP1884967A4 (en) * 2005-05-26 2011-11-16 Murata Manufacturing Co Multilayer ceramic electronic component and method for manufacturing same
JP2007123389A (en) * 2005-10-26 2007-05-17 Kyocera Corp Laminated electronic component
KR101331985B1 (en) * 2011-06-15 2013-11-25 가부시키가이샤 무라타 세이사쿠쇼 Laminated ceramic electronic component
KR20150050422A (en) * 2013-10-30 2015-05-08 가부시키가이샤 무라타 세이사쿠쇼 Multilayer ceramic electronic component and mother ceramic multilayer body
US9099246B1 (en) * 2014-09-18 2015-08-04 Murata Manufacturing Co. Ltd. Multilayer ceramic capacitor

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