JPH09232935A - Method for processing unused terminal in logic circuit element - Google Patents

Method for processing unused terminal in logic circuit element

Info

Publication number
JPH09232935A
JPH09232935A JP8036124A JP3612496A JPH09232935A JP H09232935 A JPH09232935 A JP H09232935A JP 8036124 A JP8036124 A JP 8036124A JP 3612496 A JP3612496 A JP 3612496A JP H09232935 A JPH09232935 A JP H09232935A
Authority
JP
Japan
Prior art keywords
circuit
logic circuit
connects
input terminal
unit logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8036124A
Other languages
Japanese (ja)
Inventor
Nobuyuki Hirakata
宣行 平方
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP8036124A priority Critical patent/JPH09232935A/en
Publication of JPH09232935A publication Critical patent/JPH09232935A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components

Landscapes

  • Logic Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent oscillation from being caused and to decrease the power consumption by connecting each output terminal and each input terminal of unit logic circuits not in use so as to form a closed circuit. SOLUTION: An input terminal 23 of a unit logic circuit INV connects to ground 4, and an output terminal 24 connects to a conductive section 12, an input terminal 25 of a circuit INV3 connects to ground 15, and an output terminal 26 connects to a conductive section 13, and then each input terminal of unit logic circuits not in use connects to ground. Furthermore, an input terminal 28 of a circuit INV4 connects to a short-circuit conductive section 11 and its output terminal 27 connects to a short-circuit conductive section 10, and an input terminal 30 of a circuit INV5 connects to a short-circuit conductive section 10 and its output terminal 29 connects to the short-circuit conductive section 11. Then as soon as a logic circuit element 1 is mounted on a printed circuit board, the input output terminals of the circuits INV4, 5 are in cross latch connection. Thus, a bistable circuit as a closed circuit is formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、論理回路素子にお
ける未使用単位論理回路の処理方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of processing an unused unit logic circuit in a logic circuit element.

【0002】[0002]

【従来の技術】従来、論理回路素子に搭載された複数の
単位論理回路中、未使用単位論理回路があると、発振防
止や消費電力増大の回避のため、入力端子は必ず回路基
板に設けられた高圧側又は低圧側に接続されている。こ
の高圧側又は低圧側とは、入力端子が相対的に高圧側又
は低圧側を意味するもので、例えば、アース電圧よりマ
イナス電圧とが単位論理回路に接続される場合は、アー
ス側が高圧側になる。
2. Description of the Related Art Conventionally, when there is an unused unit logic circuit among a plurality of unit logic circuits mounted on a logic circuit element, an input terminal is always provided on a circuit board in order to prevent oscillation and avoid power consumption increase. It is connected to the high voltage side or the low voltage side. The high-voltage side or the low-voltage side means that the input terminal is relatively high-voltage side or low-voltage side.For example, when a negative voltage than the ground voltage is connected to the unit logic circuit, the ground side is the high-voltage side. Become.

【0003】[0003]

【発明が解決しようとする課題】図2に示すように、論
理回路素子1は、例えば電源端子2とアース端子3の他
にINV1、INV2、INV3、INV4、INV
5、INV6の単位論理回路が搭載されている。このよ
うな論理回路素子1が、図6に示すようなプリント基板
への実装の際、配列されている導電部に接続する場合、
各単位論理回路の入力端子を電源側又はアース側に接続
する必要があるが、電源部64と電源分離部70との間
に信号線68があるため、かつ、単位論理回路INV4
とINV5との近くに電源がないため、電源部64から
電源分離部70に新たにジャンパ線71を設ける必要が
有った。このため、複雑かつコスト高になる結果となっ
た。
As shown in FIG. 2, the logic circuit element 1 includes, for example, INV1, INV2, INV3, INV4, INV in addition to the power supply terminal 2 and the ground terminal 3.
5, unit logic circuit of INV6 is mounted. When such a logic circuit element 1 is connected to an arrayed conductive portion during mounting on a printed circuit board as shown in FIG. 6,
Although it is necessary to connect the input terminal of each unit logic circuit to the power supply side or the ground side, there is the signal line 68 between the power supply unit 64 and the power supply separation unit 70, and the unit logic circuit INV4
Since there is no power source near the INV5 and INV5, it is necessary to newly provide a jumper wire 71 from the power source section 64 to the power source separating section 70. Therefore, the result is complicated and costly.

【0004】[0004]

【課題を解決するための手段】本発明は、かかる課題を
解決するためになされたもので、特許請求の範囲に記載
したように、論理回路素子に搭載された複数の単位論理
回路中、未使用単位論理回路の入出力端子を回路基板に
接続すると同時に閉回路を形成するか、または、当該未
使用単位論理回路と他の未使用単位論理回路のそれぞれ
の入出力端子と接続する際、例えば閉回路が2状態安定
回路を形成するように、閉回路を形成することによっ
て、あらためてジャンパ線の設置を不要としたものであ
る。
The present invention has been made to solve the above problems, and as described in the claims, a plurality of unit logic circuits mounted on a logic circuit element have When connecting the input / output terminals of the used unit logic circuit to the circuit board and forming a closed circuit at the same time, or when connecting the input / output terminals of the unused unit logic circuit and other unused unit logic circuits, for example, By forming a closed circuit so that the closed circuit forms a two-state stable circuit, it is not necessary to install a jumper wire again.

【0005】[0005]

【発明の実施の形態】隣接する未使用単位論理回路を回
路基板に接続する際に、未使用単位論理回路の入力端子
(複数でも可)と出力端子とが接続されるようにして閉
回路を形成して2状態安定回路を構成することにより、
未使用単位論理回路の発振及び消費電力の増大を防止で
きる。なお、当該未使用単位論理回路の出力端子を他の
未使用単位論理回路の入力端子に、また、当該未使用単
位論理回路の入力端子を他の未使用単位論理回路の出力
端子に接続されるように配線されることによっても、い
わば、2状態安定回路が形成され、これによって、発振
及び消費電力の増大を防止する事が可能である。
BEST MODE FOR CARRYING OUT THE INVENTION When connecting adjacent unused unit logic circuits to a circuit board, a closed circuit is formed by connecting the input terminal (s) of the unused unit logic circuit and the output terminal. By forming and forming a two-state stabilization circuit,
It is possible to prevent oscillation of the unused unit logic circuit and increase in power consumption. The output terminal of the unused unit logic circuit is connected to the input terminal of another unused unit logic circuit, and the input terminal of the unused unit logic circuit is connected to the output terminal of another unused unit logic circuit. Such wiring also forms a so-called two-state stabilizing circuit, which can prevent an increase in oscillation and power consumption.

【0006】[0006]

【実施例】図2に示す論理回路素子1を図1に示すよう
なプリント基板上に実装する場合の端子の接続を示すも
ので、プリント基板上には、上述のようなジャンパ線7
1はなく、電気導体からなる配線として電源部4、アー
ス5、14、15、16、信号線6、7、8、9、1
7、18、短絡導電部10、11及び導電部12、13
がプリント導体で形成されている。ここで、論理回路素
子1の電源端子2は、電源部4に接続される。また、ア
ース端子3はアース16に接続される。更に、単位論理
回路INV1の入力端子21は信号線6に、出力端子2
2は信号線7に接続され、単位論理回路INV6の入力
端子32は信号線9に、出力端子31は信号線8にそれ
ぞれ接続される。
1 shows the connection of terminals when the logic circuit element 1 shown in FIG. 2 is mounted on a printed circuit board as shown in FIG.
There is not 1, but a power supply section 4, grounds 5, 14, 15, 16 and signal lines 6, 7, 8, 9, 1 as wiring made of an electric conductor.
7, 18, short-circuit conductive parts 10, 11 and conductive parts 12, 13
Are formed of printed conductors. Here, the power supply terminal 2 of the logic circuit element 1 is connected to the power supply unit 4. The ground terminal 3 is connected to the ground 16. Further, the input terminal 21 of the unit logic circuit INV1 is connected to the signal line 6 and the output terminal 2
2 is connected to the signal line 7, the input terminal 32 and the output terminal 31 of the unit logic circuit INV6 are connected to the signal line 9 and the signal line 8, respectively.

【0007】また、単位論理回路INV2の入力端子2
3はアース14に、出力端子24は導電部12に接続さ
れ、単位論理回路INV3の入力端子25はアース15
に、出力端子26は導電部13にそれぞれ接続してお
り、未使用単位論理回路の入力端子は、低圧側であるア
ースに接続している。また、単位論理回路INV4の入
力端子28は短絡導電部11に、出力端子27は短絡導
電部10に接続され、単位論理回路INV5の入力端子
30は短絡導電部10に、出力端子29は短絡導電部1
1にそれぞれ接続しており、論理回路素子1をプリント
基板上に実装すると同時に図3に示すような単位論理回
路INV4と単位論理回路INV5とはその入出力端子
をたすき掛けに接続するいわゆるラッチ接続を行うの
で、閉回路である双安定回路が形成される。
The input terminal 2 of the unit logic circuit INV2
3 is connected to the ground 14, the output terminal 24 is connected to the conductive portion 12, and the input terminal 25 of the unit logic circuit INV3 is connected to the ground 15
Further, the output terminals 26 are connected to the conductive portions 13, and the input terminals of the unused unit logic circuits are connected to the ground which is the low voltage side. Further, the input terminal 28 of the unit logic circuit INV4 is connected to the short-circuit conductive portion 11, the output terminal 27 is connected to the short-circuit conductive portion 10, the input terminal 30 of the unit logic circuit INV5 is connected to the short-circuit conductive portion 10, and the output terminal 29 is short-circuit conductive. Part 1
1 and the logic circuit element 1 is mounted on the printed circuit board, and at the same time the unit logic circuit INV4 and the unit logic circuit INV5 as shown in FIG. Therefore, a bistable circuit that is a closed circuit is formed.

【0008】図4(A)には、単位論理回路41の入出
力端子間を導電線42で接続して閉回路を形成する実施
例であり、また、図4(B)には、単位論理回路43の
複数の入力端子47と出力端子の間を導電線44で接続
して閉回路を形成する実施例であり、いずれも単位論理
回路41、43の回路発振は防止できる。更に、図5
(B)に示すように、図3の閉回路から単位論理回路5
5に接続するようにしても差し支えない。
FIG. 4A shows an embodiment in which the input / output terminals of the unit logic circuit 41 are connected by conductive lines 42 to form a closed circuit, and FIG. 4B shows the unit logic circuit. This is an embodiment in which a plurality of input terminals 47 and output terminals of the circuit 43 are connected by a conductive wire 44 to form a closed circuit. In both cases, circuit oscillation of the unit logic circuits 41 and 43 can be prevented. Further, FIG.
As shown in (B), the closed circuit of FIG.
There is no problem even if it is connected to 5.

【0009】[0009]

【発明の効果】以上述べたように、本願発明は、複数の
単位論理回路を搭載した論理回路素子をプリント基板等
に実装する際に、使用しない単位論理回路についてその
端子を回路基板に実装すると同時に閉回路若しくは当該
他の未使用単位論理回路の出力端子と入力端子とに接続
するようにして閉回路を形成するので、あらためてジャ
ンパ線を設ける必要がなく、コスト低減を図ることが可
能である。
As described above, according to the present invention, when a logic circuit element having a plurality of unit logic circuits is mounted on a printed circuit board or the like, the terminals of unused unit logic circuits are mounted on the circuit board. At the same time, since the closed circuit is formed by connecting the output terminal and the input terminal of the closed circuit or the other unused unit logic circuit, it is not necessary to newly provide a jumper wire, and the cost can be reduced. .

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例における構成を示す概略図であ
る。
FIG. 1 is a schematic diagram showing a configuration in an embodiment of the present invention.

【図2】複数の単位論理回路を搭載した論理回路素子の
模式図である。
FIG. 2 is a schematic diagram of a logic circuit element equipped with a plurality of unit logic circuits.

【図3】本発明の実施例を示す閉回路図である。FIG. 3 is a closed circuit diagram showing an embodiment of the present invention.

【図4】本発明の実施例を示す単位論理回路の閉回路図
である。
FIG. 4 is a closed circuit diagram of a unit logic circuit showing an embodiment of the present invention.

【図5】本発明の他の実施例における配線を示す概略図
である。
FIG. 5 is a schematic view showing wiring in another embodiment of the present invention.

【図6】従来技術の構成を示す概略図である。FIG. 6 is a schematic diagram showing a configuration of a conventional technique.

【符号の説明】[Explanation of symbols]

1:論理回路素子 2:電源端子 3:アース端子 4、64:電源部 5、14、15、16、65、74、75、76:アー
ス 6、7、8、9、17、18、66、67、68、6
9、77、78:信号線 10、11:短絡導電部 12、13、72、73、79、80:導電部 19、81:バイパスコンデンサ 21、23、25、28、30、32:入力端子 22、24、26、27、29、31:出力端子 INV1、INV2、INV3、INV4、INV5、
INV6、41、43、55:単位論理回路 70:電源分離部 71:ジャンパ線
1: Logic circuit element 2: Power supply terminal 3: Ground terminal 4, 64: Power supply section 5, 14, 15, 16, 65, 74, 75, 76: Ground 6, 7, 8, 9, 17, 18, 66, 67, 68, 6
9, 77, 78: Signal line 10, 11: Short-circuit conductive part 12, 13, 72, 73, 79, 80: Conductive part 19, 81: Bypass capacitor 21, 23, 25, 28, 30, 32: Input terminal 22 , 24, 26, 27, 29, 31: output terminals INV1, INV2, INV3, INV4, INV5,
INV6, 41, 43, 55: Unit logic circuit 70: Power supply separation unit 71: Jumper wire

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】論理回路素子に搭載された複数の単位論理
回路中、未使用単位論理回路の入力端子と出力端子とを
回路基板に実装すると同時に閉回路若しくは当該他の未
使用単位論理回路の出力端子と入力端子とに接続するよ
うにして閉回路を形成してなることを特徴とする論理回
路素子における未使用端子の処理方法。
1. A plurality of unit logic circuits mounted on a logic circuit element, wherein an input terminal and an output terminal of an unused unit logic circuit are mounted on a circuit board, and at the same time a closed circuit or another unused unit logic circuit is mounted. A method for processing an unused terminal in a logic circuit element, characterized in that a closed circuit is formed so as to be connected to an output terminal and an input terminal.
【請求項2】閉回路は、1つの単位論理回路で形成する
請求項1記載の論理回路素子における未使用端子の処理
方法。
2. The method for processing an unused terminal in a logic circuit element according to claim 1, wherein the closed circuit is formed by one unit logic circuit.
【請求項3】閉回路は、2つの単位論理回路が2状態安
定回路を形成する請求項1記載の論理回路素子における
未使用端子の処理方法。
3. A method of processing unused terminals in a logic circuit element according to claim 1, wherein the closed circuit comprises two unit logic circuits forming a two-state stabilizing circuit.
JP8036124A 1996-02-23 1996-02-23 Method for processing unused terminal in logic circuit element Pending JPH09232935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8036124A JPH09232935A (en) 1996-02-23 1996-02-23 Method for processing unused terminal in logic circuit element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8036124A JPH09232935A (en) 1996-02-23 1996-02-23 Method for processing unused terminal in logic circuit element

Publications (1)

Publication Number Publication Date
JPH09232935A true JPH09232935A (en) 1997-09-05

Family

ID=12461042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8036124A Pending JPH09232935A (en) 1996-02-23 1996-02-23 Method for processing unused terminal in logic circuit element

Country Status (1)

Country Link
JP (1) JPH09232935A (en)

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