JPH09121020A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate disconnection of a wiring layer in processing using an etching method with a low etching rate, and realize good insulation property of a capacitor insulating layer. SOLUTION: A metal wiring 11 and a protective insulating layer 12 for protecting the metal wiring 11 are formed on a semi-insulating GaAs substrate 10, and an aperture 12a for forming a capacitor element is formed in protective insulating layer 12. On a peripheral portion of the aperture 12a, an inclined portion 12b inclined at an acute angle to a main surface of the semi-insulating GaAs substrate 10 is provided. A peripheral edge portion of a capacitor element made of a lower electrode 13, a capacitor insulating layer 14 and an upper electrode 15 on the aperture 12a is located on the inclined portion 12b of the protective insulating layer 12.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to, for example, a semi-insulating G
The present invention relates to a semiconductor device including a capacitive element having a lower electrode-a capacitive insulating layer-an upper electrode formed in an integrated circuit of a field effect transistor having a Schottky junction formed on a substrate made of aAs or the like, and a manufacturing method thereof. is there.

[0002]

2. Description of the Related Art A conventional semiconductor device will be described below with reference to the drawings.

FIG. 6A is a cross-sectional view of a semiconductor device having a capacitive element having a lower electrode, a capacitive insulating layer and an upper electrode formed by a conventional ion milling method. FIG.
In (a), 10 is a semi-insulating GaAs substrate, 11 is a metal wiring that is a wiring extending from the capacitive element, 12 is a protective insulating film made of SiN that insulates and protects the metallic wiring 11 from the surroundings, and 13 is a capacitive element. Is a lower electrode of the capacitor, 14 is a capacitive insulating film made of a Ti oxide or Ta oxide formed on the lower electrode 13, and 15 is an upper electrode of the capacitive element formed on the capacitive insulating film 14.

As shown in FIG. 6A, in the case of a semiconductor device formed by a physical etching method such as an ion milling method, unlike the etching method using a chemical reaction,
It is difficult to perform highly selective etching. Further, the lower electrode 13 or the metal wiring 11 is connected to the capacitance insulating film 14
When the etching rate is higher than that of the above, it is difficult to limit the etching to only the capacitive insulating film 14, and therefore the milling excess region 31 shown in FIG. 6A is generated, and in the worst case, the metal wiring 11 is formed. Would be scraped off by etching, which could lead to disconnection.

FIG. 6B is a cross-sectional view of a conventional semiconductor device in which an excessive milling region does not occur. The semiconductor device shown in FIG. 6B has a structure in which the metal wiring 11 is covered with the protective insulating film 12 and is not directly exposed to milling ions. The protective insulating film 1 is formed after the metal wiring 11 is formed.
2 is deposited and the protective insulating film 12 in the capacitive element formation region is selectively removed, and then the lower electrode 13, the capacitive insulating film 14 and the upper electrode 15 are deposited.

[0006]

However, FIG.
In the conventional semiconductor device shown in (b), when the protective insulating film 12 is processed by anisotropic etching, the side surface of the peripheral portion after the protective insulating film 12 in the capacitive element formation region is removed is semi-insulating. Since the GaAs substrate 10 is formed almost vertically to the GaAs substrate 10, the lower electrode 13, the capacitive insulating film 14 and the upper electrode 15 are bent at an angle of about 90 degrees and are deposited. The coverage of the film 14 is insufficient. Therefore, there is a problem that the defective insulation portion 32 shown in FIG. 6C is generated.

It is an object of the present invention to solve the conventional problems described above, to prevent the wiring layer from being broken, and to improve the insulation characteristics of the capacitive insulating film.

[0008]

In order to achieve the above object, the present invention provides an acute angle between the side surface of the protective insulating film at the peripheral portion of the capacitive element and the substrate surface.

Specifically, a solution means taken by the invention of claim 1 is that a semiconductor device is formed on a wiring layer formed on a substrate and on the wiring layer, and an opening portion and the opening portion are formed. A protective insulating film formed in a peripheral portion and having an inclined portion that is inclined at an acute angle with respect to the main surface of the substrate, an opening portion of the protective insulating film on the wiring layer, and a peripheral portion of the opening portion. A capacitive element having a lower electrode, a capacitive insulating film on the lower electrode, and an upper electrode on the capacitive insulating film, and a peripheral portion of the lower electrode is on an inclined portion of the protective insulating film. It is configured to be located in.

According to the structure of the first aspect, the protective insulating film of the wiring layer is formed in the peripheral portion of the capacitive element between the wiring layer and the lower electrode, and the inclined portion intersects the substrate surface at an acute angle. Since the bent portion of the lower electrode formed on the peripheral portion of the protective insulating film has an obtuse angle, the bent portion of the capacitive insulating film thereabove also has an obtuse angle.

According to a second aspect of the present invention, a semiconductor device is formed on a wiring layer formed on a substrate and on the wiring layer, and the semiconductor device is formed on an opening and a peripheral portion of the opening. A protective insulating film having an inclined portion that is inclined at an acute angle with respect to the main surface, a lower electrode formed of a region facing the opening of the protective insulating film in the wiring layer, a capacitive insulating film on the lower electrode, and the capacitance. A capacitive element having an upper electrode on an insulating film, and a peripheral portion of the capacitive insulating film is located on an inclined portion of the protective insulating film.

According to the structure of claim 2, the protective insulating film of the wiring layer is formed in the peripheral portion of the capacitive element between the wiring layer and the lower electrode, and the wiring layer has an inclined portion intersecting the substrate surface at an acute angle. The bent portion of the capacitive insulating film formed on the peripheral portion of the protective insulating film has an obtuse angle.

According to a third aspect of the present invention, in addition to the first or second aspect, the inclined portion of the protective insulating film intersects the main surface of the substrate at an angle of 45 degrees or less. Is.

According to a fourth aspect of the invention, the capacity insulating film in the structure of the first or second aspect is limited to an oxide of Ti or an oxide of Ta.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a protective insulating film depositing step of depositing a protective insulating film over an entire surface of a wiring layer formed on a substrate; An etching step of performing etching to form an opening in the capacitive element forming region of the protective insulating film and forming a sloped portion at an acute angle with respect to the main surface of the substrate in the peripheral portion of the opening; A film deposition step of sequentially depositing a lower conductive film, an insulating film, and an upper conductive film over the entire surface of the substrate, and etching the lower conductive film, the insulating film, and the upper conductive film to form the lower layer. Forming a capacitive element having a lower electrode made of the conductive film of which the peripheral portion is located above the inclined portion of the protective insulating film, a capacitive insulating film of the insulating film, and an upper electrode made of the upper conductive film. You It is an arrangement and a capacitive element forming step.

According to the fifth aspect of the present invention, since the inclined portion that intersects the substrate surface at an acute angle is formed in the peripheral portion of the protective insulating film between the wiring layer and the lower electrode, the protective insulating film is formed on the peripheral portion of the protective insulating film. Since the bent portion of the lower electrode deposited on the substrate has an obtuse angle, the bent portion of the insulating film on the lower electrode also has an obtuse angle.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a protective insulating film depositing step of depositing a protective insulating film over an entire surface of a wiring layer formed on a substrate; An etching step of performing etching to form an opening in the capacitive element forming region of the protective insulating film and forming a sloped portion at an acute angle with respect to the main surface of the substrate in the peripheral portion of the opening; A film deposition step of sequentially depositing an insulating film and a conductive film over the entire surface of the substrate, and a region facing the opening of the protective insulating film in the wiring layer by etching the insulating film and the conductive film. The configuration includes a capacitive element forming step of forming a capacitive element having a lower electrode, a capacitive insulating film made of the insulating film, and an upper electrode made of the conductive film.

According to the sixth aspect of the present invention, since the inclined portion that intersects the substrate surface at an acute angle is formed in the peripheral portion of the protective insulating film between the wiring layer and the capacitive insulating film, the peripheral portion of the protective insulating film is formed. The bent portion of the insulating film deposited on top has an obtuse angle.

According to a seventh aspect of the present invention, in the structure of the fifth or sixth aspect, in the etching step, the protective insulating film is anisotropically etched to form the opening, and then the protective insulating film is formed. A configuration including a step of performing isotropic etching to form the inclined portion is added.

According to an eighth aspect of the present invention, in addition to the fifth or sixth aspect, the etching rate for the wiring layer is equal to or higher than the etching rate of the insulating film.

The invention of claim 9 limits the insulating film in the structure of claim 5 or 6 to an oxide of Ti or an oxide of Ta.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

FIG. 1A is a sectional view of a semiconductor device according to the first embodiment of the present invention. As shown in FIG. 1A, the metal wiring 11 is formed on the semi-insulating GaAs substrate 10, and the protective insulating film 12 is semi-insulated in the opening 12a which is a capacitive element forming region and the peripheral portion of the opening 12a. Has an inclined portion 12b that intersects the main surface of the GaAs substrate 10 at an inclination angle θ that is an acute angle, and has an opening 12 of the protective insulating film 12.
In a, a capacitive element including the lower electrode 13, the capacitive insulating film 14 on the lower electrode 13, and the upper electrode 15 on the capacitive insulating film 14 is formed.

FIG. 1B is a sectional view of a semiconductor device according to a modification of the first embodiment of the present invention.

The difference between the semiconductor device according to the first embodiment shown in FIG. 1A and the semiconductor device according to the modification of the first embodiment shown in FIG. 1B is that the end portion of the capacitive element is It depends on whether or not the protective insulating film 12 is positioned on the inclined portion 12a of the protective insulating film 12, and the effect of the present invention can be sufficiently obtained in any configuration. Therefore, the description will be made using the semiconductor device having the capacitor shown in FIG.

In the semiconductor device shown in FIG. 1B, when a physical etching method such as an ion milling method that does not cause a large difference in etching rate due to substances forming the semiconductor device is used, the lower electrode 13 and the capacitive insulating film are formed. Even if the 14 and the upper electrode 15 are excessively etched, the protective insulating film 12 is merely etched, and the metal wiring 11 formed under the protective insulating film 12 is not affected. Absent.

Further, since the inclination angle θ of the inclined portion formed by the peripheral portion of the protective insulating film 12 with respect to the substrate surface is an acute angle, the capacitive insulating film 1 formed on the peripheral portion of the protective insulating film 12 is formed.
No. 4 is deposited while maintaining sufficient coverage.

The peripheral portion of the protective insulating film 12 will be described below in an enlarged manner. FIG. 2 is an enlarged cross-sectional view of the peripheral portion of the protective insulating film 12 of the metal wiring 11. As shown in FIG. 2, in the capacitive element including the lower electrode 13, the capacitive insulating film 14, and the upper electrode 15, since the inclination angle θ of the inclined portion 12b is an acute angle, a portion where each deposited film forming the capacitive element bends Since the bent portion 21 is an obtuse angle, the capacitance insulating film 14 in the bent portion 21 is formed uniformly without thinning.

Further, when the inclination angle θ is set to an acute angle of 45 degrees or less, the bent portion 21 becomes an obtuse angle and becomes smoother, so that the coverage of the capacitance insulating film 14 on the bent portion 21 is further improved.

A method of manufacturing a semiconductor device according to the first embodiment of the present invention will be described below with reference to the drawings.

3A to 3D are sectional views in order of the steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. First, FIG.
As shown in (a), a first protective insulating film 12A made of SiN is deposited on the entire surface of the semi-insulating GaAs substrate 10, and a metal wiring 11 to be a lead wiring is formed on the first protective insulating film 12A. And then SiN on the metal wiring 11 as well.
A second protective insulating film 12B made of is deposited.

Next, as shown in FIG. 3B, a portion other than the capacitive element forming region is masked with the first photoresist 16 and the anisotropic property using CF ₄ gas is applied to the capacitive element forming region. The opening 12a is formed by etching to expose the metal wiring 11 in the capacitive element formation region.

Next, as shown in FIG. 3 (c), isotropic etching using CF ₄ gas is performed on the side surface of the peripheral portion of the second protective insulating film 12B in the capacitive element forming region to form a substrate. The inclined portion 12b having an acute angle with respect to the surface is formed. The inclination angle of the inclined portion 12b formed at this time is approximately 4
5 degrees.

The anisotropic etching process shown in FIG. 3 (b) is omitted, and the inclined portion 12b is formed by only the isotropic etching process shown in FIG. 3 (c). It is possible. However, as shown in the present manufacturing method, if two-stage etching is performed, that is, anisotropic etching is performed and then isotropic etching is performed, the isotropic etching time does not depend on the thickness of the protective insulating film 12. Since it can be determined, the desired shape can be obtained more accurately.

Next, as shown in FIG. 3D, after the first photoresist 16 is removed, a lower conductive film 13A to be a lower electrode, an insulating film 14A to be a capacitive insulating film, and an upper electrode are formed. An upper conductive film 15A is sequentially deposited to form a capacitive element deposition film, a second photoresist 17 is deposited on the capacitive element formation region as a mask, and then an ion milling method or the like is performed on the capacitive element deposition film. Is used to form a capacitive element including the lower electrode 13, the capacitive insulating film 14 and the upper electrode 15. Next, as shown in FIG. 3E, the second photoresist 17 is removed and completed.

The boundary masked by the second photoresist 17 may be on the inclined portion 12b of the protective insulating film 12 as shown in FIG. 1 or may be a flat portion on the outer side. . This is because the protective insulating film 12 is interposed between the lower electrode 13 and the metal wiring 11 at any of the boundaries, so that a sufficient processing margin is secured against excessive etching of the capacitive element deposition film. Is.

The first feature of this manufacturing method is that the side surface of the peripheral edge portion of the protective insulating film 12 is formed so as to form an acute angle with respect to the substrate surface, so that the protective insulating film 12 is deposited on the peripheral edge portion. The capacitive insulating film 14 is deposited while maintaining a sufficient coverage without thinning.

[Table 1] shows the materials used for the representative capacitive insulating film 14, the lower electrode 13 and the metal wiring 11 and the materials.
The etching rate by the ion milling method using r gas is shown.

[0039]

[Table 1]

Strontium titanate (SrTiO ₃ ) and tantalum oxide (T
The etching rates of a ₂ O ₅ ) are almost the same, and the etching rates of platinum (Pt) and palladium (Pd) which are the lower electrodes are also almost the same. Further, any combination of the capacitive insulating film and the lower electrode is possible.

The second characteristic of this manufacturing method is [Table 1].
As shown in (1), the etching rate of the capacitive insulating film 14 used for improving the operating characteristics of the capacitive element tends to be low, and the etching rate of the metal wiring 11 tends to be high. Even in such a case, since the protective insulating film 12 is interposed between the lower electrode 13 and the metal wiring 11 as described above, a sufficient processing margin is secured against excessive etching during processing. Therefore, the metal wiring 11 is not broken.

A semiconductor device according to the second embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 is a sectional view of a semiconductor device according to the second embodiment of the present invention. As shown in FIG. 4, semi-insulating G
The metal wiring 11 is formed on the aAs substrate 10, and the protective insulating film 12 forms an acute angle with respect to the main surface of the semi-insulating GaAs substrate 10 in the opening 12a which is a capacitive element forming region and the peripheral portion of the opening 12a. The protective insulating film 12B has an inclined portion 12b that intersects at an inclination angle θ, and in the opening 12a of the protective insulating film 12B, the metal wiring 11 also serving as a lower electrode, the capacitor insulating film 14 on the metal wiring 11, and the capacitor insulating film 14 are formed. A capacitive element including the upper electrode 15 is formed.

A method of manufacturing a semiconductor device according to the second embodiment of the present invention will be described below.

This manufacturing method is the first method described in FIG. 3 (d).
In the step of forming the capacitive element deposited film in the method of manufacturing a semiconductor device according to the embodiment of the present invention, the insulating film 14A serving as a capacitive insulating film and the upper conductive film 15A serving as an upper electrode are formed.
The method is the same as the method for manufacturing the semiconductor device according to the first embodiment, except that the layers are sequentially deposited.

A feature of this embodiment is that the metal wiring 11 also serves as the lower electrode when the capacitive insulating film 14 having good film characteristics can be obtained without forming the lower electrode 13 shown in FIG. It can be configured to.

A semiconductor device according to the third embodiment of the present invention will be described below with reference to the drawings.

FIG. 5 is a sectional view of a semiconductor device according to the third embodiment of the present invention. In FIG. 5, semi-insulating GaA
The metal wiring 11 is formed on the substrate 10, and the protective insulating film 12 includes the opening 12a and the opening 1 which are the capacitive element formation region.
Around the peripheral portion 2a, there is an inclined portion 12b that intersects the main surface of the semi-insulating GaAs substrate 10 at an acute inclination angle θ, and in the opening 12a of the protective insulating film 12, the lower electrode 1 is formed.
3 and the capacitive insulating film 14 on the lower electrode 13 and the capacitive insulating film 1
There is formed a capacitive element including a second layer of metal wiring 18 whose portion in contact with the capacitive insulating film 14 above 4 also serves as an upper electrode.

A method of manufacturing a semiconductor device according to the third embodiment of the present invention will be described below.

This manufacturing method is the first method described in FIG.
The process is the same up to the etching step in the method for manufacturing a semiconductor device according to the embodiment.

In the next step of forming a capacitive element deposition film, after removing the first photoresist 16, two layers of a lower conductive film 13A to be a lower electrode and an insulating film 14A to be a capacitive insulating film are sequentially deposited. Then, the second photoresist 17
Is deposited as a mask on the capacitive element formation region. After that, the lower conductive film 13a and the insulating film 14a of the portion excluding the capacitive element forming region are removed by using an ion milling method or the like for the deposited film including the two layers, so that the lower electrode 13 and the capacitive insulating film are respectively formed. Forming 14 and then
The second photoresist 17 is removed. Next, after depositing a third protective insulating film 12c made of SiN as a passivation film on the entire surface of the semi-insulating GaAs substrate 10, the third protective insulating film 12c in the capacitive element formation region is removed to remove the capacitive insulating film 14 Is exposed, and a second-layer metal wiring 18 also serving as an upper electrode is formed thereon.

As a feature of this embodiment, the effect of the present invention can be obtained even when the second-layer metal wiring 18 also serves as the upper electrode in the portion in contact with the capacitive insulating film 14.

[0053]

As described above, according to the semiconductor device of the first aspect of the present invention, since the bent portion of the lower electrode formed on the peripheral portion of the protective insulating film has an obtuse angle, the bent portion above the peripheral portion of the protective insulating film has an obtuse angle. Since the bent portion of the capacitive insulating film also has an obtuse angle, the capacitive insulating film does not become thin, and good insulating characteristics can be realized. Further, since the protective insulating film is formed between the wiring layer and the lower electrode, the processing allowance is increased, so that disconnection is less likely to occur.

According to the semiconductor device of the second aspect of the present invention, since the bent portion of the capacitive insulating film formed on the peripheral portion of the protective insulating film has an obtuse angle, the capacitive insulating film does not become thin. Therefore, good insulation characteristics can be realized. Further, since the protective insulating film is formed between the wiring layer and the lower electrode, the processing allowance is increased, so that disconnection is less likely to occur. Further, since a part of the lower layer wiring also serves as the lower electrode, the structure becomes simple.

According to the semiconductor device of the third aspect of the present invention, in addition to the effects of the semiconductor device of the first or second aspect of the invention, the capacitance insulation formed on the peripheral portion of the protective insulating film is obtained. Since the bent portion of the film becomes an obtuse angle and becomes smoother, the covering property of the capacitor insulating film is further improved, and the insulating property is further improved.

According to the semiconductor device of the invention of claim 4, in addition to the effect of the semiconductor device of the invention of claim 1 or 2, the oxide of Ti or T as a capacitive insulating film is obtained.
Since the oxide of a is used, excellent operating characteristics can be obtained.

According to the method of manufacturing a semiconductor device of the fifth aspect of the present invention, since the bent portion of the lower electrode deposited on the peripheral portion of the protective insulating film has an obtuse angle, the bent portion of the capacitive insulating film on the lower electrode also has an obtuse angle. Since the angle is obtuse, the capacitance insulating film does not become thin, and good insulating characteristics can be obtained. Further, since the protective insulating film is formed between the wiring layer and the lower electrode, the processing allowance is increased, so that disconnection is less likely to occur.

According to the semiconductor device of the sixth aspect of the present invention, since the bent portion of the capacitive insulating film deposited on the peripheral portion of the protective insulating film has an obtuse angle, the capacitive insulating film does not become thin and good insulating characteristics are obtained. Can be obtained. Further, since the protective insulating film is formed between the wiring layer and the lower electrode, the processing allowance is increased, so that disconnection is less likely to occur. Further, since the lower layer wiring also serves as the lower electrode, the number of steps can be reduced.

According to the method of manufacturing a semiconductor device according to the invention of claim 7, the effect of the method of manufacturing a semiconductor device according to the invention of claim 5 or 6 can be obtained, and a protective insulating film in the capacitive element formation region can be formed. Since the anisotropic etching process is provided, the isotropic etching time can be determined without depending on the thickness of the protective insulating film. Therefore, the shape of the inclined portion at the peripheral edge of the protective insulating film can be determined. Can be formed more accurately, so that better insulating characteristics can be obtained.

According to the method of manufacturing a semiconductor device according to the invention of claim 8, the effect of the method of manufacturing a semiconductor device according to the invention of claim 5 or 6 is obtained, and the etching rate of the wiring layer is lower electrode or Even when the etching rate is higher than the etching rate of the capacitive insulating film, the protective insulating film is formed between the wiring layer and the lower electrode or the capacitive insulating film.

According to the method of manufacturing a semiconductor device according to the invention of claim 9, the effect of the semiconductor device according to the invention of claim 5 or 6 can be obtained, and in addition, the oxide of Ti or the oxide of Ta can be used as the capacitive insulating film. Since an object is used, excellent operating characteristics can be obtained.

[Brief description of the drawings]

FIG. 1A is a sectional view of a semiconductor device according to a first embodiment of the present invention. (B) is sectional drawing of the semiconductor device which concerns on the modification of the 1st Embodiment of this invention.

FIG. 2 is an enlarged cross-sectional view of a peripheral edge portion of a protective insulating film in the semiconductor device according to the first embodiment of the present invention.

3A to 3C are sectional views in order of the steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 6A is a cross-sectional view of a semiconductor device including a capacitive element having a lower electrode, a capacitive insulating layer, and an upper electrode formed by using a conventional ion milling method. FIG. 3B is a cross-sectional view of a conventional semiconductor device in which a milling excess region does not occur. (C) is an enlarged view of a defective insulation portion in the capacitive element shown in (b).

[Explanation of symbols]

 10 semi-insulating GaAs substrate 11 metal wiring 12 protective insulating film 12A first protective insulating film 12B second protective insulating film 12C third protective insulating film 12a opening 12b slope 13 lower electrode 13A lower conductive film 14 capacitance Insulating film 14A Insulating film 15 Upper electrode 15A Upper layer conductive film 16 First photoresist 17 Second photoresist 18 Second layer metal wiring 21 Bent portion 31 Milling excess region 32 Insulation defective portion θ Inclination angle

Claims (9)

[Claims] 1. A wiring layer formed on a substrate, formed on the wiring layer, formed in an opening and a peripheral portion of the opening and inclined at an acute angle with respect to a main surface of the substrate. A protective insulating film having a sloped portion, an opening of the protective insulating film on the wiring layer and a peripheral portion of the opening, the lower electrode and the capacitive insulating film on the lower electrode; A semiconductor device, comprising: a capacitive element having an upper electrode on a capacitive insulating film, wherein a peripheral portion of the lower electrode is located on an inclined portion of the protective insulating film. 2. A wiring layer formed on a substrate, an opening formed on the wiring layer and a peripheral portion of the opening and inclined at an acute angle with respect to a main surface of the substrate. A protective insulating film having an inclined portion; a lower electrode formed of a region of the wiring layer facing the opening of the protective insulating film; a capacitive insulating film on the lower electrode; and an upper electrode on the capacitive insulating film. A semiconductor device, comprising: a capacitive element having; and a peripheral portion of the capacitive insulating film located on an inclined portion of the protective insulating film. 3. The semiconductor device according to claim 1, wherein the inclined portion of the protective insulating film intersects the main surface of the substrate at an angle of 45 degrees or less. 4. The capacitor insulating film is made of an oxide of Ti or Ta.
3. The semiconductor device according to claim 1, wherein the semiconductor device is an oxide. 5. A protective insulating film deposition step of depositing a protective insulating film over the entire surface of a wiring layer formed on a substrate, and etching the protective insulating film to form a capacitive element in the protective insulating film. An etching step of forming an opening in the formation region and forming a sloped portion in the peripheral portion of the opening at an acute angle with respect to the main surface of the substrate; A film deposition step of sequentially depositing a film and an upper conductive film; and etching the lower conductive film, the insulating film, and the upper conductive film to form the lower conductive film and a peripheral portion of the protective insulating film. A lower electrode located above the slope of
A method of manufacturing a semiconductor device, comprising: a capacitive element forming step of forming a capacitive element having a capacitive insulating film made of the insulating film and an upper electrode made of the upper conductive film. 6. A protective insulating film deposition step of depositing a protective insulating film over the entire surface of a wiring layer formed on a substrate, and etching the protective insulating film to form a capacitive element in the protective insulating film. An etching step of forming an opening in the formation region and forming an inclined portion that is inclined at an acute angle with respect to the main surface of the substrate in the peripheral portion of the opening, and an insulating film and a conductive film over the entire surface of the substrate. A film deposition step of sequentially depositing, etching the insulating film and the conductive film,
A capacitive element forming step of forming a capacitive element having a lower electrode formed of a region of the wiring layer facing the opening of the protective insulating film, a capacitive insulating film formed of the insulating film, and an upper electrode formed of the conductive film; A method of manufacturing a semiconductor device, comprising: 7. In the etching step, anisotropic etching is performed on the protective insulating film to form the opening, and then isotropic etching is performed on the protective insulating film to remove the inclined portion. The method of manufacturing a semiconductor device according to claim 5, further comprising a step of forming the semiconductor device. 8. The method of manufacturing a semiconductor device according to claim 5, wherein an etching rate for the wiring layer is equal to or higher than an etching rate for the insulating film. 9. The method of manufacturing a semiconductor device according to claim 5, wherein the insulating film is an oxide of Ti or an oxide of Ta.