JPH0898144A - Error correction system for video data - Google Patents

Abstract

PURPOSE: To strengthen correction capability by recording an error correction code consisting of an inner code and an outer code on the data block of a video sector and recording the error correction code for recording data of the video sector on an audio sector. CONSTITUTION: The block of video data and the error correction code consisting of the inner code C1 and the outer code C2 are recorded on the video sectors of respective tracks. The (163 and 149) Reed-solomon codes of code length 163 bytes and information bit 149 bytes are recorded on the audio sectors as the error correction codes C3 with data of the video sectors as objects on respective tracks A and B. The inner code C1 against the error correction code C3 are recorded on the audio sectors. Thus, sevenfold error correction in a maximum or fourteenfold error detection in a maximum becomes possible against a burst error and correction capability in the same direction as the outer code C2 is strengthened.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video tape recorder for recording digital video data, and more particularly to a system for correcting an error in video data based on an error correction added to the video data. .

[0002]

2. Description of the Related Art In the ATV (Advanced Television) standard proposed as a next-generation digital broadcasting system in the United States, MPEG (Moving Picture Image) which is an international standard for image compression is used as a compression method when transmitting image data.
Coding Experts Group) method is about to be adopted.

The MPEG system employs motion-compensated prediction, DCT (discrete cosine transform), and variable length coding in data coding. As shown in the frame structure of FIG. Depending on the prediction mode, I (intra-c
oded) picture, P (predictive coded) picture, B (bi
-directionally predictive coded) pictures are classified into three types. The I picture is an intra-frame coded image, the P picture is an inter-frame predictive coded image predicted from a temporally preceding frame, and the B picture is an inter-frame predictive coded image from preceding and following frames.

FIG. 7 shows a data hierarchical structure of an image in the MPEG system. It is configured as follows from the lower layer. (Block layer) Blocks are 8x adjacent to each other in luminance or color difference.
It consists of 8 pixels, and DCT is executed in this unit. (Macroblock Layer) A macroblock is composed of four adjacent luminance blocks and two chrominance blocks Cb and Cr at the same position on the screen, for a total of six blocks. (Slice Layer) A slice is composed of a plurality of macroblocks that are continuous in the scanning order of an image. (Picture layer) A picture consists of multiple slices,
Form one image. It is classified into the above-mentioned I picture, P picture, and B picture depending on the encoding format. (GOP Layer) A GOP (Group of Pictures) is composed of one or a plurality of I pictures and 0 or a plurality of non-I pictures. (Video Sequence Layer) A video sequence is composed of one or a plurality of GOPs having the same image size and image rate.

On the other hand, HD (High Definition) digital V
The CR Council is studying standardization (SD digital VCR format) of a digital video tape recorder (digital VTR) for recording and reproducing a video signal as digital data. Here, it is conceivable to record the data of the ATV standard (ATV signal) which is image-compressed by the above-mentioned MPEG system on the magnetic tape. Figure 8
Shows a standard signal recording format in a digital VTR. As shown in the figure, the tracks formed on the signal surface of the tape (23) include an ITI sector including insert data and track information, an audio data sector (audio sector), a video data sector (video sector), and subcode data. It is composed of sectors. Recording speed is 3 per second
An image of one frame is recorded using an average of 10 tracks.

Data is recorded in units called sync blocks, and 149 sync blocks can be recorded in a video sector of one track and 14 in an audio sector.
Sync blocks can be recorded. The video data is shown in Figure 9.
As shown in FIG. 5, the block is treated as a block of 135 bytes × 77 bytes, and an error correction code composed of an inner code C1 and an outer code C2, sync data and I
The D data is added, and these data are recorded in the video sector of one track. The inner code is mainly used for detecting and correcting random errors, and the outer code is mainly used for detecting and correcting burst errors. One sync block is recorded in the order of sync data, ID data, video data, and error correction code.

Further, the voice data is treated as a block of 9 bytes × 77 bytes as shown in FIG. 10, and an error correction code composed of an inner code C1 and an outer code C2, sync data and ID are handled for the data block. Data is added and these data are recorded in the audio sector of one track. The audio sector is S
The D digital VCR format is specified for the purpose of recording original audio data,
In the case of a signal capable of recording all signals including audio data with a capacity of only a video sector like the ATV signal, the audio sector can be used for other purposes.

[0008]

As described above, the digital V
In TR, an error correction code composed of an inner code C1 and an outer code C2 is added to the video data to enable error correction of the video data. For example, the signal surface of the tape has elongated scratches in the track direction. When running, there is a risk that error correction will be impossible.

Particularly, when the above-mentioned MPEG ATV signal is recorded by a digital VTR, when an intra-frame coded image (I frame) cannot be correctly decoded due to the occurrence of a data error, an inter-frame predictive coded image is obtained. (P
Even the frames and B frames cannot be correctly decoded, and the screen is greatly disturbed.

An object of the present invention is to provide a video data error correction system capable of further strengthening the correction capability in a digital VTR as compared with the conventional error correction using an inner code and an outer code.

[0011]

According to the video data error correction method of the present invention, a group of video data recorded in each video sector on a tape is formed by arranging these video data in a matrix. Inner code C for data block
1 and an outer code C2, an error correction code C3 for the recorded data of the video sector is recorded in the audio sector, and these error correction codes C1, C2, C3 are recorded during signal reproduction. The error correction is performed based on.

In a digital VTR in which A channel tracks and B channel tracks having different azimuth angles are repeatedly formed on the tape, the audio sector of the A channel track is recorded in the video sectors of the adjacent A and B channel tracks. The error correction code C3 for half of the data that alternates between the two tracks is recorded, and the error correction code C3 for the remaining half of the data is recorded in the audio sector of the B channel track.

[0013]

In the video data error correction system according to the present invention, video data to which the same error correction code as the conventional one is added is recorded in the video sector on the tape, and a new error correction code is recorded in the audio sector. To record. At this time, the ATV signal including the video data and the audio data is converted to the digital V
When recording on tape with the standard signal recording format in TR, the data rate of ATV signal is about 19.3M.
While the data rate of the data recording by the digital VTR is about 25.5 Mbps,
The ATV signal can be recorded using only the video sector. Therefore, it is not necessary to use the audio sector to record the ATV signal, and the audio sector can be used for other purposes. Therefore, in the present invention, the audio sector is used for recording a new error correction code.

In the error correction system of the present invention, as shown in FIG. 9, in the video sector of each track, as in the conventional case, an error consisting of a block of video data and an inner code C1 and an outer code C2 for the block. The correction code is recorded. Then, in the audio sector of each track, in the block area of 14 bytes × 85 bytes shown in FIG.
An error correction code for the recorded data (video data and error correction codes C1 and C2) of the video sector is recorded.

In the signal reproduction of the tape thus recorded, first, the error correction based on the inner code C1 read from the video sector is performed, and then the error correction based on the error correction code C3 read from the audio sector. Finally, error correction is performed based on the outer code C2 read from the video sector. As a result, the conventional inner code C
The error correction capability by the new error correction code C3 is added to the error correction capability by the 1 and outer code C2, and the correction capability is strengthened as compared with the conventional one.

In particular, the new error correction code C3 is effective in correcting a burst error like the outer code C2, and SD
The correction capability can be enhanced even when an MPEG ATBV signal or the like, which is weaker in error than a format signal, is recorded.

Further, in a digital VTR in which an A channel track (hereinafter simply referred to as A track) and a B channel track (hereinafter simply referred to as B track) are repeatedly formed on a tape, data is recorded in audio sectors of the A track and B track. Data that is the target of the error correction code
By adopting a two-track interleave system in which (information bits) are alternately switched on both tracks, even if a narrow scratch runs on either one of the A channel and the B channel, the error correction code C3 of both tracks is used. When performing error correction on a sequence, errors are dispersed into two error correction sequences, so that the correction capability is improved as compared with the non-interleaved system that performs error correction within one track.

[0018]

According to the error correction system for video data according to the present invention, the correction capability can be strengthened as compared with the conventional error correction using only the inner code and the outer code. This is effective for a digital VTR that records a bitstream in which inter prediction coded images are mixed on a tape.

[0019]

[Example] Hereinafter, ATV standard data is converted to HD digital V
An embodiment of recording by a digital VTR based on the standards of the CR Council will be specifically described with reference to the drawings.

In the digital VTR according to the present invention,
As shown in FIG. 8, an ITI sector, an audio data sector (audio sector), a video data sector (video sector), and a subcode data sector are formed on one track of the tape (23) as in the conventional case. To be done. The A channel head and the B channel head (double azimuth head) provided in the rotary head cylinder repeatedly form A track and B track having different azimuth angles.

Here, in the video sector of each track,
As shown in FIG. 6, bit streams of I picture, P picture, and B picture encoded by the MPEG system are recorded. At this time, as shown in FIG. 9, a sync block number and ID data are added to the group of video data to be recorded on one track in addition to the inner code C1 and the outer code C2. The inner code C1 is a (85,77) Reed-Solomon code, and the outer code C2 is a (149,138) Reed-Solomon code. Therefore, with respect to random errors, it is possible to correct errors up to four times or detect errors up to eight times.
For burst errors, up to five times of error correction,
Alternatively, maximum 11-fold error detection is possible.

On the other hand, in the audio sector, as shown in FIG. 1, a (163,149) Reed-Solomon code with a code length of 163 bytes and information bits of 149 bytes is erroneous for the data of the video sector for each of A track and B track. It is recorded as the correction code C3. The inner code C1 for the correction code C3 is recorded in the audio sector. As a result, it becomes possible to correct a maximum of seven errors or a maximum of fourteen errors with respect to burst errors, and enhance the correction capability in the same direction as the outer code C2.

In this embodiment, a two-track interleave system is adopted when adding the error correction code C3. That is, the odd sync block of the A track and the even sync block of the B track are used as information bits, the redundant bit (error correction code C3) is recorded in the audio sector of the A track, and the even sync block of the A track and the odd sync block of the B track are recorded. The sync block is used as an information bit, and the redundant bit (error correction code C3) is recorded in the audio sector of the B track.

For example, as shown in FIG. 4, when the data in the video sector and the audio sector in the A track and the B track are represented by a matrix, the information bits in one error correction sequence are Va (0, n), Vb. (1, n), ..., Va (2i, n), Vb (2j + 1, n), ...,
Va (148, n) i = 0 to 74, j = 0 to 73, and n = 0 to 84. On the other hand, the redundant bits are Aa (0, n), Aa (1, n), ..., Aa (k, n), ..., Aa (13, n) k = 0 to 13, n = 0 to 84. The information bits in the other error correction sequence are Vb (0, n), Va (1, n), ..., Vb (2i, n), Va (2j + 1, n) ,.
Vb (148, n) i = 0 to 74, j = 0 to 73, and n = 0 to 84. On the other hand, the redundant bits are Ab (0, n), Ab (1, n), ..., Ab (k, n), ..., Ab (13, n) k = 0 to 13, n. = 0 to 84.

According to the above-mentioned two-track interleaving method, when the maximum correction capability is 4 bytes, for example, even if an error of 5 bytes exceeding the correction capability occurs in one track, the error shown in FIG. As indicated by hatching in b), 5
Byte errors are dispersed into the above two error correction sequences, one error correction sequence is suppressed to 2 bytes, and the other error correction sequence is suppressed to 3 bytes, and correction is possible.

Next, the signal recording circuit shown in FIG. 2 will be described. A input at a bit rate of 19.3 Mbps
TV signal goes through the rate conversion circuit (1) to 25.5 Mbps
After being converted to a bit rate of 1, the A track data is 1
It is supplied to the video track memory (3) for the A track via the track delay circuit (2) and the B track data is directly transferred to the B track.
It is supplied to the video sector memory (13) for tracks.

The data for one video sector stored in the video sector memory (3) is first converted into the C2 correction code adding circuit (4).
The outer code C2 is added by. After that, the error correction code C3 is added by the C3 correction code addition circuit (6) to the data string interleaved by the 2-track interleave circuit (5) for the A track, and the error correction code C3 is added.
Are stored in the audio sector memory (7) for the A track. Both memories with correction codes C2 and C3 added (3)
The data stored in (7) is the C1 correction code addition circuit.
The inner code C1 is added in (8).

The data to which the correction codes C1, C2 and C3 are added in this way is added to the sync block number and ID data by the data addition circuit (9) and then 24 by the digital modulation circuit (10). -25 modulation is applied, and then it is sent to the A channel head (12) through the recording amplifier (11) and recorded on the tape (23).

On the other hand, video sector memory for B track
Similarly, the data for one video sector stored in (13)
First, the outer code C2 is added by the C2 correction code adding circuit (14). After that, for the data train interleaved by the 2-track interleave circuit (15) for B track, C
The error correction code C3 is added by the 3-correction code addition circuit (16), and the error correction code C3 is stored in the audio sector memory (17) for the B track. Correction code C2,
The data added with C3 and stored in both memories (13) and (17) is further added with the inner code C1 by the C1 correction code adding circuit (18).

The data to which the correction codes C1, C2 and C3 are added in this manner is added to the sync block number and the ID data in the data addition circuit (19), and then added in the digital modulation circuit (20) to 24. -25 modulation is applied, and further it is sent to the B channel head (22) through the recording amplifier (21) and recorded on the tape (23).

Next, the signal reproducing circuit shown in FIG. 3 will be described. The signal reproduced from the tape (23) by the A channel head (12) is output from the reproduction amplifier (24) to the waveform equalization circuit.
After being sent to (25) and waveform equalization, digital demodulation circuit
At (26), 25-24 demodulation is performed. The demodulated data is separated into sync block number and ID data by the sync detection data separation circuit (27), and then the C1 correction processing circuit
At (28), error correction processing based on the inner code C1 is performed,
The result is stored in the video sector memory (29) for the A track and the audio sector memory (33).

The data for one video sector stored in the video sector memory (29) is interleaved by the A-track two-track interleave circuit (30), and the data string obtained by this is C3 correction processing circuit (31). At
After receiving the correction processing based on the error correction code C3, further C
The 2 correction processing circuit (32) receives the correction processing based on the outer code C2 and stores it again in the A track video sector memory (29).

On the other hand, from the tape (23) to the B channel head
Similarly for the signal reproduced by (22), the reproduction amplifier (34)
Sent to the waveform equalization circuit (35) from the waveform equalization,
The digital demodulation circuit (36) performs 25-24 demodulation.
The demodulated data is separated from the sync block number and ID data by the sync detection data separation circuit (37).
The C1 correction processing circuit (38) performs error correction processing based on the inner code C1, and the result is stored in the video sector memory (39) for B track and the audio sector memory (43).

The data for one video sector stored in the video sector memory (39) is interleaved by the B-track two-track interleave circuit (40), and the resulting data string is the C3 correction processing circuit (41). At
After receiving the correction processing based on the error correction code C3, further C
The 2 correction processing circuit (42) receives the correction processing based on the outer code C2 and stores it again in the B track video sector memory (39).

Then, the data stored in the video sector memory (29) for the A track is directly passed, and the data stored in the video sector memory (39) for the B track is passed through the 1-track delay circuit (44). , To both input terminals of the selector switch (45). The changeover switch (45) is changed over for each track, and the data selected by this is converted by the rate conversion circuit (46) from a data rate of 25.5 Mbps to 19.3 Mbps and output as an ATV signal. .

According to the error correction system for video data of the present invention, in addition to the conventional inner code C1 and outer code C2,
Since a new error correction code C3 is introduced and the audio sector on the track is effectively used to record the error correction code C3, the correction capability is strengthened as compared with the conventional method while maintaining the standard format of the digital VTR. You can
By adopting the 2-track interleave method, the ability to correct burst errors can be further improved. Further, in the digital VTR equipped with the double azimuth head, since the error correction of the present invention can be realized by utilizing the memory for two tracks which has been conventionally equipped for error correction, it is not necessary to add a new memory. Therefore, the circuit configuration can be prevented from becoming complicated.

The above description of the embodiments is for explaining the present invention and should not be construed to limit the invention described in the claims or to limit the scope thereof. The configuration of each part of the present invention is not limited to the above-mentioned embodiment, and it goes without saying that various modifications can be made within the technical scope described in the claims.

[Brief description of drawings]

FIG. 1 is a diagram showing a data structure in an error correction system of the present invention.

FIG. 2 is a block diagram of a signal recording circuit.

FIG. 3 is a block diagram of a signal reproduction circuit.

FIG. 4 is a chart showing a matrix arrangement of data in a video sector and an audio sector.

FIG. 5 is a diagram for explaining the advantage of the 2-track interleave method.

FIG. 6 is a diagram showing a frame structure of an MPEG system.

FIG. 7 is a diagram showing a data hierarchical structure in the MPEG system.

FIG. 8 is a diagram showing a data format on a track in a digital VTR.

FIG. 9 is a diagram showing a data structure of a video sector.

FIG. 10 is a diagram showing a data structure of an audio sector.

[Explanation of symbols]

 C1 inner code C2 outer code C3 error correction code (4) C2 correction code addition circuit (6) C3 correction code addition circuit (8) C1 correction code addition circuit (28) C1 correction processing circuit (31) C3 correction processing circuit (32 ) C2 correction processing circuit (23) Tape (12) A channel head (22) B channel head

Continuation of front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical display location G11B 20/18 574 B 8940-5D H04N 7/24

Claims (2)

[Claims] 1. A system in which a track composed of a video sector and an audio sector is repeatedly formed on a tape, an error correction code is recorded together with video data in each video sector, and an error in the video data is corrected during signal reproduction. In the group of video data recorded in each video sector, an error correction code including an inner code C1 and an outer code C2 is recorded for a data block in which these video data are arranged in a matrix. At the same time, an error correction method for video data in which an error correction code C3 for the recorded data of the video sector is recorded in the audio sector and error correction is performed based on these error correction codes C1, C2, C3 during signal reproduction. 2. A tape having different azimuth angles is provided on the tape.
The channel track and the B channel track are repeatedly formed, and in the audio sector of the A channel track, an error occurs in half of the data recorded in the video sectors of the adjacent A and B channel tracks, which alternate between the two tracks. The error correction method for video data according to claim 1, wherein the correction code C3 is recorded, and the error correction code C3 for the remaining half of the data is recorded in the audio sector of the B channel track.