JPH08330238A - Positioning method of wafer stage - Google Patents
Positioning method of wafer stageInfo
- Publication number
- JPH08330238A JPH08330238A JP13419395A JP13419395A JPH08330238A JP H08330238 A JPH08330238 A JP H08330238A JP 13419395 A JP13419395 A JP 13419395A JP 13419395 A JP13419395 A JP 13419395A JP H08330238 A JPH08330238 A JP H08330238A
- Authority
- JP
- Japan
- Prior art keywords
- positioning
- wafer
- wafer stage
- gas
- reaction tube
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体製造装置の１つ
であるＣＶＤ装置、特に枚葉ＣＶＤ装置におけるウェー
ハ台の位置決め方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CVD apparatus, which is one of semiconductor manufacturing apparatuses, and more particularly to a wafer table positioning method in a single wafer CVD apparatus.
【０００２】[0002]
【従来の技術】図２は（Ａ），（Ｂ）はそれぞれ従来の
枚葉式ＣＶＤ装置におけるウェーハ台の位置決め方法を
実施した反応室の構造を示す縦断面図及びＡ−Ａ線矢視
断面図である。図２において１は石英反応管、２はこれ
にウェーハを載せて挿設されるウェーハ台、３は石英反
応管１の左右に配設したガス導入出部で、反応ガスは左
右のガス導入出部のガス導入孔３Ａからタイミングをと
って切り換えて流し、ガス導出孔３Ｂから流出させる。
４はガス導入出部３のフランジ部である。従来のウェー
ハ台の位置決め方法は、図２に示すように石英反応管１
の内部にリブ８を設け、その内部に例えば石英から成る
ウェーハ台２を装着して位置決めをしていた。2. Description of the Related Art FIGS. 2A and 2B are a longitudinal sectional view and a sectional view taken along the line AA of the reaction chamber in which a method of positioning a wafer stage in a conventional single-wafer CVD apparatus is implemented. It is a figure. In FIG. 2, reference numeral 1 is a quartz reaction tube, 2 is a wafer stage on which a wafer is placed and inserted, and 3 is a gas inlet / outlet portion arranged on the left and right of the quartz reaction tube 1. The gas is introduced from the gas introduction hole 3A at a certain timing while being switched, and is made to flow out from the gas discharge hole 3B.
Reference numeral 4 is a flange portion of the gas inlet / outlet portion 3. As shown in FIG. 2, the conventional method for positioning the wafer stage is the quartz reaction tube 1
The rib 8 is provided inside the wafer, and the wafer stage 2 made of, for example, quartz is attached to the inside for positioning.
【０００３】[0003]
【発明が解決しようとする課題】このような従来方法で
は、ウェーハ台２の装着の際、石英反応管１の内部にリ
ブ８があるため、メンテナンス性が悪く、また石英反応
管１の洗浄が難しいという課題がある。In such a conventional method, since the ribs 8 are provided inside the quartz reaction tube 1 when the wafer stage 2 is mounted, the maintainability is poor and the cleaning of the quartz reaction tube 1 is difficult. There is a problem of difficulty.
【０００４】[0004]
【課題を解決するための手段】本発明方法は、上記の課
題を解決するため、図１に示すように半導体製造装置に
おけるガス導入出部３のフランジ部４に切り欠き５を設
け、この切り欠き５と、前記ウェーハ台２から延在する
位置決め部６とで位置決めすることを特徴とする。In order to solve the above problems, the method of the present invention is provided with a notch 5 in a flange portion 4 of a gas inlet / outlet portion 3 in a semiconductor manufacturing apparatus as shown in FIG. Positioning is performed by the notch 5 and the positioning portion 6 extending from the wafer table 2.
【０００５】[0005]
【作 用】上記のような構成であるから、ガス導入出部
３のフランジ部４に設けた切り欠き５に、ウェーハ台２
から延在する位置決め部６を密着させることで、位置決
めされることになる。[Operation] Because of the above-mentioned configuration, the wafer table 2 is provided in the notch 5 provided in the flange portion 4 of the gas introduction / extraction portion 3.
Positioning is performed by closely contacting the positioning portion 6 extending from.
【０００６】[0006]
【実施例】図１（Ａ）〜（Ｃ）はそれぞれ本発明方法を
実施した枚葉式ＣＶＤ装置における反応室の構造を示す
縦断面図、同じく横断平面図及び図１（Ａ）のＡ−Ａ線
矢視図である。図１において１は石英反応管、２はこれ
にウェーハを載せて挿設されるウェーハ台、３は石英反
応管１の左右に配設したガス導入出部で、反応ガスは左
右のガス導入出部のガス導入孔３Ａからタイミングをと
って切り換えて流し、ガス導出孔３Ｂから流出させる。
４はガス導入出部３のフランジ部、７は角形のヒータ、
９は搬送チャンバ、１０はゲートバルブ、１１は開口部
である。本実施例は、反応管１内にウェーハを載せるウ
ェーハ台２を挿設し、該反応管１内にガス導入出部３よ
りガスを導入し、ヒータ７で加熱して、ウェーハを処理
する装置におけるガス導入出部３の後部に、ウェーハ台
２を装着する切り欠き５を設け、この切り欠き５と、ウ
ェーハ台２から延在する位置決め部６とで位置決めする
構成とする。1 (A) to 1 (C) are longitudinal sectional views showing the structure of a reaction chamber in a single-wafer CVD apparatus for carrying out the method of the present invention, a cross-sectional plan view thereof, and A- in FIG. 1 (A). It is a line A arrow line view. In FIG. 1, 1 is a quartz reaction tube, 2 is a wafer stage on which a wafer is placed and inserted, and 3 is a gas inlet / outlet portion arranged on the left and right of the quartz reaction tube 1. The gas is introduced from the gas introduction hole 3A at a certain timing while being switched, and is made to flow out from the gas discharge hole 3B.
4 is a flange portion of the gas inlet / outlet portion 3, 7 is a rectangular heater,
9 is a transfer chamber, 10 is a gate valve, and 11 is an opening. In this embodiment, a wafer table 2 for mounting a wafer is inserted in a reaction tube 1, gas is introduced into the reaction tube 1 from a gas inlet / outlet part 3, and heated by a heater 7 to process a wafer. A cutout 5 for mounting the wafer table 2 is provided at the rear part of the gas introduction / extraction section 3 in FIG. 3, and positioning is performed by the cutout 5 and the positioning section 6 extending from the wafer table 2.
【０００７】上記構成において石英反応管１の内部にウ
ェーハ台２を挿入後、ガス導入出部３のフランジ部４に
設けた切り欠き５に、ウェーハ台２から延在する位置決
め部６を密着させることで、ウェーハ台２の位置決めが
容易にできるようになる。In the above structure, after the wafer stage 2 is inserted into the quartz reaction tube 1, the positioning part 6 extending from the wafer stage 2 is brought into close contact with the notch 5 provided in the flange part 4 of the gas inlet / outlet part 3. As a result, the wafer base 2 can be easily positioned.
【０００８】上述のように本発明によれば、ウェーハ台
の位置決めを容易に正確に行うことができるばかりでな
く、ウェーハ台装着のメンテナンスを容易にできる。As described above, according to the present invention, not only the positioning of the wafer table can be performed easily and accurately, but also the maintenance of mounting the wafer table can be facilitated.
【図１】（Ａ）〜（Ｃ）はそれぞれ本発明方法を実施し
た枚葉式ＣＶＤ装置における反応室の構造を示す縦断面
図、同じく横断平面図及び図１（Ａ）のＡ−Ａ線矢視図
である。1A to 1C are a longitudinal sectional view showing a structure of a reaction chamber in a single-wafer CVD apparatus for carrying out the method of the present invention, a cross-sectional plan view thereof, and a line AA in FIG. 1A. FIG.
【図２】（Ａ），（Ｂ）はそれぞれ従来の枚葉式ＣＶＤ
装置におけるウェーハ台の位置決め方法を実施した反応
室の構造を示す縦断面図及びＡ−Ａ線矢視断面図であ
る。2A and 2B are conventional single-wafer CVD, respectively.
FIG. 5 is a vertical cross-sectional view and a cross-sectional view taken along the line AA of the reaction chamber, in which the method of positioning the wafer stage in the apparatus is performed.
１ 石英反応管 ２ ウェーハ台 ３ ガス導入出部 ３Ａ ガス導入孔 ３Ｂ ガス導出孔 ４ フランジ部 ５ 切り欠き ６ 位置決め部 ７ ヒータ ８ リブ ９ 搬送チャンバ １０ ゲートバルブ １１ 開口部 1 Quartz Reaction Tube 2 Wafer Stage 3 Gas Inlet / Outlet 3A Gas Inlet Hole 3B Gas Outlet Hole 4 Flange 5 Notch 6 Positioning 7 Heater 8 Rib 9 Transfer Chamber 10 Gate Valve 11 Opening
Claims (1)
を挿設し、該反応管内にガス導入出部よりガスを導入
し、ヒータで加熱して、ウェーハを処理する装置におけ
る半導体製造装置におけるガス導入出部のフランジ部に
切り欠きを設け、この切り欠きと、前記ウェーハ台から
延在する位置決め部とで位置決めすることを特徴とする
ウェーハ台の位置決め方法。1. A gas stage in a semiconductor manufacturing apparatus in a device for processing a wafer by inserting a wafer stage for mounting a wafer in a reaction tube, introducing gas into the reaction tube from a gas introducing / extracting portion, and heating with a heater. A method of positioning a wafer table, characterized in that a notch is provided in a flange portion of the projecting portion, and the notch and a positioning portion extending from the wafer table are used for positioning.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13419395A JP3433862B2 (en) | 1995-05-31 | 1995-05-31 | Semiconductor manufacturing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13419395A JP3433862B2 (en) | 1995-05-31 | 1995-05-31 | Semiconductor manufacturing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08330238A true JPH08330238A (en) | 1996-12-13 |
| JP3433862B2 JP3433862B2 (en) | 2003-08-04 |
Family
ID=15122615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13419395A Expired - Fee Related JP3433862B2 (en) | 1995-05-31 | 1995-05-31 | Semiconductor manufacturing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3433862B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5960159A (en) * | 1997-10-14 | 1999-09-28 | Kokusai Electric Co., Ltd. | Heat treatment of semiconductor wafers where upper heater directly heats upper wafer in its entirety and lower heater directly heats lower wafer in its entirety |
-
1995
- 1995-05-31 JP JP13419395A patent/JP3433862B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5960159A (en) * | 1997-10-14 | 1999-09-28 | Kokusai Electric Co., Ltd. | Heat treatment of semiconductor wafers where upper heater directly heats upper wafer in its entirety and lower heater directly heats lower wafer in its entirety |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3433862B2 (en) | 2003-08-04 |
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