JPH0831255B2 - Data recorder - Google Patents

Description

The present invention relates to a data recording device, and more particularly to a data recording device for recording data on a tape-shaped recording medium by a rotary head.

[Conventional technology]

Data recorders that record and reproduce digital data include those that use a disk-shaped recording medium such as a floppy disk and those that use a tape-shaped recording medium.
Generally, for consumer equipment that does not require recording of large amount of data, a data recorder using a disk-shaped recording medium that can easily search for data is mainly used. A data recorder that uses a tape-shaped recording medium is mainly used as a recording device.

A data recorder used as a data bank of a large-sized computer is of a type that records on a tape-shaped recording medium with a fixed head. On the other hand, in recent years, there has been an increasing number of opportunities to handle large-capacity data such as image information as data, and there is a need for a data recorder capable of handling a large amount of data even in consumer devices. The data recorder using the fixed head is not suitable as a consumer device because of the large amount of tape used and the large size of the device.

Therefore, recently, a small-sized data recorder for consumer use has been proposed in which data is recorded / reproduced on / from a tape-shaped recording medium by a rotary head.

[Problems to be solved by the invention]

However, this type of rotary head type data recorder has the following problems. First, since the tape-shaped recording medium is used, it takes a very long time to access the tape for picking up desired data later. Further, since there is no absolute address, desired data cannot be erased or rewritten freely. That is, it is difficult to edit the data.

Therefore, it has been considered to record the sub data (hereinafter referred to as ID) as the data for various searches in a mixture with the main data recorded by the rotary head. However, it is difficult to run the tape at a high speed to detect desired search data, and if the running speed of the tape is reduced, it takes a long time to search. Editing data is also difficult.

The present invention has been made in view of the above background, and is a data recording device that can search recorded data in a short time and can easily edit data, and can handle a large amount of small data. The purpose is to provide things.

[Means for solving problems]

For this purpose, according to the present invention, the tape-shaped recording medium is conveyed in the longitudinal direction thereof at a predetermined first speed, and a large number of the recording mediums are arranged in parallel on the first region extending in the longitudinal direction of the medium. A first mode in which data relating to main information is recorded by a rotary head while forming a track, and the tape-shaped recording medium is conveyed in its longitudinal direction at a second speed higher than the first speed, Address data indicating a tape address is repeated a plurality of times for each track while forming a large number of parallel tracks in a second area extending in the longitudinal direction of the medium in parallel without recording information. A data recorder having a second mode of recording with a rotating head is presented.

[Action]

According to the above-mentioned configuration, the rotating head crosses each track in the second area diagonally while the tape-shaped recording medium is running at a high speed, but the address data is repeatedly recorded in the second area. Since the address data is obtained from any part of the track, the address data can be surely reproduced even when the tape-shaped recording medium is run at a high speed, and the search speed is significantly increased. Further, since the address data recorded in the second area can be used as an absolute address of the tape-shaped recording medium, the editing of the data becomes easy.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Explanation of Configuration) FIG. 2 is a diagram showing a schematic configuration of an embodiment of the present invention. In the figure, 11 is a terminal to which an analog video signal obtained from a camera or the like (not shown) is input. In this data recorder, the analog video signal is converted into digital data and recorded and reproduced. 12 is an analog that digitizes the analog video signal input to terminal 11
A digital (A / D) converter, 13 is a field memory capable of storing one field of a digitalized video signal, 14 is an address control circuit for controlling write and read addresses of the field memory 13, and 15 is control data and The D-ID processing circuit forms and outputs data (hereinafter referred to as ID) other than video data such as character data. In the data recorder of this embodiment, the ID is recorded together with the video data.
Since there are an ID and an ID to be recorded in the sub-coat area described later, the former is called D-ID and the latter is called S-ID.

16 is interleave processing for video data and ID,
After adding a redundant code such as an error detection code and an error correction code, the PCM processor outputs as PCM data, 17 is a modulator for digitally modulating the PCM data output from the PCM processor 16, and 18 is a recording amplifier. .

Further, 21 is a reproduction amplifier, 22 is a demodulator corresponding to the modulator 17, 23 is the number and pattern of occurrence of data errors using the error detection code and the error correction code in the PCM data obtained through the demodulator 22. An error detection circuit for detecting the error, 24 is a system controller for controlling the entire device, 25 is a PCM processor that performs processing reverse to that of the PCM processor 16, that is, deinterleave processing and error correction processing, and 26 is an ID obtained from the PCM processor 25. Based on the ID processing circuit that outputs various control data and data other than video data, 27 is a PCM processor 25
A field memory for receiving the video data output from the field memory, 28 an address control circuit for controlling the write and read addresses of the field memory 27, and 29 a digital-analog for analogizing and outputting the digital video data read from the field memory 27. A (D / A) converter, 30 is an output terminal for an analog video signal.

H1 and H2 are rotating heads, respectively, and their arrangement will be described with reference to FIGS. 3 (A) and 3 (B). Figure 3 (A)
As shown in, the heads H1 and H2 are mounted on the rotary cylinder 50 with a phase difference of 180 ° with respect to each other, and the magnetic tape T extends over an angle range of less than 180 ° (θ °) with respect to the cylinder 50. It is wrapped. Head H1 is used for data recording, head H2 is used for data reproduction, and FIG. 3 (B)
As shown in, the head H1 and the head H2 have the same azimuth and rotate on different rotating surfaces by a predetermined distance x in the direction of the rotation axis. If the distance x is recorded only by the head H1 and the length of the track is sufficiently smaller than the recording track pitch, the recording track pitch
Set to 1/2. By this, the trace locus of the head H1 is traced as the head H2 traces.

Further, in FIG. 2, 31 is a cylinder phase detector that detects the rotational phase of the cylinder 50 and outputs a pulse synchronized with this (hereinafter referred to as PG pulse), and 32 is a gate circuit that receives the PG pulse. A timing controller for controlling the gate timing of 33, 34, 36, 37, 35 is an S-ID processing circuit for generating an S-ID to be recorded in a subcode area, which will be described later, and 38 is for restoring information from the reproduced S-ID. S-ID processing circuit,
Reference numeral 40 is an operation unit operated by a user, and 41 is a capstan control circuit for controlling the conveyance of the tape T.

(Outline of Operation) Here, an outline of the operation of the data recorder of the present embodiment will be described.

FIG. 4 is a diagram showing a recording format on the tape T by the data recorder of this embodiment. In the data recorder of this embodiment, first, the S-ID is recorded by the head H1 on the subcode areas a1 and a3 on the tape T shown in FIG. This S-ID includes address data indicating the tape address, and the S-I for the subcode areas a1 and a3 is included.
By recording D, the absolute address of the tape can be defined in the longitudinal direction of the tape T. (Hereinafter, this operation will be referred to as "formatting".) When the main data is recorded on the tape T having been subjected to the formating, the video data as the main data is the S-ID recorded in the subcode areas a1 and a3. After the recording position is set using the address data in the middle, the data is recorded in the main area a2 located between the subcode areas a1 and a3. Here, the tape T at the time of recording the video data
The traveling direction of is the direction shown by arrow Y, and the conveying speed thereof is set to a certain predetermined speed ν ₀ . On the other hand, when the S-ID is recorded in the sub-code area a3, the tape T is conveyed in the same direction as indicated by the arrow Y, and the conveyance speed is set to several times to several tens times (n times) ν _0. It Also, the S-ID is added to the subcode area a1.
The tape T is conveyed in the opposite direction to the direction indicated by the arrow Y when recording is performed, and the conveyance speed is several times to several tens of times v ₀ (m).
Times).

Of course, when reproducing the tape, it goes without saying that the S-ID recorded on the tape T is used to retrieve the data.

FIG. 5 is a diagram for explaining the data recorded by the data recorder of this embodiment, FIG. 5 (a) is the data recorded in the main area a2, and FIG. 5 (b) is the subcode area. The data recorded in a1 and a3 are shown respectively.

In FIG. 5 (a), D-ID _sync is a sync bit for D-ID, D-ID is the above-mentioned D-ID, CRCC is a redundant code by a cyclic code for error detection, and DATA _sync is main data. The sync bit for data, DATA, is the main data, and the data string shown in FIG. 5 (a) constitutes one data block. Several hundred data blocks are recorded in each track on the main area a2. The data amount of one data block is about several bytes for D-ID, DATA
Is set to about several tens of bytes. In addition, the dozens of bytes of DATA include a parity word that is a redundant code for error correction. This parity word is an error correction code (EC) obtained by shuffling data of several data blocks.
C) Formed based on the data matrix for addition, the fifth
It is distributed in DATA in FIG.

Further, S-ID _sync in FIG. 5 (b) is a synchronization bit for S-ID and constitutes one data group together with S-ID and CRCC. This data group is repeatedly recorded several hundred times in each track on the subcode areas a1 and a3.

The details of the operation of the data recorder of this embodiment will be described below.

(Recording Operation in Subcode Area) FIG. 1 is a flow chart for explaining the operation of the system controller 24 when the S-ID is recorded in the subcode areas a1 and a3. Refer to this flow chart below. And explain.

In the operation unit 4 of FIG. 2, when the recording (formatting) of the S-ID in the subcode areas a1 and a3 is instructed, the recorder executes the following formatting operation. First, the system controller 24 puts 0 in the variable T and the variable A (step 301), and then the S-ID processing circuit 35,
The frequency of the master clock that regulates the operation of the modulation circuit 17 etc. is set (step 302). The frequency of this master clock is different from that of the heads H1, H2 and tape T due to the difference between the tape transport speed during main data recording, playback, tape address search, etc., and the tape transport speed during S-ID recording described later. Is set in each mode so that the reproduced clock frequency does not change due to the difference in the relative speed of the. In this embodiment, the rotation speed of the cylinder 50 is constant in any mode, and the master clock frequency is set so as to match the recording wavelength of the master clock on the tape T during main data recording. .

Here, a specific example of the frequency of the master clock will be shown.

When the tape T is normally conveyed at υ ₀ , the inclination φ _{0 of the} recording track with respect to the longitudinal direction of the tape T is set to 4.90 °, and the relative speed between the head and the tape T when the tape T is stopped.
Table 1 shows how the frequency f of the master clock changes with the change in tape speed υ when V ₀ is set to 380.00 (cm / minute). In Table 1, V is tape T and head
The relative velocities of H1 and H2, φ respectively indicate the inclinations of the heads H1 and H2 in the trace direction with respect to the longitudinal direction of the tape T.

Since the S-ID is first recorded in the subcode area a3, the timing controller 32 is used to set the gate timing of the gate circuit 34 to the timing at which the head H1 traces over the area a3, and the other gate circuits 33, 37, 38. For, the gate operation is prohibited (step 303). Then, the capstan control circuit 41 is used to convey the tape T in the direction of the arrow Y at a speed of nυ ₀ (step 304), and the S-ID processing circuit 35 starts the generation of data according to the format shown in FIG. 5 (b). Then, recording of the S-ID starts (step 305).

Here, the variable T is recorded as the track number of the subcode area, and the variable A is recorded as the address data indicating the tape address. For example, suppose that the tape address is changed every 1 second during normal recording.
If the number of revolutions of 50 is 3600 revolutions per minute and n = 10, tape T
The number of tracks recorded in the subcode area a3 during one address It will be a book. Therefore, each time the cylinder 50 makes one revolution (step 306), 1 is added to T (step 307),
When T becomes a multiple of i, that is, when T _mod i becomes 0 (step 308), 1 is added to A. j is a constant set by the recordable time of the tape T. For example, if the tape T is transported from the start end to the end in 30 minutes when it is run at a speed of υ ₀ , j is 1800 or less. Set to the number of. Generally, set it to around 1500 with some margin.

At steps 306 to 310, A and T are counted up,
When A = j is reached (step 310), the capstan control circuit 41 is caused to stop the feeding of the tape T, and the recording of the S-ID is stopped (step 311). Then, the S-ID is recorded in the sub-code area a1 this time. First, as in step 313, the master clock is set according to Table 1 (step 313), and the gate timing of the gate circuit 34 is set to the head H1. Is set to the timing for tracing on the area a1 (step 314). And capstan control circuit 4
Emuupushiron ₀ The tape T in the direction opposite to the arrow Y in FIG. 4 by the 1
The recording medium is conveyed at the speed of (step 315), and the recording of the S-ID is started in the same manner as step 305.

This time, T is counted down every one revolution of the cylinder (step 317) (step 318), and A is counted down every time T _mod i becomes 0 (step 319) (step 320). And until A becomes 0 (step 321) S
After the recording of the -ID, the conveyance of the tape T is stopped, the recording of the S-ID is stopped (step 322), and the operation is ended.

(Search operation) FIG. 6 shows the S-ID recorded in the sub-code area a1 or a3. Further, the address data A is used.
2 is a flow chart showing the operation of the system controller 24 of FIG. 2 when the tape is conveyed (searched) to a desired position, and the search operation will be described below based on this flow chart.

When a search command is issued by the operation unit 40, the system controller 24 causes the timing controller 32 to operate as a gate 37.
The gate timing of the head H2 is set to the timing at which the head H2 traces the area a3.
-Determine the frequency of the master clock of the ID processing circuit 38 (step 401). Next, the capstan is carried out to convey the tape T by υ ₀ in the direction shown by the arrow Y in FIG. 4 (step 402), and the S-ID processing circuit 38 starts the reproduction of the S-ID (step 403).

Now, assuming that the desired tape address set by the operation unit 40 is Ax, it is determined in step 404 whether the address data A reproduced via the S-ID processing circuit 38 is (Ax-1). To be done. When A is not (Ax-1), it is determined in step 405 whether A is larger than (Ax-1).

When A is larger than (Ax-1), the timing controller 32 is set in step 408 to set the gate timing of the gate circuit 37 to the timing at which the head H2 traces the area a1, and the tape for searching the frequency of the master clock is set. Set according to the transport speed (see Table 1). Then, the capstan is carried and the tape is conveyed at a high speed (qυ ₀ ) in the direction opposite to the arrow Y in FIG. 4 (negative direction) (step 409). On the other hand, when A is smaller than (Ax-1), the gate timing of the gate circuit 37 is not changed and the frequency of the master clock is set with reference to FIG. 1 (step 406). Fig. 4 Direction of arrow Y (forward direction)
It is conveyed at high speed (pυ ₀ ) (step 407).

When the tape is traveling at a sufficiently high speed by steps 407 and 409, the head H2 can be traced across the track on the area a3 or the area a1.
The speed (pυ ₀ , qυ ₀ ) will be described later in detail. If the head H2 can cross the track on the area a3 or the area a1, the data group shown in FIG. 5 (b) is recorded repeatedly in each track several hundred times, so that at least one data group The address data A can be obtained via the S-ID processing circuit 38. However, if the angle difference between the trace locus at the time of recording and the trace locus at the time of reproducing becomes large, there is a possibility that one data group of S-ID cannot be completely reproduced. Therefore, in the data recorder of the present embodiment, when the tape is run at high speed in the positive direction as described above, the S-ID is reproduced from the track recorded in the area a3, and the tape is moved in the negative direction. Since the S-ID is reproduced from the track recorded in the area a1 when the vehicle is traveling at high speed, the slope of the head trace locus is relatively close during recording and reproduction, and a data group can be restored sufficiently. -The ID can be reliably reproduced.

During the above-described high-speed search operation, when the reproduced address data A becomes (Ax-1) (step 410), the gate timing of the gate circuit 37 is set to the timing at which the head H2 traces the area a3. The frequency of the master clock is the frequency when the tape T is transported by υ ₀ (step
411), and the tape T is conveyed in the forward direction at a speed υ ₀ (step 412).

Then, the extraction of the S-ID is continued, and when the reproduction address data A matches the desired address Ax (step 413), the feeding of the tape T is stopped, the reproduction of the S-ID is stopped (step 414), and the operation is performed. finish.

As a result, the tape T stops in the state where the head H2 can trace the track having the smallest track number T among the tracks having the tape address Ax. After that, if a main data recording operation or a main data reproducing operation, which will be described later, is performed, it is possible to record and reproduce the main data from the head portion of the desired tape address. In addition, if the structure is provided with a rotation erasing head and the erasing current is supplied only at the timing when the rotation erasing head traces the area a2, the main data at a predetermined tape address can be erased.

Next, the transport speed of the tape T at the time of high speed search will be described with reference to FIG. In FIG. 7, T is a magnetic tape, and line segments P1-Q1, P2-Q2, ..., P11-Q11 shown by broken lines are parallel to the trace direction of the rotating head when the tape T is stopped. It is a straight line segment. The distance between these line segments in the longitudinal direction of the tape corresponds to the length of the tape that moves during the rotation cycle of the rotary head H1 (during the shape cycle of the track) when the tape T moves at the speed υ ₀ . . The length of these line segments corresponds to the distance traveled by the rotary head while the tape T is stopped. Therefore, the points P1, P on the imaginary line E
, ..., P11 and points Q1, Q2, ..., Q11 on the virtual line E ′ are the same point.

Now, since the rotating head traces from the bottom to the top in the figure, when the tape is running in the positive direction at kυ ₀ , the center of the trace path of the head is points PK and P.
It is on the line segment connecting (K−k), and its interval is k times the interval of the broken line. The solid line on the area a2 indicates the center of the trace locus of the rotating head during normal recording and reproduction,
The solid line on the area a1 is the center of the trace locus when the tape transport speed during S-ID recording is set to 4υ ₀ in the negative direction, and the solid line on the area a3 indicates the tape transport speed during S-ID recording in the positive direction by 4υ 0. ₀
The center of the trace locus is shown.

By the way, at the time of high-speed search, the S-ID can be reliably extracted if the center line of one of the tracks on the area a1 and the center of the trace locus of the rotating head always intersect.
This also applies to the tracks on the area a3. That is, in order to reliably extract the S-ID from the track on the area a1, the tape is conveyed at a higher speed in the positive direction than the conveying speed at which the trace locus at the center of the rotating head is the line segment X2-X3, or the center of the rotating head is It suffices to run the tape at a higher speed in the negative direction than the transport speed at which the trace locus of becomes the line segment X1-X4. In order to reliably extract the S-ID from the track on the area a3, the trace locus at the center of the rotary head is the line segment Y2-Y3.
The tape is conveyed at a higher speed in the positive direction than the conveying speed, or the trace locus at the center of the rotating head is the line segment X1-X4.
The tape may be conveyed at a higher speed in the negative direction than the conveying speed at which

4Upushiron ₀ tape transport speed during recording in the negative direction of the region a1 as shown in FIG. _7, the 4Upushiron ₀ tape transport speed in the positive direction during the recording to an area a3, a region a1, a3 rotation head 30 °
If it traverses while rotating, in order to extract the S-ID from the area a1, 44 (= 4 × 360 / 30−
4) υ ₀ or more, 52 (= 4 × 360/30 +) in the negative direction
4) Must be transported at a speed of υ ₀ or higher. Similarly, in order to extract the S-ID from the area a3, it must be conveyed at a speed of 52υ ₀ or more in the positive direction and 48υ ₀ or more in the negative direction. However, in the data recorder of this embodiment, the tape transport direction is set to the negative direction when the area a1 is reproduced and the positive direction is set when the area a3 is reproduced.
υ Must be ₀ or more.

This is generally indicated. Now, assuming that the time required to form one track for recording the S-ID is τ ₁ , the track formation period is τ ₂ , and the tape transport speed during S-ID recording is υ _x ,
The transport speed υ _y at the time of search is (τ
₂ / τ ₁ +1) υ _x or more, and in the opposite direction is (τ ₂ / τ
₁ −1) ν _x or more. However, considering that in general, reproduction can be performed if more than half of the head width hits the track, so the head width is H _w and the track pitch of the areas a1 and a3 is T.
Assuming _p, the conveying speed upsilon _Y during the search for the recording time of the same direction _{(τ 2 / τ 1 +1)} (T p -H w) υ x / T p above, the reverse (tau ₂ / τ ₁ -1) (T _p −H _w ) υ
_x / T _p or more.

In the above embodiment, assuming that the head width H _w is 3/4 of the track pitch of the area a2, the area a1 also has the area a3.
For _{even, υ Y> (360/30} + 1) (4-3 / 4) 4υ 0/4 = 169υ 0 /442.25υ 0 becomes, S in high-speed search do it is transported at normal tape transport speed of 45 times the recording speed -It is possible to regenerate the ID.

(Main Data Recording Operation) Next, the main data recording operation of this embodiment will be described.

Figure 8 shows the system controller when recording data.
24 is a flow chart showing the operation of 24, and the operation at the time of data recording will be described below with reference to the flow chart of FIG.

One field of digital video data output from the A / D converter 12 is written in the field memory 13 according to the operation of an operation member (not shown). Since the bit rate of digital data obtained by digitizing a video signal in real time is extremely high, the field memory 13 outputs video data of one field, that is, still image data at a reduced bit rate. As a result, this one-field video data is recorded over many tracks on the area a2.

In step 101 of FIG. 8, the D-ID is set by the D-ID processing circuit 15. The track to be recorded in this D-ID is one field of video data. It includes track number data indicating the. The recording head H1 reaches the predetermined rotation phase, and the area a2
, The gate 34 starts the gate of the recording signal,
Data for one track is recorded by the head H1 (step 102). This recording is ended when the drum 50 rotates by θ ₂ °, and when the drum 50 further rotates by (180−θ ₂ ) °, the gate circuit 36 starts the gate of the demodulation signal, and the reproduction head H2 is in the main area a2. The beginning of the track just recorded has been reached, and this track is reproduced by the reproduction head H2 (step 103).

The reproduction signal of the reproduction head H2 is input to the demodulator 22 via the recording amplifier 21, and the error detection circuit 23 uses the error correction code output from the demodulator 22 to determine the number of data errors, the generation pattern, etc. To be detected. At this time, step 104
If it is determined that no data error has occurred,
Update part of the ID such as the track number data (step 10
5), PCM data to be recorded next from the field memory 13
The data is loaded into the processor 16 (step 106). Here, if the data to be recorded has been completed, the processing based on this flowchart is completed. If not completed, the flow returns to step 102 (step 107), and the recording of new data in the next track is performed. Do.

On the other hand, when it is determined in step 104 that a data error has occurred, the number of occurrences of the data error is checked in step 108, and the occurrence pattern of the data error is checked in step 109. If it is determined in step 110 that the error can be corrected based on these checks, the process returns to step 102 via steps 105 and 106, and new data is recorded in the next track in the same manner. If it is determined in step 110 that error correction is impossible, the process returns to step 102 without updating the ID and updating the data, and the same data is recorded again in the next track.

In the process according to the flow chart shown in FIG. 8, the processing time from the end of the reproduction of step 103 to the start of the reproduction of step 102 is within the time for the cylinder 50 to rotate by (180-θ ₂ ) °. It goes without saying that it is set.

As described above, when it is determined by the verifiy immediately after recording that the recording data cannot be error-corrected, the same data is repeatedly recorded, and the rotation of the drum 50 and the running of the tape T are stopped. You can record highly reliable data without. Therefore, data recording is performed one after another, and highly reliable data can be recorded in a short time.

(Main Data Reproducing Operation) Next, the operation of the system controller 24 when the main data is reproduced by using the flow chart of FIG. 9 will be described.

Playback by the playback head H2 is started (step 20).
1), it is judged that the data is recorded in step 202.
Then, the presence or absence of a data error is determined based on the output of the error detection circuit 23 (step 203). When no data error occurs, the PCM processor 25 deinterleaves the data and outputs it (step
204), the data is written into the field memory 27 according to the address determined based on the reproduction ID. On the other hand, if a data error has occurred, based on the detection result of the error detection circuit 23, the number of error occurrence check (step 205) and the error occurrence pattern check (step 206),
At step 207, it is determined whether the error can be corrected. If the error can be corrected, the error correction process is performed in step 208, and then the process proceeds to step 204, where the data is output after deinterleaving of the data. On the other hand, if it is determined that the error cannot be corrected, it can be determined that the data recorded as the same data as the reproduced data is recorded in the next track, and step 20 is performed without outputting the data.
Return to 1 and play the next step. It should be noted that after step 201 is completed, cylinder 5
It goes without saying that 0 is set during the period of rotating (360−θ) °.

In the data recorder of the above-described embodiment, the subcode areas on both sides of the video data recording area a2 on the tape T are used.
Since the address data indicating the tape address is recorded in a1 and a3 several hundred times for each track, the address data A can be easily reproduced even if the tape is transported at a high speed. Data can be recorded quickly, and the desired tape address can be easily reached even when the main data is reproduced.

Further, since the tape transport speed at the time of recording the address data in the areas a1 and a3 is set to be higher than that at the time of recording the main data, it is possible to perform the tape formatting in a short time.

Furthermore, since the tape transport direction during S-ID recording is set to the opposite direction in area a1 and area a3, the maximum tape speed at which the data block can be extracted no matter which direction the tape is transported when searching the tape address. Can be further increased. Since the tape formatting can be performed by reciprocating the tape once, the time required for the tape formatting can be shortened.

Further, since the tape transport speed at the time of address search is set so that the S-ID can be reproduced without fail by one rotation of the rotary head, the finest address data can be extracted.

Furthermore, since the frequency of the master clock is adjusted for each tape transport speed, recorded data recorded at any tape transport speed can be reliably reproduced at any tape transport speed.

(Other Embodiments) FIG. 10 is a diagram showing a schematic structure of a data recorder as another embodiment of the present invention, and FIGS. 11 (A) and 11 (B) are head structures of the data recorder of this embodiment and the head structure thereof. FIG. 12 is a diagram for explaining the arrangement, and FIG. 12 is a diagram showing a recording locus on the tape by the data recorder of the present embodiment. Second in Figure 10
The same components as those in the figure are designated by the same reference numerals, and the description thereof will be omitted.

As is apparent from FIG. 12, in this embodiment, the tape T is divided into six areas in the width direction, and the areas CH1 and CH1 at both ends thereof are divided.
CH6 is an area for S-ID recording, and the remaining four areas are main data recording areas.

The head consists of four rotating heads, and recording heads HA and H
B have different azimuth angles and rotate with a phase difference of 180 °. This enables so-called azimuth overwriting in each area for main data. Reproduction head H
A ′ and HB ′ have a 90 ° rotational phase delay with respect to the recording heads HA and HB, respectively, and have been shifted by a distance corresponding to half of the track pitch due to azimuth overwriting (indicated by l in FIG. 11 (B)). Rotate on the surface of rotation. This makes the playback head
HA 'and HB' will trace the tracks formed by the recording heads HA and HB, respectively.

In the area CH1, the S-ID is recorded in the positive direction at a tape transport speed several times that of the main data recording, and in the area CH6, the S-ID is recorded in the negative direction at a tape transport speed several times that of the data recording. Is done.

The PCM processors 16a, 16b, 16c, 16d separately record the data recorded in the areas CH2, CH3, CH4, CH6 when recording the main data, respectively.
Since they are processed at the same time, the processing time can be longer than that in the case where the same processor is used. In addition, the error detection circuit 23a,
23b, 23c, and 23d are heads HA ', HB' in the regions CH2, CH3, CH4, CH
The main data reproduced from 5 is separately processed at the same time. By this, the area in which an error occurs during verification can be defined. Therefore, if the same data is recorded only in the area where the error has occurred, the recording time can be shortened. Similarly, the PCM processors 25a, 25b, 25c, 25d are also for separately processing the data reproduced from the areas CH2, CH3, CH4, CH5 at the same time.

With the configuration of the signal processing system as described above, each region CH2, CH3,
It is possible to record data in CH4 and CH5 at the same time, or record data in only one or more areas. Also,
It is also possible to reproduce data only from a desired area during reproduction.

Signal processing during S-ID recording is performed by PCM processors 16a, 16b, 1
One of 6c and 16d is used, and the signal processing at the time of reproducing the S-ID is similarly performed using one of the PCM processors 25a, 25b, 25c and 25d.

The gate circuit 33 'gates a signal at the timing when the head HA or head HB traces on the area CH1 or area CH6 during S-ID recording, and when the main data is recorded, head HA
Alternatively, the head HB gates the signal at the timing of tracing one or more of the regions CH2 to CH5. Further, the gate circuit 36 'gates a signal at the timing when the head HA' or head HB 'traces the area CH1 or the area CH6 at the time of reproducing the S-ID, that is, at the time of searching, and at the time of reproducing the main data and at the time of verify, the head HA'. ′ Or head H
The signal is gated at the timing when B'traces one or more of the regions CH2-CH5.

Next, considering the tape transport speed during high-speed search according to this embodiment, the areas CH1 and CH6 are traced while the rotary head rotates 36 °. The track formation cycle is a period in which the rotary head rotates 180 °. However, if the azimuth angle is different, data cannot be reproduced, so the cycle for forming a track with the same azimuth angle must be referred to. Therefore, τ ₂ / τ ₁ is 10, and if the tape transport speed during S-ID recording is 4 times that of main data recording (υ ₀ ), it is 44 [= (10 + 1) 4] times or more than during recording. This is necessary when the tape feeding speeds of (1) and (2) are the same. If the head width is 1.5 times that of the main data track pitch and if more than half of the head width hits the track, playback can be performed.
The required tape transport speed is when the tape transport direction is the same.
27.5 [= (10 + 1) (4-1.5) 4/4] υ ₀ or more.

It goes without saying that the same effects as those of the above-described embodiment can be obtained in the data recorder of the above embodiment.

〔The invention's effect〕

As described above, according to the present invention, a rotary head type using a tape-shaped recording medium that enables quick retrieval of recorded data, recording of data at a desired tape address, etc. and easy editing of data. A data recording device is obtained.

[Brief description of drawings]

FIG. 1 is a flow chart for explaining a recording operation in a subcode area of a data recorder of an embodiment of the present invention, and FIG. 2 is a diagram showing a schematic configuration of a data recorder of an embodiment of the present invention. 3 (A) and 3 (B) are views showing the head structure and arrangement of the data recorder of FIG. 2, FIG. 4 is a view showing a recording format on a tape by the data recorder of FIG. 2, and FIG. 2 is a diagram for explaining recorded data by the data recorder, FIG. 6 is a flow chart for explaining the operation of the data recorder of FIG. 2 at the time of address search, and FIG. 7 is a tape transport speed at the time of address search. FIG. 8 is a flow chart for explaining the operation of the data recorder of FIG. 2 during main data recording, and FIG. 9 is an operation of the data recorder of FIG. 2 during reproduction of main data. Theory FIG. 10 shows a schematic structure of a data recorder of another embodiment of the present invention, and FIGS. 11 (A) and 11 (B) show the head structure and arrangement of the data recorder of FIG. FIG. 12 is a diagram showing a recording format on a tape by the data recorder of FIG. In the figure, H1, HA, HB are recording heads, H2, HA ', HB' are reproducing heads, T is a tape, 16, 16a, 16b, 16c, 16d are PCM processors, 24 is a system controller, 25,25a,
25b, 25c, 25d are PCM processors, 31 is a cylinder phase detector, 32 is a timing controller, 33, 34 are gate circuits, 35, 38 are S-ID processing circuits, 36, 37 are gate circuits, 40 Is an operation unit, 41 is a capstan control circuit, DATA
Is main data, S-ID is controller data including address data, a2 is a main area as a first area, and a1 and a3 are subcode areas as a second area.

Claims (1)

[Claims] 1. A tape-shaped recording medium is conveyed in a longitudinal direction thereof at a predetermined first speed and extends in a longitudinal direction of the medium.
The first mode in which the rotary head records data relating to the main information while forming a large number of parallel tracks on the area, and the tape-shaped recording medium has a second speed higher than the first speed in the longitudinal direction. While forming a large number of parallel tracks on the second area extending in the longitudinal direction of the medium in parallel with the first area without carrying out the recording of the main information. A second mode in which address data indicating a tape address is repeated a plurality of times for each track and recorded by a rotary head.