JPH0818866A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPH0818866A
JPH0818866A JP6171569A JP17156994A JPH0818866A JP H0818866 A JPH0818866 A JP H0818866A JP 6171569 A JP6171569 A JP 6171569A JP 17156994 A JP17156994 A JP 17156994A JP H0818866 A JPH0818866 A JP H0818866A
Authority
JP
Japan
Prior art keywords
constant current
transistor
reset
current
control means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6171569A
Other languages
Japanese (ja)
Other versions
JP2897106B2 (en
Inventor
Tomohisa Ishida
知久 石田
Original Assignee
Nikon Corp
株式会社ニコン
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
Application filed by Nikon Corp, 株式会社ニコン filed Critical Nikon Corp
Priority to JP6171569A priority Critical patent/JP2897106B2/en
Publication of JPH0818866A publication Critical patent/JPH0818866A/en
Application granted granted Critical
Publication of JP2897106B2 publication Critical patent/JP2897106B2/en
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=15925581&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH0818866(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

(57) [Summary] [Object] To obtain an amplification type solid-state imaging device capable of reducing power consumption without deteriorating the advantage of the source follower reading method. A current control means for generating a current output having a phase opposite to that of resetting a vertical read line of each pixel is provided. The current control means limits or blocks the supply current to the constant current source for controlling the bias current for reading the source follower during a period other than the reading operation of the reading transistor of each pixel.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device suitable as, for example, an amplification type image sensor.

[0002]

2. Description of the Related Art Conventionally, in an amplification type solid-state image pickup device, a source follower is often used to read out received light charges from each light receiving pixel. FIG. 4 is a schematic circuit diagram showing a schematic configuration of a conventional general amplification type solid-state imaging device in which MOS type static induction transistors are arranged in a matrix and a signal reading method by a source follower is used. As shown in FIG. 4, in a conventional solid-state imaging device, a plurality of MOS static induction transistors (readout transistors (hereinafter, simply referred to as “transistors”, provided with a photoelectric conversion unit 5 that converts light incident on pixels into electric charges (video signals)). "MOS transistor")) T
ji (j = 1 to m, i = 1 to n) are arranged in a matrix.

The source of each MOS transistor T ji is commonly connected to the column line (signal line) LH ai for each column of the matrix arrangement, and the power supply voltage V D is individually applied to the drain. The gates of the respective MOS transistors T ji are commonly connected to the row line LV aj scanned by the vertical scanning circuit 2 for each row of the matrix arrangement, and the driving pulse φG j sent from the vertical scanning circuit 2 causes the gate unit of each row. It is designed to be driven by. The column line L
H ai becomes a signal read line.

On the other hand, the column line LH ai is connected to the signal charge transfer capacitor C ai via the signal charge transfer gate transistor T ai for each column, and the column selection transistor T bi is connected to each column line LH ai. Through video line L
Commonly connected to V. This video line LV
An output amplifier 4 for amplifying a video signal to be sent is connected to the. A horizontal scanning circuit 3 is connected to the gate of each of the column selection transistors T bi , and scanning is performed by a drive pulse φH i sent from the horizontal scanning circuit 3.

On the other hand, the column line LH ai is connected to the drain of the reset transistor T ci and the drain of the source follower reading transistor T di for each column, and the source of each reset transistor T ci is Grounded, and the power supply voltage V SS is supplied to the source of each source follower reading transistor T di .

A reset pulse φRSTV is supplied to the gate of each reset transistor T ci , and when this reset pulse goes high, the reset transistor T ci becomes conductive and the signal line column line LH ai is grounded. Is able to.

A resistor R L and a transistor T L are provided at the gate of the source follower reading transistor T di.
A constant voltage obtained from the power supply voltages V DD and V SS is given by the constant current source 1 having the constant current setting circuit 1a composed of S , whereby each read transistor T flowing in the column line LH ai during the read operation. The source follower bias current of di is set to be a stable constant current.

Next, the operation of the conventional solid-state image pickup device will be described with reference to the timing chart shown in FIG. First, as shown in FIG. 5, in the period t 1 ,
Charge transfer gate control signal φT and reset signal φRST
V is set to the high level to make the signal charge transfer gate transistor T ai and the reset transistor T ci conductive (see FIG. 4). As a result, if the signal charges remain in the column line LH ai and the signal charge storage capacitor C ai , these transistors become conductive and are reset to the ground level. At this time, the voltage of the driving pulse φG j , eg, φG 1 sent from the vertical scanning circuit 2 is at the V G1 level as shown in FIG. 5, and the photoelectrically converted charge Q PH is applied to the gate of the MOS transistor T 1i. Is being accumulated.

Next, in the period t 2 , the reset signal φRSTV is set to the low level to keep the reset transistor T ci in the cutoff state, and the drive pulse φG 1
The MOS transistor T 1i raise the voltage to V G2 level
To the read state. As a result, the source follower operation of the source follower reading transistor T di in the constant current driving state by the constant current source 1 causes an image corresponding to the charge Q PH accumulated in the gate of the MOS transistor T 1i in the accumulation state. Signal is column line LH ai
And a high level gate signal φT
The signal charge transfer transistor T which was in the conductive state at
By making ai conductive, this video signal charge is stored in the signal charge storage capacitor C ai .

The charge amount of the photo-generated charge Q PH stored in the gate of the MOS transistor T 1i is Δ according to the amount of incident light.
Q PH , the gate capacitance of the MOS transistor T 1i is C G , and the gain due to the source follower operation is α (≈1),
The bright-state video signal output to the column line LH ai and the signal charge storage capacitor C ai is larger than the dark-state video signal by α × ΔQ PH / C G ≈ΔV G.

At the end of the period t 2, the reset signal φRSTV is again set to the high level to make the reset transistor T ci conductive, and the charge transfer gate control signal φ is set.
The signal charge transfer transistor T is set to a low level.
By cutting off ai , the column line LH ai is reset to the ground level, and the read video signal charges are held in the signal charge storage capacitor C ai .

Next, in the period t 3 , the voltage of the driving pulse φG 1 is further raised to the level of V G3 to discharge the charge Q PH accumulated in the gate of the MOS transistor T 1i ,
This MOS transistor T 1i is reset.

After the end of the period t 3 , the drive pulse φG 1
Is returned to the V G1 level, whereby the MOS transistor T 1i is again in a state of accumulating the charge Q PH due to light incidence in the gate.

After that, in the period t 4 before the next driving pulse φG 2 is output from the vertical scanning circuit 2, the driving pulse φH i (φH 1 , φ) from the horizontal scanning circuit 3 (see FIG. 4).
H 2 , φH 3, ... φH n ) are sequentially column select transistors T bi
And the video signals held in the signal charge storage capacitors C ai of each column are sequentially read from the video line LV.

The above operation is performed by the MOS transistors T 2i , T
A so-called raster scan is performed by sequentially performing the same process for 3i ... T mi row by row.

In the amplification type solid-state image pickup device which performs the read operation by such a source follower, since the charge is amplified by the source follower amplifier and read, the S / N ratio is high, the linearity of the video signal is good, and the fixed pattern noise ( The variation in V TH (threshold value) between pixels, which is the main cause of FPN, has the advantage that by storing a dark image signal, it can be easily removed by taking a difference from the bright image signal. ing.

[0017]

However, in the above-mentioned conventional solid-state image pickup device, the constant current setting circuit 1a of the constant current source 1 is always operating, so that the constant current setting transistor T S and the source follower are set. There is a problem in that a current flows through the reading transistor T di when the signal is not being read, and the power consumption increases.

Therefore, the temperature of the image sensor chip rises and the dark current (noise) of the pixel increases,
There has been a problem that the performance of the device (for example, S / N ratio) is lowered.

This is a serious problem in an image sensor in which the number of pixels is increased in order to obtain high resolution, because the total current value is particularly large.

The present invention has been made in view of the above problems, and it is possible to reduce power consumption in an amplification type solid-state imaging device without impairing various advantages realized by the source follower reading method. The main purpose is to obtain a solid-state imaging device that can be used.

Another object of the present invention is to obtain a solid-state image pickup device having a small dark current of pixels and a high S / N ratio.

[0022]

In order to achieve the above-mentioned object, a solid-state image pickup device according to a first aspect of the present invention includes a plurality of photoelectric conversion units arranged on a semiconductor substrate and the plurality of photoelectric conversion units. A plurality of read transistors for reading the electric charges photoelectrically converted in the respective sections to the signal lines,
In a solid-state imaging device including a constant current source for controlling a current flowing through the signal line during a read operation of the read transistor, a current that limits a current flowing through the constant current source other than during a read operation of the read transistor. It is characterized in that a control means is provided.

Further, in the solid-state image pickup device according to the invention described in claim 2, in the solid-state image pickup device according to claim 1,
The current control means further includes reset control means for resetting the signal line to the ground state except when the read operation of the read transistor is performed, and the current control means includes the constant current source when the signal line is in the reset state by the reset control means. It is characterized by including a circuit means for cutting off a current supplied to the device.

Further, in the solid-state imaging device according to the invention described in claim 3, in the solid-state imaging device according to claim 2,
The reset control means includes a switching circuit that receives a reset signal that changes in a pulse shape and performs a switching operation to set the signal line to a ground state and reset when the current is conductive, and the current control means includes a switching circuit in which the switching circuit is conductive. The phase inversion circuit means for receiving the reset signal so as to cut off the current supplied to the constant current source and outputting a pulsed current output having an opposite phase as the current supplied to the constant current source. To do.

[0025]

The solid-state image pickup device according to the first aspect of the invention is
A plurality of photoelectric conversion units, a plurality of read transistors,
It is composed of a constant current source and a current control means. The plurality of photoelectric conversion units are arranged on a semiconductor substrate, and
The plurality of read transistors read the charges photoelectrically converted by the plurality of photoelectric conversion units into the signal lines, respectively. Further, the constant current source controls a current flowing through the signal line during a read operation of the read transistor. Then, the current control unit limits the current flowing through the constant current source except when the read operation of the read transistor is performed.

That is, the plurality of photoelectric conversion units arranged on the semiconductor substrate convert the light incident on the photoelectric conversion units into electric charges. This charge is read out to the signal line by the read operation of the read transistor, and the signal current flowing in the signal line at this time is in a state controlled by the constant current source.

Here, in the solid-state image pickup device according to the present invention, the current flowing in the constant current source is limited by the current control means except during the read operation of the read transistor, that is, when the read operation is not performed. , Ultimately cut off.

That is, in the conventional solid-state image pickup device, the current always flows through the constant current source for controlling the read current of the signal line regardless of whether the read transistor is operating or not, and therefore the power consumption is reduced. However, since the solid-state imaging device according to the present invention includes the current control unit, it is possible to reduce power consumption. Further, as a result, it is possible to reduce the dark current of the pixel and increase the S / N ratio.

According to a second aspect of the present invention, there is provided a solid-state image pickup device according to the first aspect, further comprising reset control means, and the current control means further includes circuit means for cutting off current. Is provided.

The reset control means resets the signal line to the ground state except during the read operation of the read transistor. The circuit means shuts off the current supplied to the constant current setting circuit of the constant current source when the signal line is in the reset state by the reset control means.

That is, in each read operation by the read transistor, after the charge accumulated in the photoelectric conversion unit is read out to the signal line and then output through the charge transfer gate, the next image pickup light-receiving charge The residual charge is discharged from the signal line in preparation for the accumulation state and its reading, and the reset control means is provided for performing this discharging operation. The reset control means conducts the signal line to the ground line, for example, and discharges all the charges remaining on the signal line to the ground line.

That is, during the read operation of the read transistor, the reset control means keeps the signal line in the read operation state, and when the read operation of the read transistor is completed and the signal charge is transferred to the output side. The reset control means conducts the signal line to the ground line and discharges the residual charge on the source region of each read transistor and the signal line to the ground line.

At this time, since the current control of the signal line by the constant current source is unnecessary, the circuit means synchronizes with the reset current of the signal line by the reset control means and the constant current setting circuit of the constant current source. Cut off the supply current to the.

As described above, in the solid-state image pickup device according to the present invention, the supply current to the constant current setting circuit of the constant current source is cut off except when the read operation of the read transistor is performed, so that the power consumption is reduced. It will be possible. Further, as a result, the dark current of the pixel is reduced and the S / N ratio is reduced.
It is also possible to raise the ratio.

According to a third aspect of the present invention, in the solid-state image pickup device according to the second aspect, the reset control means includes a switching circuit, and the current control means includes a phase inversion circuit means. .

The switching circuit performs a switching operation upon receiving a reset signal that changes in a pulse shape, and when the switching circuit is in a conducting state, resets the signal line to the ground state. The phase inversion circuit means receives the reset signal and outputs a pulsed current output having a phase opposite to that of the reset means as a supply current to the constant current setting circuit of the constant current source, whereby the switching circuit is When conducting, the current output, that is, the current supplied to the constant current setting circuit of the constant current source is cut off.

For example, a reset signal which changes in a pulse shape between a high level and a low level is applied to the switching circuit, and when the reset signal is at the high level, the switching circuit is turned on so that the signal line is grounded. If so, the phase inversion circuit means that has received the reset signal produces a current output only when the reset signal is at a low level, and does not produce a current output when the reset signal is at a high level.

That is, in this case, when the reset signal is at the high level, it means that the read operation by the read transistor is not performed. At this time, the current output of the phase inversion circuit means is cut off, so that the above-mentioned constant value is set. No current flows in the constant current setting circuit of the current source, which avoids unnecessary power consumption.

As described above, in the present invention, a current output that turns on / off in a phase opposite to the reading operation of the reading transistor by using the reset signal is applied as a supply current to the constant current setting circuit of the constant current source. It is possible,
It is possible to reduce power consumption without wasting power. Further, as a result, it is possible to reduce the dark current of the pixel and increase the S / N ratio.

In this case, when the reset signal is at the low level, it means that the read operation is performed by the read transistor, and at this time, the current output generated from the phase inversion circuit means is the constant current of the constant current source. Therefore, the signal current supplied to the setting circuit and flowing through the signal line during the read operation is bias-controlled by the stable current from the constant current source.

[0041]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a schematic circuit diagram showing a schematic configuration of a solid-state image pickup device according to an embodiment of the present invention in which a MOS type electrostatic induction transistor is arranged in a matrix and a signal read system by a source follower is used. Is. The difference from the conventional solid-state imaging device is an inverter circuit (current control means) 11 as a current control means for controlling the current flowing through the constant current source 1 except during the read operation of the read transistor T ji.
Is provided. The same parts as those in the conventional example are designated by the same reference numerals and the description thereof will be omitted.

As shown in FIG. 1, the inverter circuit 11 receives the reset signal φRSTV and produces a current output having a phase opposite to that of the reset signal φRSTV, and the output of the inverter 11 is the constant current setting circuit 1.
It is connected to the power feeding end ra of the load resistance R L of a . still,
Although the inverter circuit 11 is shown as an internal circuit of the constant current source 1, it is not limited to this.

FIG. 2 is a circuit diagram showing the configuration in the vicinity of the constant current source 1. As shown in FIG. 2, in the solid-state image pickup device according to the present embodiment, the inverter circuit 11 is a complementary MOS transistor. This is a phase inversion circuit mainly composed of T W1 and T W2 . In this case, reset signal φRST
The high level and low level of V are set so as to substantially match the positive power supply voltage V DD and the negative power supply voltage V SS of the inverter circuit 11, respectively.

Next, the operation of the constant current source 1 of the solid-state image pickup device according to this embodiment configured as described above will be described. The drive timing of each part in this embodiment is the same drive timing as in FIG. 5 described in the conventional example.

First, in a period other than the period t 2 shown in FIG. 5, for example, the periods t 1 , t 3 , and t 4 , the reset signal φRST is set.
V is at a high level (= V DD ). Therefore, in the other period t 2, the transistor T W1 in the inverter circuit 11 are cut off, also the transistor T W2 which becomes conductive, the voltage of the power supply terminal r a of the constant current setting circuit 1a V SS, and the constant Both the current setting circuit 1a and the source follower reading transistor T di are cut off. As a result, the current flowing through the constant current source 1 is cut off during the period other than the period t 2 .

Further, only in the period t 2 shown in FIG.
The reset signal φRSTV becomes low level (= V SS ) and, therefore, during this period t 2 , the transistor T W1 in the inverter circuit 11 is in the conducting state and the transistor T W2 is in the shut-off state, so that the constant current setting circuit. the potential of the power feeding end r a of 1a becomes V DD. Thus given a constant current setting circuit 1a which is in the powered state is a constant voltage to the gate of the transistor T di for a source follower read bias current of the source follower operation of the transistor T di for a source follower read are set to a constant value.

As a result, when the drive pulse φG j from the vertical scanning circuit 2 in the period t 2 becomes the read voltage V G2 , the source follower read transistor T di is charged with the charge Q PH under the stable controlled bias current. To the column line LH ai , and further the video signal charges are stored in the signal charge storage capacitor C ai via the signal charge transfer transistor T ai (because φT is at a high level, it is conductive). It

As described above, in this embodiment, the inverter circuit 11 causes the current to flow through the constant current setting circuit 1a only when the read transistor T ji performs the read operation, so that the power is wasted. Power consumption can be reduced. Further, as a result, the dark current of the pixel can be reduced and the S / N ratio can be increased.

In the present embodiment, the inverter circuit 11 is composed of complementary MOS transistors T W1 and T W2 . However, this is generally the case when the peripheral circuit built in this type of solid-state image pickup device. , Complementary M from the perspective of low power consumption
This is because it is composed of OS transistors,
As long as it supplies a pulse-like current output obtained by inverting the phase of the reset signal φRSTV the feeding end r a of the constant current setting circuits 1a, but is not limited thereto.

FIG. 3A is a circuit diagram showing a modification of the constant current setting circuit in the solid-state image pickup device according to the present invention.
The constant current setting circuit 1b according to this modification is different from the constant current setting circuit 1a shown in FIG. 2 in that the load resistance R L provided in the constant current setting circuit 1a is replaced by the PMOS transistor T of the inverter circuit 11. It is the point that W1 is also used.

In the solid-state image pickup device according to this modification,
The operation when the reset signal φRSTV becomes the high level (the voltage is V DD ) is the same as in the case of FIG. on the other hand,
When the reset signal φRSTV becomes low level (voltage is V SS ), the PMOS transistor T W1 in the inverter circuit 11 becomes conductive, the NMOS transistor T W2 becomes cut off, and the PMOS transistor T W1 and the current The set NMOS transistor T S is in a serial operation state. As a result, the constant current setting circuit 1b applies a constant voltage to the gate of the source follower reading transistor T di , and stably controls the source follower bias current by the transistor T di to a set value.

As described above, when the load resistance R L is also used as the PMOS transistor T W1 of the inverter circuit 11, a resistance element for the load resistance R L is not required, so that a configuration suitable for high integration can be obtained. it can.

FIG. 3B is a circuit diagram showing another modification of the constant current setting circuit in the solid-state image pickup device according to the present invention. In this example, the difference from FIG. 2 and FIG. 3A is that the constant current setting circuit 1c that is not easily affected by the fluctuation of the power supply voltage is used. In this constant current setting circuit 1c, the terminal voltage of the load resistance R L is set to the PMOS transistor T
Feedback control is performed by L1 and T L2 so that a stable constant voltage is supplied to the constant current control transistor T S.

In the modification shown in FIG. 3B, the source follower bias current at the time of reading by the source follower reading transistor T di is the constant current setting circuit 1c.
The source follower read operation having a higher stability can be performed depending on the thresholds of the PMOS transistors T L1 and T L2 and the resistance R L , and as a result, the S / N ratio can be improved.

Although the MOS type static induction transistor (MOSSIT) is used as the pixel of the device in the above-mentioned embodiment, the present invention is not limited to this, and functions as a pixel of the amplification type solid-state image pickup device. A pixel having only an element structure, for example, a transistor such as a bipolar phototransistor or a junction field effect transistor, or a pixel having a composite structure of a photodiode and a reading transistor may be used.

Further, in the above-described embodiment, only the solid-state image pickup device in which the pixels of the device are two-dimensionally arranged has been described, but it is stated that the present invention can be applied to the solid-state image pickup device in which the pixels are one-dimensionally arranged. There is no end.

Further, in the above-mentioned embodiment and each modification, the case where the current supplied to the constant current source is interrupted by the inverter circuit 11 when the signal line is in the reset state has been described.
The present invention is not limited to this, and it is easy for those skilled in the art to realize the present invention by means of a current control means for reducing the value of the current supplied to the constant current source. Naturally, it is included in the technical category of the present invention.

[0058]

As described above, according to the present invention, in the amplification type solid-state image pickup device, the current flowing through the constant current source other than during the read operation of the read transistor is not impaired without losing various advantages realized by the source follower read method. Since the current control means for limiting the power consumption is provided, there is an effect that power consumption can be reduced even in a high resolution multi-pixel image sensor.

Further, according to the present invention, since the rise of the chip temperature can be suppressed by reducing the power consumption, there is also an effect that a solid-state image pickup device having a small dark current and a high S / N ratio can be obtained. .

[Brief description of drawings]

FIG. 1 is a schematic circuit diagram showing a schematic configuration of a solid-state imaging device using a MOS static induction transistor according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration in the vicinity of a constant current source of the solid-state imaging device according to the embodiment shown in FIG.

FIG. 3A is a circuit diagram showing a modified example of the constant current setting circuit in the solid-state imaging device according to the present invention. (B)
FIG. 9 is a circuit diagram showing another modification of the constant current setting circuit in the solid-state imaging device according to the present invention.

FIG. 4 is a schematic circuit diagram showing a schematic configuration of a conventional solid-state imaging device using a general MOS static induction transistor.

FIG. 5 is a waveform diagram showing drive timing for explaining the operation of the solid-state imaging device according to the related art and the embodiment of the present invention.

[Explanation of symbols]

1: constant current sources 1a, 1b, 1c: constant current setting circuit r a: feeding end 2: a vertical scanning circuit 3: a horizontal scanning circuit 4: Output amplifier 5: photoelectric conversion unit 11: an inverter circuit (current control means) FaiRSTV: Reset signal (reset control means) φT: charge transfer gate control signal T ji : MOS type electrostatic induction transistor (read transistor) T ai : signal charge transfer gate transistor T bi : column selection transistor T ci : reset transistor (switching) Circuit) T di : Source follower readout transistor C ai : Signal charge storage capacitor LV: Video line LV aj : Row line LH ai : Column line (signal line) RL : Load resistance T S : Constant current setting transistor

Claims (3)

[Claims]
1. A plurality of photoelectric conversion units arranged on a semiconductor substrate, a plurality of read transistors for reading the charges photoelectrically converted by the plurality of photoelectric conversion units into respective signal lines, and a plurality of read transistors. A solid-state imaging device including a constant current source for controlling a current flowing through the signal line during a read operation, comprising current control means for limiting a current flowing through the constant current source except during a read operation of the read transistor. A solid-state imaging device characterized by the above.
2. The device further comprises reset control means for resetting the signal line to a grounded state except during a read operation of the read transistor, wherein the current control means has the signal line reset by the reset control means. The solid-state imaging device according to claim 1, further comprising circuit means for cutting off a current supplied to the constant current source at times.
3. The reset control means includes a switching circuit that receives a reset signal that changes in a pulse form and performs a switching operation to reset the signal line to a ground state when conducting, and the current control means includes: Phase switching circuit means for receiving the reset signal so as to cut off the current supplied to the constant current source when the switching circuit is conducting and outputting a pulsed current output of opposite phase as the current supplied to the constant current source. The solid-state imaging device according to claim 2, wherein
JP6171569A 1994-07-01 1994-07-01 Solid-state imaging device Expired - Lifetime JP2897106B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6171569A JP2897106B2 (en) 1994-07-01 1994-07-01 Solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6171569A JP2897106B2 (en) 1994-07-01 1994-07-01 Solid-state imaging device

Publications (2)

Publication Number Publication Date
JPH0818866A true JPH0818866A (en) 1996-01-19
JP2897106B2 JP2897106B2 (en) 1999-05-31

Family

ID=15925581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6171569A Expired - Lifetime JP2897106B2 (en) 1994-07-01 1994-07-01 Solid-state imaging device

Country Status (1)

Country Link
JP (1) JP2897106B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000014960A1 (en) * 1998-09-09 2000-03-16 Hamamatsu Photonics K.K. Solid-state camera
US6903771B2 (en) 2000-03-02 2005-06-07 Canon Kabushiki Kaisha Image pickup apparatus
JP2006270931A (en) * 2005-02-28 2006-10-05 Matsushita Electric Ind Co Ltd Solid-state imaging device and its drive method, and camera
JP2008278460A (en) * 2008-02-07 2008-11-13 Canon Inc Solid-state imaging device and imaging system
JP2008278461A (en) * 2008-02-07 2008-11-13 Canon Inc Solid-state imaging device and imaging system
JP2009044486A (en) * 2007-08-09 2009-02-26 Nikon Corp Solid-state imaging apparatus, and electronic camera
JP2009171210A (en) * 2008-01-16 2009-07-30 Nikon Corp Solid-state imaging apparatus, and electronic camera
US7884870B2 (en) 2007-04-11 2011-02-08 Canon Kabushiki Kaisha Photoelectric conversion apparatus with current limiting units to limit excessive current to signal lines

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000014960A1 (en) * 1998-09-09 2000-03-16 Hamamatsu Photonics K.K. Solid-state camera
US6498332B2 (en) 1998-09-09 2002-12-24 Hamamatsu Photonics K.K. Solid-state image sensing device
US6903771B2 (en) 2000-03-02 2005-06-07 Canon Kabushiki Kaisha Image pickup apparatus
JP2006270931A (en) * 2005-02-28 2006-10-05 Matsushita Electric Ind Co Ltd Solid-state imaging device and its drive method, and camera
JP4634318B2 (en) * 2005-02-28 2011-02-23 パナソニック株式会社 Solid-state imaging device, driving method thereof, and camera
US7884870B2 (en) 2007-04-11 2011-02-08 Canon Kabushiki Kaisha Photoelectric conversion apparatus with current limiting units to limit excessive current to signal lines
JP2009044486A (en) * 2007-08-09 2009-02-26 Nikon Corp Solid-state imaging apparatus, and electronic camera
JP2009171210A (en) * 2008-01-16 2009-07-30 Nikon Corp Solid-state imaging apparatus, and electronic camera
JP2008278461A (en) * 2008-02-07 2008-11-13 Canon Inc Solid-state imaging device and imaging system
JP4551935B2 (en) * 2008-02-07 2010-09-29 キヤノン株式会社 Solid-state imaging device and imaging system
JP2008278460A (en) * 2008-02-07 2008-11-13 Canon Inc Solid-state imaging device and imaging system

Also Published As

Publication number Publication date
JP2897106B2 (en) 1999-05-31

Similar Documents

Publication Publication Date Title
US9055211B2 (en) Image pickup apparatus
US8823849B2 (en) Photoelectric conversion device and image capturing device having circuit for reducing offset generated by amplifiers
US8736734B2 (en) Driving method of solid-state imaging apparatus and solid-state imaging apparatus
US5900623A (en) Active pixel sensor using CMOS technology with reverse biased photodiodes
US6456326B2 (en) Single chip camera device having double sampling operation
EP2378763B1 (en) Semiconductor device, and control method and device for driving unit component of semiconductor device
US5955753A (en) Solid-state image pickup apparatus and image pickup apparatus
CA1162280A (en) Solid state image pickup device
US5923794A (en) Current-mediated active-pixel image sensing device with current reset
US7369166B2 (en) Single substrate camera device with CMOS image sensor
JP3734717B2 (en) Image sensor
USRE39768E1 (en) VCC pump for CMOS imagers
US7030921B2 (en) Solid-state image-sensing device
US5708263A (en) Photodetector array
US5717458A (en) Solid-state imager having capacitors connected to vertical signal lines and a charge detection circuit
US7277130B2 (en) Image pick-up device and camera system comprising an image pick-up device
US5060042A (en) Photoelectric conversion apparatus with reresh voltage
KR100712950B1 (en) Amplifying solid-state imaging device
EP0400985B1 (en) Photoelectric converting apparatus
KR100552946B1 (en) Extended dynamic range image sensor system
JP2965777B2 (en) Solid-state imaging device
US7545425B2 (en) Solid-state image pickup device and camera system
US6697111B1 (en) Compact low-noise active pixel sensor with progressive row reset
DE102014218431A1 (en) Semiconductor imaging device and imaging system
DE19832791B4 (en) Active pixel sensor with a pronounced integration mode

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990202

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110312

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110312

Year of fee payment: 12

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term