JPH08172094A - Electronic component - Google Patents

Electronic component

Info

Publication number
JPH08172094A
JPH08172094A JP31659294A JP31659294A JPH08172094A JP H08172094 A JPH08172094 A JP H08172094A JP 31659294 A JP31659294 A JP 31659294A JP 31659294 A JP31659294 A JP 31659294A JP H08172094 A JPH08172094 A JP H08172094A
Authority
JP
Japan
Prior art keywords
film
mounting
electrode
tab
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31659294A
Other languages
Japanese (ja)
Inventor
Yoshiko Mino
美子 美濃
Ikunori Kobayashi
郁典 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP31659294A priority Critical patent/JPH08172094A/en
Publication of JPH08172094A publication Critical patent/JPH08172094A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Abstract

PURPOSE: To contrive to improve the reliability of an electronic component and the mounting yield of the component by a method wherein an anisotropic film and an organic thin film consisting of the same content as that of the constituent material excluding the conductive material of a conductive bonding material, which is formed in such a way that the conductive bonding material is pressure-bonded to an electrode material, on a TAB side and is constituted integrally with the electrode material are arranged on a mounting electrode surface with an exposed Al material. CONSTITUTION: In order to hold a clean mounting electrode surface in a thin film transistor (TFT) array completed with an insulating film 4 opened, an organic thin film consisting of the same component as that of the constituent material excluding the conductive material of a conductive bonding material, which is formed in such a way that the conductive bonding material is pressure-bonded to an electrode material on a TAB side and is constituted integrally with the electrode material, is arranged on the mounting electrode surface with an exposed Al material and is used as a contamination preventive film 9b for preventing contamination from the outside air. A mounting of a TAB system is conducted via the film 9b. Moreover, in order to hold the clean mounting electrode surface in the TFT array completed with the film 4, an anisotropic film consisting of conductive particles protected with a resin or resin capsules is arranged on the mounting electrode surface with the exposed Al material and is used as a contamination preventive film for preventing contamination from the outside air.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品の実装電極保
護構成に関するものである。さらに詳しくは、Alもし
くはAl合金で成る行/列の電極配線が直接外部へ引き
出された実装電極材の表面が有機膜で保護された構成の
電子部品である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting electrode protection structure for electronic parts. More specifically, it is an electronic component having a structure in which the surface of a mounting electrode material in which row / column electrode wiring made of Al or Al alloy is directly drawn to the outside is protected by an organic film.

【0002】[0002]

【従来の技術】近年薄膜トランジスタ(TFT)におい
て、工程簡略や実装抵抗の軽減等からゲート配線やソー
ス配線を直接実装部へ引き出すアレイ構成が用いられて
いる。
2. Description of the Related Art In recent years, in thin film transistors (TFTs), an array structure has been used in which gate wiring and source wiring are directly drawn to a mounting portion in order to simplify the process and reduce mounting resistance.

【0003】そこで、TFTアレイのゲート配線および
ソース配線と各実装電極の概略相関を図3に示す。透明
基板1上にゲート配線2とソース配線3が絶縁膜4を介
して交差形成されている。(図3a)TFTを配した表
示領域A、B、C、D(図3a)は液晶層を介し、対向
基板5を配して液晶パネルと化す。前記ゲート配線2お
よびソース配線3の各延長部には実装電極2a、3aが
設けられており、前記実装電極上の絶縁膜4は開口除去
されている(図3b)。
Therefore, FIG. 3 shows a schematic correlation between the gate wiring and source wiring of the TFT array and each mounting electrode. Gate wirings 2 and source wirings 3 are formed on the transparent substrate 1 so as to intersect with each other with an insulating film 4 interposed therebetween. (FIG. 3a) The display regions A, B, C and D (FIG. 3a) in which the TFTs are arranged are made into a liquid crystal panel by arranging the counter substrate 5 through the liquid crystal layer. Mounting electrodes 2a and 3a are provided on the respective extension portions of the gate wiring 2 and the source wiring 3, and the insulating film 4 on the mounting electrodes is opened and removed (FIG. 3b).

【0004】次に前記実装電極部にTAB実装を施した
従来のメタル構成を図4、5を用いて以下に説明する。
図4aは実装電極2a、3a上にTAB材を実装した平
面図であり、一方図4bは図4中A−A’部の断面構成
を示したものである。
Next, a conventional metal structure in which the mounting electrode portion is TAB mounted will be described below with reference to FIGS.
FIG. 4a is a plan view in which a TAB material is mounted on the mounting electrodes 2a and 3a, while FIG. 4b shows a cross-sectional structure of the AA ′ portion in FIG.

【0005】透明基板1の上にはTFTアレイ実装電極
2a(もしくは3a)として、ゲート配線材(もしくは
ソース配線材)である例えばAlやAl合金が形成され
ている。各実装電極部は駆動用ICとのコンタクトを得
るために絶縁膜4が開口され形成されている。
A gate wiring material (or source wiring material) such as Al or Al alloy is formed on the transparent substrate 1 as the TFT array mounting electrode 2a (or 3a). Each mounting electrode portion is formed with an insulating film 4 opened to obtain contact with the driving IC.

【0006】一方TAB材はポリイミドフィルム6にT
AB電極7として例えば配線材にAuやSnメッキが施
された状態で配置されている。そして、導電粒子8とし
て例えば樹脂ボールにNiやAuメッキされたものやN
i粒子を含有した導電接着材9を介し、TFTアレイ基
板の実装電極部と接合されている。前記導電接着材9に
前記導電粒子8を含有させ異方膜10として、一般に前
記ポリイミドフィルム上のTAB電極7上に載置一体化
されている。
On the other hand, the TAB material is T on the polyimide film 6.
As the AB electrode 7, for example, the wiring material is arranged in a state of being plated with Au or Sn. Then, as the conductive particles 8, for example, resin balls plated with Ni or Au or N
It is bonded to the mounting electrode portion of the TFT array substrate via the conductive adhesive material 9 containing i particles. The conductive particles 8 are contained in the conductive adhesive 9 to form an anisotropic film 10, which is generally placed and integrated on the TAB electrode 7 on the polyimide film.

【0007】そして、露出したアレイ電極2aを保護す
べく保護材11が塗布形成されている。この様にしてT
FT実装パネルが完成する(図4b)。
A protective material 11 is applied and formed to protect the exposed array electrode 2a. In this way T
The FT mounting panel is completed (Fig. 4b).

【0008】しかしながらTFTアレイ完成後もしくは
液晶パネル化後の放置環境および放置時間によっては前
記実装電極部2a、3aの表面の汚染等による膜質変化
が懸念される。(図5a)膜質変化部12の生じたTF
TパネルにTAB実装を施した場合、前記膜質が絶縁膜
の時にはコンタクト不良となり、汚染物付着の時には電
極腐食となってしまう(図5b)。
However, the film quality may change due to contamination of the surfaces of the mounting electrode portions 2a and 3a depending on the standing environment and the standing time after the completion of the TFT array or after forming the liquid crystal panel. (FIG. 5 a) TF generated in the film quality change portion 12
When TAB mounting is performed on the T panel, contact failure occurs when the film quality is an insulating film and electrode corrosion occurs when contaminants adhere (FIG. 5b).

【0009】なお、ゲートやソース電極材としては前記
Al、Al化合物の他にMo、Ta、MoTa、Cr、
Tiを用い、単層膜や積層膜、またそれらを組合せる場
合もある。そして、メタルによっては前記同様コンタク
ト不良やメタル腐食が懸念される。
The gate and source electrode materials include Mo, Ta, MoTa, Cr, in addition to Al and Al compounds described above.
There are also cases where Ti is used and a single layer film, a laminated film, or a combination thereof. Depending on the metal, there is a concern that contact failure or metal corrosion may occur as described above.

【0010】[0010]

【発明が解決しようとする課題】前記TFTアレイは、
上述のように実装電極がAlもしくはAl合金で成る行
/列の電極配線が直接外部へ引き出された構成となって
いることから、TAB実装を施さない状態で長期間放置
すると実装電極部のAl電極材が腐食したり自然酸化絶
縁膜が形成されて変質し、実装接続不良を引き起こし
て、信頼性および実装歩留まりの低下を生じる。
The TFT array is
As described above, the mounting electrodes are made of Al or an Al alloy and the row / column electrode wiring is directly extended to the outside. Therefore, if the TAB mounting is not performed for a long time, the Al of the mounting electrodes is The electrode material is corroded or a natural oxide insulating film is formed and deteriorated, causing mounting connection failure, resulting in reduction in reliability and mounting yield.

【0011】[0011]

【課題を解決するための手段】TAB側の電極材に圧着
一体化されて成る異方膜の、導電材を除く構成材料と同
成分で成る有機薄膜をAl材が露出した実装電極面に配
し、外気からの汚染防止膜とする。そして、TAB実装
は前記汚染防止膜を介して行う。
[MEANS FOR SOLVING THE PROBLEMS] An anisotropic thin film formed by pressure-bonding integrally with an electrode material on the TAB side is provided on the mounting electrode surface where the Al material is exposed, the organic thin film having the same composition as the constituent material except the conductive material. However, it is used as a pollution prevention film from the outside air. Then, the TAB mounting is performed through the pollution prevention film.

【0012】[0012]

【作用】AlもしくはAl合金で成る実装電極の表面を
有機薄膜で覆うことで外気からの汚染物から保護し、清
浄なTFTアレイの状態を保持する。そしてTAB実装
工程では前記有機薄膜はTAB実装時の導電接着材と同
成分であることから、有機薄膜を介して熱圧着する事で
溶融一体化させる。有機膜とは硬度の異なる導電材粒子
は有機薄膜を貫通しコンタクトを得る。
By covering the surface of the mounting electrode made of Al or Al alloy with an organic thin film, the surface of the mounting electrode is protected from contaminants from the outside air and a clean state of the TFT array is maintained. In the TAB mounting step, since the organic thin film has the same composition as the conductive adhesive material used when mounting the TAB, the organic thin film is melted and integrated by thermocompression bonding through the organic thin film. The conductive material particles having a hardness different from that of the organic film penetrates the organic thin film to obtain a contact.

【0013】[0013]

【実施例】本発明の第1の実施例を図1を用いて以下に
述べる。絶縁膜4が開口され完成したTFTアレイは清
浄な実装電極面を保持するために、TAB側の電極材に
圧着一体化されて成る導電接着材9の構成材料と同成分
の有機薄膜をAl材が露出した実装電極面に配し外気か
らの汚染防止膜9bとする(図1a)。
EXAMPLE A first example of the present invention will be described below with reference to FIG. The completed TFT array in which the insulating film 4 is opened has an organic thin film of the same component as the constituent material of the conductive adhesive 9 which is press-bonded integrally with the electrode material on the TAB side in order to hold a clean mounting electrode surface. It is arranged on the surface of the mounting electrode where is exposed, and is used as a pollution prevention film 9b from the outside air (FIG. 1a).

【0014】そして、TAB実装は前記汚染防止膜9b
を介して従来通り施す。異方膜10中の導電粒子8は前
記汚染防止膜9bを貫通してコンタクト材と化す。前記
汚染防止膜9bは異方膜10中の導電接着材9と同成分
であるため熱圧着する事で溶融一体化となる(図1
b)。
The TAB mounting is carried out by the pollution prevention film 9b.
Apply as usual via. The conductive particles 8 in the anisotropic film 10 penetrate the contamination preventing film 9b and become a contact material. Since the pollution prevention film 9b has the same composition as the conductive adhesive 9 in the anisotropic film 10, it is melted and integrated by thermocompression bonding (FIG. 1).
b).

【0015】次に第2の実施例を図2を用いて以下に述
べる。絶縁膜4が開口され完成したTFTアレイは清浄
な実装電極面を保持するために、前記導電性粒子8が樹
脂13aもしくは樹脂カプセル13bで保護されて成る
異方膜10bをAl材が露出した実装電極面に配し、外
気からの汚染防止膜とする。前記導電粒子8は樹脂で覆
われているため絶縁性有し、長期間大気放置されても汚
染防止膜として有効となる。そして、前記異方膜10b
上にTAB材であるTAB電極7を載置し加熱、圧着し
てTAB実装化する。前記圧着によって前記導電粒子8
を覆う樹脂13が溶融移動もしくは破壊によって、導電
粒子8はTAB電極7と実装電極2a間でコンタクト材
と化す。
Next, a second embodiment will be described below with reference to FIG. The completed TFT array in which the insulating film 4 is opened mounts the anisotropic film 10b in which the conductive particles 8 are protected by the resin 13a or the resin capsule 13b in order to hold the clean mounting electrode surface, and the Al material is exposed. It is placed on the electrode surface and used as a pollution prevention film from the outside air. Since the conductive particles 8 are covered with resin, they have an insulating property and are effective as a pollution prevention film even when left in the air for a long time. Then, the anisotropic film 10b
The TAB electrode 7, which is a TAB material, is placed on top of the TAB electrode, and the TAB electrode 7 is heated and pressure-bonded to implement TAB. The conductive particles 8 by the pressure bonding
The conductive particles 8 are converted into a contact material between the TAB electrode 7 and the mounting electrode 2a by melting and moving or breaking the resin 13 covering the.

【0016】[0016]

【発明の効果】AlもしくはAl合金で成る実装電極の
表面を実装に用いる有機性接着薄膜で覆うことにより、
TFTアレイの清浄度を保持し、TAB実装の歩留まり
向上やAl防食による信頼性向上をはかるものである。
By covering the surface of the mounting electrode made of Al or Al alloy with the organic adhesive thin film used for mounting,
The cleanliness of the TFT array is maintained, the yield of TAB mounting is improved, and the reliability is improved by Al corrosion protection.

【0017】本発明の構成は、TFTアレイ工程後もし
くは液晶パネル化工程で得ることができ、前記構成を得
た後は実装電極が保護されているため外気からの汚染を
回避でき、る。従って、TFTアレイ状態もしくは液晶
パネル状態での長期保管が可能となる。
The structure of the present invention can be obtained after the TFT array process or the liquid crystal panel forming process, and after the structure is obtained, the mounting electrodes are protected, so that the contamination from the outside air can be avoided. Therefore, long-term storage in a TFT array state or a liquid crystal panel state is possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は本発明の第1実施例の構成図 (b)は本発明の第1実施例の構成図FIG. 1A is a configuration diagram of a first embodiment of the present invention, and FIG. 1B is a configuration diagram of a first embodiment of the present invention.

【図2】(a)は本発明の第2実施例の構成図 (b)は本発明の第2実施例の構成図2A is a configuration diagram of a second embodiment of the present invention, and FIG. 2B is a configuration diagram of a second embodiment of the present invention.

【図3】(a)は従来のTFTパネル構成図 (b)は従来のTFTパネル構成図FIG. 3A is a conventional TFT panel configuration diagram, and FIG. 3B is a conventional TFT panel configuration diagram.

【図4】(a)は従来のTFTパネルTAB実装化構成
図 (b)は従来のTFTパネルTAB実装化構成図
FIG. 4A is a configuration diagram of a conventional TFT panel TAB mounting configuration. FIG. 4B is a configuration diagram of a conventional TFT panel TAB mounting configuration.

【図5】(a)は従来のTAB実装化不良説明図 (b)は従来のTAB実装化不良説明図FIG. 5A is an explanatory diagram of a conventional TAB mounting defect. FIG. 5B is a conventional TAB mounting defect explanatory diagram.

【符号の説明】[Explanation of symbols]

1 透明基板 2 ゲート配線(2a:ゲート側実装電極) 3 ソース配線(3a:ソース側実装電極) 4 絶縁膜 5 対向基板 6 ポリイミドフィルム 7 TAB電極 8 導電粒子 9 接着材 10 異方膜 11 保護膜 12 膜質変化部 13 樹脂 1 Transparent Substrate 2 Gate Wiring (2a: Gate Side Mounting Electrode) 3 Source Wiring (3a: Source Side Mounting Electrode) 4 Insulating Film 5 Counter Substrate 6 Polyimide Film 7 TAB Electrode 8 Conductive Particles 9 Adhesive 10 Anisotropic Film 11 Protective Film 12 Film quality change part 13 Resin

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H05K 1/18 J 8718−4E Continuation of front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H05K 1/18 J 8718-4E

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】配線電極を有する電子部品に於て、前記配
線電極の端部が金属の単層もしくは多層膜で成り、その
表面が有機膜で保護されたことを特徴とする電子部品。
1. An electronic component having a wiring electrode, wherein an end portion of the wiring electrode is made of a metal single layer or a multilayer film, and the surface thereof is protected by an organic film.
【請求項2】前記有機膜がTAB材を構成する異方膜の
接着材と同成分から成る有機膜であることを特徴とする
請求項1記載の電子部品。
2. The electronic component according to claim 1, wherein the organic film is an organic film made of the same component as an anisotropic film adhesive forming a TAB material.
【請求項3】前記有機膜に、樹脂カプセルで保護されて
いる導電性粒子を含有して成ることを特徴とする請求項
1記載の電子部品。
3. The electronic component according to claim 1, wherein the organic film contains conductive particles protected by a resin capsule.
JP31659294A 1994-12-20 1994-12-20 Electronic component Pending JPH08172094A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31659294A JPH08172094A (en) 1994-12-20 1994-12-20 Electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31659294A JPH08172094A (en) 1994-12-20 1994-12-20 Electronic component

Publications (1)

Publication Number Publication Date
JPH08172094A true JPH08172094A (en) 1996-07-02

Family

ID=18078804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31659294A Pending JPH08172094A (en) 1994-12-20 1994-12-20 Electronic component

Country Status (1)

Country Link
JP (1) JPH08172094A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000113915A (en) * 1998-10-08 2000-04-21 Futaba Corp Aluminum wire connection structure and method thereof
JP2001066622A (en) * 1999-08-27 2001-03-16 Seiko Epson Corp Liquid crystal device and electronic equipment
JP2001109010A (en) * 1999-10-06 2001-04-20 Seiko Epson Corp Electro-optic device, method for manufacturing electro- optic device and electronic apparatus
JP2001255553A (en) * 2001-02-08 2001-09-21 Seiko Epson Corp Liquid crystal device and electronic equipment
KR100652301B1 (en) * 2005-03-30 2006-11-30 엘에스전선 주식회사 Tape carrier package of being easy to discern impression of pressure

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000113915A (en) * 1998-10-08 2000-04-21 Futaba Corp Aluminum wire connection structure and method thereof
JP2001066622A (en) * 1999-08-27 2001-03-16 Seiko Epson Corp Liquid crystal device and electronic equipment
US6741315B1 (en) 1999-08-27 2004-05-25 Seiko Epson Corporation Liquid crystal device and electronic apparatus
JP2001109010A (en) * 1999-10-06 2001-04-20 Seiko Epson Corp Electro-optic device, method for manufacturing electro- optic device and electronic apparatus
JP2001255553A (en) * 2001-02-08 2001-09-21 Seiko Epson Corp Liquid crystal device and electronic equipment
KR100652301B1 (en) * 2005-03-30 2006-11-30 엘에스전선 주식회사 Tape carrier package of being easy to discern impression of pressure

Similar Documents

Publication Publication Date Title
JP4820372B2 (en) Circuit member, electrode connection structure, and display device including the same
JP4741870B2 (en) Liquid crystal display device and manufacturing method thereof
JPH10133216A (en) Active matrix type liquid crystal display device
US5576869A (en) Liquid crystal display apparatus including an electrode wiring having pads of molybdenum formed on portions of input and output wiring
US7390734B2 (en) Thin film transistor substrate and manufacturing method thereof
US8354672B2 (en) Thin film transistor array panel
JPH08262475A (en) Production of display device
JP4651367B2 (en) Semiconductor device and manufacturing method of semiconductor device
KR101119184B1 (en) Array substrate, display apparatus having the same and method of manufacturing the same
JPH08172094A (en) Electronic component
JP2008090147A (en) Connection terminal board and electronic device using the same
US7456475B2 (en) Display panel
KR100769435B1 (en) Liquid crystal display
JPH08234225A (en) Liquid crystal display device
JP3710292B2 (en) Face-down mounting structure
JP3119912B2 (en) Liquid crystal display
JP2007078931A (en) Liquid crystal display device
JP4435511B2 (en) Liquid crystal display
KR20060087712A (en) Liquid crystal display
TW200916880A (en) Electronic circuit protective structure of liquuid crystal display and assembly method thereof
JPH07209663A (en) Liquid crystal display panel and its display device and method
JP2539360B2 (en) Liquid crystal display
JP3038747B2 (en) Liquid crystal display element alignment treatment method
JP3454850B2 (en) Liquid crystal display
JP3579044B2 (en) Manufacturing method of semiconductor integrated circuit