JPH0816529A - Method for accessing shared memory - Google Patents

Abstract

PURPOSE:To make each computer device surely recognize the area, to which the access is inhibited, even in the case of the change of computer devices connected to a shared memory. CONSTITUTION:Two computer devices are connected to different ports of a shared memory 2. The shared memory 2 is provided with ACCESS information set areas Aa and Ab where inhibit area data Da1,... and Db1,... indicating the areas to which the access from each computer device is inhibited are written. Inhibit area data Da1,... and Db1,... are written at the time of power-on of the system by each computer device which has areas to which the access from another computer device should be inhibited. At the time of access to the shared memory 2 from the computer device ($18, the computer device reads out inhibit area data Da1,... and Db1,... (S2); and if the accessed address is on the outside of inhibit area data Da1,... and Db1,... (S3), the computer device accesses the shared memory 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a shared memory having a plurality of ports which are accessed by different computer devices, respectively, and allows access from specific computer devices and prohibits access from other computer devices. The present invention relates to a shared memory access method in which an area is set for each port.

[0002]

2. Description of the Related Art Conventionally, in a system including a plurality of processors, as shown in FIG.
One shared memory 2 is connected through the processor buses Ba and Bb for each of the processors 3b, and the other processors 3a and 3b are connected to each other.
It is considered that the data is exchanged between the processors 3a and 3b by reading the data written in the shared memory 2 by the processor. Here, the processors 3a and 3b are
Together with memories such as the ROMs 4a and 4b and the RAMs 5a and 5b, one computer device (microcomputer or programmable controller) 1a and 1b is configured.

By the way, the shared memory 2 has an area which can be accessed by any of the processors 3a and 3b, and an area which can be accessed from specific processors 3a and 3b but is accessed from other processors 3a and 3b. May be provided with prohibited areas. For example, in the storage area of the shared memory 2, an area is provided in which the computer device 1a can be accessed but the access from the computer device 1b is prohibited.

[0004]

In the above configuration, since the information of the area where access is permitted and the area where access is prohibited is held by each computer device 1a, 1b, it is connected to the shared memory 2. Computer device 1
When a, 1b is changed or any of the computer devices 1a, 1b connected to the shared memory 2 changes the information, the information change is requested for all the computer devices 1a, 1b. . In other words, if the operation of the computer apparatus 1a is changed or the computer apparatus 1a is replaced with another computer apparatus, the computer apparatus 1b cannot correctly recognize the access prohibited area, and the new computer apparatus cannot access the area. However, there is a problem that the normal operation cannot be guaranteed because it may access the area.

An object of the present invention is to solve the above problems, and even if the computer device connected to the shared memory is changed, each computer device can surely recognize the area where access is prohibited. Therefore, the present invention aims to provide a shared memory access method that prevents the malfunction of the access to the shared memory.

[0006]

According to a first aspect of the present invention, an inaccessible area having a plurality of ports accessed from different computer devices and prohibiting access from other computer devices is set for each port. In a method of accessing a shared memory, a plurality of sets of inaccessible area data indicating inaccessible areas are written to the shared memory through each port at the start of operation of each computer, and when each computer accesses the shared memory, another computer is accessed. The unusable area data set by is read, and the access is stopped when the accessed address is included in the address of the read unusable area data.

According to a second aspect of the present invention, there is provided a method of accessing a shared memory, which has a plurality of ports accessed from different computer devices, and sets an inaccessible area for prohibiting access from other computer devices for each port. In the above, at the time of starting the operation of each computer device, each set of inaccessible region data indicating the inaccessible region is written into the shared memory through each port, and when each computer device accesses the shared memory, the inaccessible region set by another computer device is set. It is characterized in that the data is read and the access is stopped when the accessed address is included in the read address of the impossible area data.

According to a third aspect of the present invention, there is provided a method of accessing a shared memory, which has a plurality of ports accessed from different computer devices and sets an inaccessible area for prohibiting access from other computer devices for each port. In the above, in the address comparison circuit inserted between each computer device and the shared memory, non-accessible area data indicating the inaccessible area is given from another computer device, and when the access is made from each computer device to the shared memory, the address The address comparing circuit compares the unusable area data set by another computer device, and suspends the access when the accessed address is included in the addresses of the compared unusable area data.

[0009]

According to the structure of the present invention, a plurality of sets of inaccessible area data indicating inaccessible areas are written in the shared memory through the respective ports at the start of operation of each computer, and the shared memory is shared by each computer. When accessing the non-accessible area, the unusable area data set by another computer device is read, and the access is stopped if the accessed address is included in the address of the read out unusable area data. It is possible to reliably prevent an area for which access from the computer device is prohibited from being accessed by another computer. Moreover, even if the inaccessible area is changed due to the operation change of the computer apparatus or the replacement of the computer apparatus, the inaccessible area corresponding to the computer apparatus is written in the shared memory when the operation of the computer apparatus is started, so that the access is prohibited. That is, the area being accessed cannot be accessed by mistake. In addition, since the malfunction does not occur even if the inaccessible area is changed, the inaccessible area can be freely set, and there is no malfunction due to accessing the prohibited area for safe use. It is possible.

According to the configuration of the invention of claim 2, the configuration is the same as the configuration of claim 1 except that one inaccessible area is provided for each computer device, and the same function is provided. is there. In addition, since there is one inaccessible area for each port, the area used for the inaccessible area data in the shared memory is small, and the limited storage area of the shared memory is not wasted. To have.

According to the configuration of the third aspect of the present invention, the non-accessible area data indicating the inaccessible area is given from another computer to the address comparison circuit inserted between each computer and the shared memory. At the time of accessing the shared memory from the computer device, the address is compared with the unusable area data set by another computer device by the address comparison circuit, and it is accessed if the accessed address is included in the address of the compared unusable area data. Therefore, the access to the inaccessible area can be surely prevented and the inaccessible area can be freely set, as in the first aspect of the invention. Moreover, it is not necessary to store the non-accessible area data indicating the non-accessible area in the shared memory, there is no burden on the storage capacity of the shared memory, and the address is compared by the address comparison circuit provided separately from the computer device. High-speed processing can be expected without the burden of processing for address comparison in the computer device.

[0012]

【Example】

(Embodiment 1) In this embodiment, similarly to the conventional configuration shown in FIG. 7, the shared memory 2 has two ports, and the computer devices 1a and 1b are connected to the respective ports via different processor buses Ba and Bb. Assume that they are connected. In a part of the storage area of the shared memory 2 in this embodiment, FIG.
As shown in (a), the other computer devices 1
Unusable area data D _a1 , ..., Indicating inaccessible area information as an area for which access from a, 1b is prohibited
Access information setting areas Aa and Ab for writing D _an , D _b1 , ..., D _bn are provided. The access information setting areas Aa and Ab are fixedly set corresponding to the respective computer devices 1a and 1b, and the start addresses are defined. That is, since the shared memory 2 of this embodiment has two ports and the two computer devices 1a and 1b share the shared memory 2, two access information setting areas Aa and Ab are provided. . Inaccessible area data D _a1 , ... _Which can be written in each access information setting area Aa, Ab
The number of D _an , D _an , D _b1 , ..., D _bn is arbitrary within the range of the size of each access information setting area Aa, Ab. Further, the impossible area data D _a1 , ..., D _an , D _b1 ,.
_bn is 2-word data, and as shown in FIG.
Inaccessible area C _a1 , ..., C _an , C _b1 , ..., C _bn
A combination of the start address AS and the end address AE, or the start address AS and its inaccessible area C _a1 , ...
, C _an , C _b1 , ..., C _{bn and} the length (the number of bytes or the number of words) LN. Here, the inaccessible areas C _a1 , ..., C _an are areas where access from the computer apparatus 1b is prohibited, and the inaccessible areas C _b1 , ..., C _bn are access areas which are prohibited from the computer apparatus 1a. This is the area that was created. The blank area in FIG. 1A is an area that can be accessed by both computer devices 1a and 1b.

As described above, since the shared memory 2 is provided with the access information setting areas Aa and Ab, each of the computer devices 1a and 1b operates in the following manner so that access is prohibited. Identify. That is, each of the computer devices 1a and 1b is connected to another computer device 1a or 1b when the operation is started such as when the power is turned on.
Write the unusable area data D _a1 , ..., D _an , D _b1 , ..., D _bn indicating the area for which access from b is prohibited in the access information setting areas Aa, Ab. However, in each of the computer devices 1a and 1b, the impossible area data D _a1 , ...,
D _an , D _b1 , ..., D _bn are ROMs 4a, 4b or RA
It is written in M5a and M5b. Next, in each of the computer devices 1a and 1b, as shown in FIG. 1B, when accessing the shared memory 2 (S1), the access information setting area Aa written by the other computer devices 1a and 1b, The contents of Ab are read (S2), and the address to be accessed is set to the access information setting areas Aa and Ab, and the disabled area data D _a1 , ..., D _an , D _b1 ,
..., inaccessible area C _a1 , indicated by D _bn , ..., C
Whether it is included in _an , C _b1 , ..., C _bn is determined (S
3). Here, if the address to be accessed is not included in the inaccessible areas C _a1 , ..., C _an , C _b1 , ..., C _bn , the shared memory 2 is accessed, and if it is included, the shared memory 2 is accessed. Access is stopped (S4). After the access is stopped, a process for dealing with it by changing the address may be performed, the process may be shifted to another process without performing this process, or the process may be stopped by notifying the abnormality by stopping the access. . Here, the impossible area data D _a1 ,
.., D _an , D _b1 , ..., D _bn are written in the shared memory 2 by the computer devices 1a and 1b, respectively, so that the inaccessible area C _a1 in both computer devices 1a and 1b.
.., C _an , C _b1 , ..., C _bn may overlap, but in this case, which computer device 1a, 1b
Can not be accessed in the region, the inaccessible area _{C a1, ......, C an,} C b1, ......, to operate in a fail-safe never malfunction occurs that despite access is C _bn become.

By the above processing procedure, it is possible to surely prevent access to the area where access is prohibited. Even when the operation of the computer devices 1a, 1b is changed or the computer devices 1a, 1b are replaced, each computer device 1a, 1b has the access information setting area A when the operation of the computer device 1a, 1b is started.
Impossible area data D _a1 , ..., D _an , D _b1 ,.
.., D _bn is written, the above operation becomes possible, and the malfunction can be avoided. That is, the desired area of the shared memory 2 is set to the inaccessible area C _a1 ,
..., C _an , C _b1 , ..., C _bn can be freely set, and further, malfunction can be avoided and the device can be operated safely.

In the above embodiment, the computer device 1 is used.
Although the case where there are two a and 1b has been described, the same operation is possible even when there are three or more. However, the shared memory 2 is provided with ports for the number of computer devices 1a and 1b. Further, if the address is within the range of the unusable area data D _a1 , ..., D _an , D _b1 , ..., D _bn written by the other computer devices 1a, 1b when the shared memory 2 is accessed. Although both reading and writing are prohibited, only writing may be prohibited and reading may be possible.

(Second Embodiment) In the first embodiment, the shared memory 2
Inaccessible area C in_a1, ……, C_an, C_b1,…
…, C_bnAlthough it was possible to set at multiple locations, this example
Is an inaccessible area C as shown in FIG._a, C_bTo
It is set in the shared memory 2 one by one. But
Thus, the shared memory 2 has access information setting areas Aa and Ab.
2 sets of unusable area data at a specific address provided as
TA D_a, D_bIs written in each computer
When the access devices 1a and 1b access the shared memory 2,
Are written by the other computer devices 1a and 1b.
Area data D_a, D_bCannot be accessed by reading
Area C_a, C_bIt is decided whether or not. Implementation
In the example, shared memory 2 has one inaccessible area
C_a, C_bThe only difference is that
This is the same as in the first embodiment. Inaccessible area C _a,
C_bSince it is set at one place, if it is provided at multiple places
Has the advantage of easier memory management than
It

[0017] (Embodiment 3) In the above-described embodiment, when the access to the shared memory 2, the specified address inaccessible area _{C a1, ......, C an,} C b1, ......, whether C _bn The respective computer devices 1a and 1b are designed to be determined according to the procedure instructed by the software, but in the present embodiment, as shown in FIG.
processor bus Ba between b and shared memory 2, the address comparison circuit 6 in Bb provided, impossible area data D _a1 to the address comparison circuit _{6, ......, D an, D} b1, ......, D bn
Is given. In FIG. 4, assuming that only the computer device 1b is prohibited from accessing a specific area of the shared memory 2, the address comparison circuit 6 is inserted only between the computer device 1b and the shared memory 2. When the area for prohibiting access from the computer device 1a is provided, the address comparison circuit 6 is also provided between the computer device 1a and the computer device 1a. That is, as shown in FIG. 5, when each of the computer devices 1a and 1b accesses the shared memory 2 (S1), the address is compared in the address comparison circuit 6 with the unusable area data D _a1 , ..., D _an ,
D _b1, ......, D _bn compared to the address specified is inaccessible area _{C a1, ......, C an,} C b1, ......, if it is not included in C _bn (S2), the determination flag FL Is set as "mismatch" (S3), and the determination flag FL is set to the computer device 1a or 1b that has accessed the shared memory 2.
And the shared memory 2 is accessed (S
4). When the addresses from the computer devices 1a and 1b are included in the inaccessible areas C _a1 , ..., C _an , C _b1 , ..., C _bn designated by the address comparison circuit 6, the determination flag FL is set to “match”. (S5), the computer device 1a that has accessed the shared memory 2,
Return to 1b and stop access. The computer devices 1a and 1b that have accessed the shared memory 2 recognize that the shared memory 2 is accessed by the "mismatch" determination flag FL from the address comparison circuit 6, and determine the "match". Shared memory 2 by flag FL
Recognize that access was not made. Here, the impossible area data D _a1 , for the address comparison circuit 6,
..., D _an , D _b1 , ..., D _bn are given from the other computer devices 1a, 1b. That is, as shown in FIG. 6, the shared memory 2 has access information setting areas Aa and Ab.
, The unusable area data D _a1 , ..., D _an , from the computer devices 1a and 1b to the address comparison circuit 6.
D _b1 , ..., D _bn are directly given. If there are three or more computer devices 1a and 1b, each address comparison circuit 6 has a plurality of types of unusable area data D _a1 , ..., D _an , D.
_b1 , ..., D _bn will be given.

In the present embodiment, by comparing the addresses with dedicated hardware, the processors 3a, 3a
The processing load of b is reduced, and the area data D _a1 , ...,
By directly _supplying D _an , D _b1 , ..., D _bn to the address comparison circuit 6 without writing them in the shared memory 2, the storage area of the shared memory 2 having a limited storage capacity is shared between the computer devices 1a and 1b. The shared memory 2 can be effectively used without having to use it for storing data other than exchanged data. Other configurations and operations are the same as those of the first embodiment.

[0019]

According to the first aspect of the present invention, a plurality of sets of inaccessible area data indicating inaccessible areas are written in the shared memory through the respective ports when the operation of each computer is started, and the shared memory is accessed from each computer. In this case, the unusable area data set by the other computer device is read, and if the accessed address is included in the address of the read unreadable area data, the access is stopped. There is an advantage that it is possible to surely prevent the area that is prohibited from being accessed from other computers from being accessed, and moreover, due to the operation change of the computer device, the replacement of the computer device, etc. Even if changes occur, the computer Since writing inaccessible area corresponding to the computer device at the start of the operation to the shared memory, there is an advantage that has never Prohibited areas of access is incorrectly accessed. In addition, since the malfunction does not occur even if the inaccessible area is changed, the inaccessible area can be freely set, and there is no malfunction due to accessing the prohibited area for safe use. The effect is that it is possible.

Since the invention of claim 2 has the same configuration as that of claim 1 except that one inaccessible area is provided for each computer device, the same effect as the invention of claim 1 is obtained. In addition, since the inaccessible area is set to one for each port, the area used for the inaccessible area data in the shared memory is small, and the limited storage area of the shared memory is not wastefully used. Have advantages.

According to a third aspect of the present invention, the non-accessible area data indicating the inaccessible area is given from another computer to the address comparison circuit inserted between each computer and the shared memory, and shared by each computer. At the time of accessing the memory, the address is compared with the unusable area data set by another computer by the address comparison circuit, and if the accessed address is included in the addresses of the compared unusable area data, the access is stopped. As in the case of the first aspect of the invention, it is possible to reliably prevent access to the inaccessible area and to set the inaccessible area freely. Moreover, since it is not necessary to store the non-accessible area data indicating the non-accessible area in the shared memory, there is no burden on the storage capacity of the shared memory, and the address is compared by the address comparison circuit provided separately from the computer device. Thus, the processing load for address comparison in the computer device is not imposed, and high-speed processing can be expected.

[Brief description of drawings]

1A and 1B show a first embodiment, FIG. 1A is a diagram showing a usage state of a shared memory, and FIG. 1B is an operation explanatory diagram of a computer device.

FIG. 2 is a diagram illustrating an example of unusable area data according to the first embodiment.

FIG. 3 is a diagram illustrating a usage state of a shared memory according to a second embodiment.

FIG. 4 is a block diagram of a main part of the third embodiment.

FIG. 5 is a diagram illustrating the operation of the computer device according to the third embodiment.

FIG. 6 is a diagram illustrating a usage state of a shared memory according to a third embodiment.

FIG. 7 is a block diagram showing a configuration example of a system to which the present invention is applied.

[Explanation of symbols]

1a computer device 1b computer device 2 shared memory 3a processor 3b processor 4a ROM 4b ROM 5a RAM 5b RAM 6 address comparison circuit Aa access information setting area Ab access information setting area C _a1 , ..., C _an inaccessible area C _b1 , ... …, C _bn inaccessible area D _a1 , ……, D _an inaccessible area data D _b1 , ……, D _bn inaccessible area data

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[Procedure amendment]

[Submission date] January 9, 1995

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 1

[Correction method] Change

[Correction content]

FIG.

Claims (3)

[Claims] 1. A method of accessing a shared memory, which has a plurality of ports accessed from different computer devices, and sets an inaccessible area for prohibiting access from other computer devices for each port, At the start of the operation, each group writes inaccessible area data indicating an inaccessible area through each port to the shared memory, and when accessing the shared memory from each computer, the inaccessible area data set by another computer is read out.
A method for accessing a shared memory, wherein the access is stopped when the accessed address is included in the read address of the unreadable area data. 2. A method of accessing a shared memory, which has a plurality of ports accessed from different computer devices, and sets an inaccessible area for prohibiting access from other computer devices for each port. At the start of the operation, each group writes inaccessible area data indicating an inaccessible area through each port into the shared memory, and when each computer accesses the shared memory, the inaccessible area data set by another computer is read out. A method for accessing a shared memory, wherein the access is stopped when the accessed address is included in the read address of the unreadable area data. 3. A method for accessing a shared memory, which has a plurality of ports accessed from different computer devices, and sets an inaccessible area for prohibiting access from other computer devices for each port, The non-accessible area data indicating the non-accessible area is given from another computer to the address comparison circuit inserted between the shared memory and the shared memory. A method for accessing a shared memory, comprising: comparing the set unusable area data with an address comparison circuit, and suspending the access when the accessed address is included in the addresses of the compared unusable area data.