JPH077915B2 - D / A converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a D / A (digital-analog) conversion technique, and further a current addition type D / A conversion IC (semiconductor integrated circuit device).
The present invention relates to a technology effectively applied to, for example, a technology effectively applied to a D / A converter using a ladder resistance.

[Prior Art] As a D / A converter, there is a current addition type as described in, for example, US Pat. No. 4,092,639.

Here, the present inventor examined the configuration of the current addition type D / A converter. The following is a technology which has not been publicly known but which has been studied by the present inventor, and the outline thereof is as follows.

FIG. 9 shows the configuration of a D / A converter examined by the present inventor.

The D / A converter shown in the figure is of a current addition type, and has a plurality of bipolar transistors Q1 to Q8, Q8, a resistance ladder 1, a switch circuit 2 and the like.

A plurality of bipolar transistors Q1 to Q8, Q8 are each provided with a base voltage from a common reference voltage source Vref, and the size of the emitter area (x128, x64, x3
2, × 16, × 8, × 4, × 2, × 1, × 1) are weighted according to the power series of 1/2. This causes the plurality of bipolar transistors Q1-Q8, Q8 to each have a respective weighted current (I / 2, I / 4, I / I) according to their weighted emitter area ratio or a power series of 1/2. 8, I /
16, I / 32, I / 64, I / 128, I / 256, I / 256). At this time,
The base-emitter voltage V _BE of each of the bipolar transistors Q1 to Q8, Q8 is made equal to each other by weighting the emitter area thereof, and thus the emitter potential of each of the bipolar transistors Q1 to Q8, Q8 is equalized. Are arranged in the same way.

The resistance ladder 1 has two types of resistance R having a resistance ratio of 1: 2.
And 2R are connected in series and in a ladder connection, and the currents I / 2 to I / 256 weighted according to the 1/2 power series are shunted to the bipolar transistors Q1 to Q8 and Q8, respectively.
One end of resistor ladder 1 has each bipolar transistor
Total current I (I = I / 2 + I / 4 + I / 8 + I / 16 + I / 32 + I / 64 + I / 128 +) of shunt current I / 2 to I / 256 flowing through Q1 to Q8 respectively
A constant current circuit 3 for pulling (I / 256 + I / 256) is connected.

The switch circuit 2 has as many (8) selection changeover switch circuits as the number of bits (8 bits) of the parallel digital input signal Din. The selection state of each selection changeover switch circuit is individually controlled based on the bit data B7 to Bo of the digital input signal Din. Each selection switch circuit,
Although not shown in detail, it is constituted by an active element such as a bipolar transistor and has one selection terminal and two selected terminals equivalently. In this case, each selection terminal is connected to the corresponding bipolar transistor Q1-Q8. Further, one of the two selected terminals is commonly connected to the output line and the other is commonly connected to the power supply potential V +. This gives you
An output current Io having a magnitude corresponding to the data value of the digital input signal Din is taken out. This output current Io is converted into a voltage output Vout by the current-voltage conversion circuit (IV) 5 if necessary.

The rightmost bipolar transistor Q8 in the figure is
This is for obtaining the shunt of I / 256, and the current of I / 256 is directly supplied from the power source V +.

The current addition type D / A converter is configured as described above.

[Problems to be Solved by the Invention] However, the present inventor has clarified that the above-described technique has the following problems.

That is, in the D / A converter described above, the currents I / 2 to I / 2 flowing through the bipolar transistors Q1 to Q8, respectively.
56 each bipolar transistor to weight
The size of the emitter area of Q1 to Q8 (× 128 to × 1) was weighted. However, if the emitter area is weighted, in order to have a conversion capability of, for example, 8 bits, 8 types of bipolar transistors having different sizes up to a power of (8-1), that is, 128 times, can be used.
Q1 to Q8 must be formed with extremely high specific accuracy. Therefore, in the manufacturing process, for example, the dimensional control of individual bipolar transistors becomes very troublesome. In addition, in order to form many types of bipolar transistors with a large area ratio, the overall layout must be irregularly shaped. Therefore, a space-efficient layout, that is, optimum layout design It has been made clear by the present inventors that there is a problem that it becomes very difficult to realize.

An object of the present invention is to reduce the number of dimensional types of elements constituting a D / A converter or the like, in particular, a plurality of bipolar transistors that carry weighted currents, thereby maintaining high accuracy, for example, It is intended to provide a technique for facilitating dimensional management or optimization of layout design in a manufacturing process or the like.

The above and other objects and novel characteristics of the present invention are
It will be apparent from the description of the present specification and the accompanying drawings.

[Means for Solving the Problems] The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows.

That is, a current addition type D / A converter that divides the current weighted by the resistance ladder into multiple bipolar transistors and adds the currents flowing in each bipolar transistor based on the digital input signal. In addition, while providing the emitter areas of the plurality of bipolar transistors to one type, a current source is provided to generate a voltage division in the resistance ladder so that the emitter potentials of the bipolar transistors are equalized. Is.

[Operation] According to the above-mentioned means, the size type of the plurality of bipolar transistors that respectively carry the weighted currents is 1
Since the types are arranged, it is possible to achieve the object of facilitating, for example, dimensional control in the manufacturing process or optimization of layout design while maintaining high accuracy.

[Embodiment] A preferred embodiment of the present invention will be described below with reference to the drawings.

In each drawing, the same reference numerals indicate the same or corresponding parts.

FIG. 1 shows an embodiment of a D / A converter to which the present invention is applied.

First, the D / A converter shown in the figure is a current summing type, and a plurality of bipolar transistors Q1 are used as active elements.
˜Qn, Qn, resistance ladder 1, switch circuit 2 and the like.

The plurality of bipolar transistors Q1 to Qn, Qn will be described later in detail, but the currents (I, I / 2, I / 4, ..., I / 2n) weighted according to the power series of 1/2 are respectively described. ^-1 ,, I / 2n ^-1 )
Shed.

The resistance ladder 1 has two types of resistance R having a resistance ratio of 1: 2.
2 and 2R are connected in series and in a ladder connection, and currents I to I / 2n ^-1 weighted according to 1/2 power series are shunted to the bipolar transistors Q1 to Qn and Qn, respectively.
One end of resistor ladder 1 has each bipolar transistor
Total current 2I (2I = I + I / 2 + I / 4 + ... + I / 2n- ¹ + I / 2) of shunt currents I to I / 2n- ¹ flowing through Q1 to Qn and Qn respectively
A constant current circuit 3 for pulling n ⁻¹ ) is connected.

The switch circuit 2, which will be described in detail later, has a number (n bits) corresponding to the number of bits (n bits) of the parallel digital input signal Din.
Individual selection switch circuit. The selection state of each selection changeover switch circuit is individually controlled based on each bit data of the digital input signal Din. As a result, the switch circuit 2 weights the respective bipolar transistors Q1 to Qn and divides the current (I, I / 2, I / 4, ...
,, I / 2n ^-1 ) is added based on each bit data of the digital input signal Din. This added current is output as the D / A conversion output current Io. This output current Io is converted into a voltage output by a current-voltage conversion circuit (IV) if necessary.

The rightmost bipolar transistor Qn in the figure is
Be for obtaining a diversion of I / 2n ^-1, electric current of the direct I / 2n ^-1 from the power supply without passing through the switch circuit 2.

Here, the plurality of bipolar transistors Q1 to Qn, Q
As for n, a base voltage is applied from a common reference voltage source Vref, and the emitter areas thereof are arranged to be the same (× 1).

On the other hand, a constant correction current Ix is applied to both ends of the resistance ladder 1.
Is connected to the current source 4 which is caused to flow. The correction current source 4, as to cause each of the bipolar transistors Q1 to Qn, the emitter potential V _E 1 to V _E n of Qn, the partial pressure so as to correct the V _E n the same in the resistor ladder 1 Correction current Ix
Is set to flow.

As a result, a bias voltage from the resistor ladder 1 to each of the bipolar transistors Q1 to Qn, so that the base-emitter voltage V _{BE of} each of the Qn becomes the same.
It is applied to the emitter side of Q1 to Qn, Qn.

In this case, the correction current Ix is obtained as follows.

First, the base-emitter voltage V _BE of the bipolar transistor is given by the following equation (1).

k: Boltzmann constant, T: absolute temperature I _E: emitter area, I _S: where the saturation current value, the plurality of bipolar transistors Q1 to Qn, Q
A current (I,
I / 2, I / 4, ..., I / 2) From the above calculation example, the correction current Ix is
The magnitude may be such that a voltage division ΔV is generated in each series resistor R of the resistor ladder 1 such that the emitter potential V _E of the transistors Q1 to Qn sequentially increases by 18 mV.

That is, the correction current Ix is Is set.

This allows multiple bipolar transistors Q1-Qn, Q
Even if the emitter area of n is not weighted, the current (I, I
Predetermined weighting can be applied to / 2, I / 4, ..., I / 2, I / 2). Along with this, each bipolar transistor
It becomes possible to make the emitter potentials of Q1 to Qn, Qn the same.

As described above, the elements constituting the D / A converter, especially the weighted currents (I, I / 2, I / 4, ..., I / 2, I / 2)
It is possible to reduce the number of dimensional types of multiple bipolar transistors Q1 to Qn, Qn that flow current through them, which enables, for example, dimensional control in the manufacturing process or optimization of layout design while maintaining high accuracy. Will be able to make it easier.

FIG. 2 shows an example of the configuration of the current source 4 for supplying the correction current Ix.

As shown in the figure, the current source 4 is connected to the resistance ladder 1
A first constant current circuit 4A that draws a current from one end of the resistor ladder, a second constant current circuit 4C that supplies a current from the other end of the resistor ladder 1,
And a current mirror 4B for mapping the current Ix sent by the first constant current circuit 4A onto the second constant current circuit 4C. In the figure, bipolar transistor
Q44, Q45, Q46 form a current mirror forming the second constant current circuit 4C. Also, bipolar transistor Q41,
Q42 and Q43 are the current I sent by the first constant current circuit 4A.
A current mirror that maps x to the second constant current circuit 4C at a ratio of 1: 1 is constructed. With such a configuration, the correction current Ix can be passed only through the resistance ladder 1.

The current source 4 for supplying the correction current Ix may be two independent constant current circuits 4A and 4D as shown in FIG.
In this case, one constant current circuit 4A subtracts the correction current Ix from one end of the resistance ladder 1, and the same current Ix is supplied from the other end of the resistance ladder 1 by the other constant current circuit 4D.

Furthermore, if the current I shunted by the resistance ladder 1 is made sufficiently larger than the correction current Ix,
That is, if I >> Ix, as shown in FIG. 4, the correction current source 4 may be configured to only send the correction current Ix from the other end side of the resistance ladder 1.

FIG. 5 shows an example of the configuration of the constant current circuit 4A that absorbs the correction current Ix.

The constant current circuit 4A shown in the figure is a pnp bipolar transistor Q11, Q12, Q13, 1 to 2 which constitutes a current mirror circuit.
Bipolar transistors Q21 and Q22 with an emitter area ratio of
A resistor R connecting the bases of Q21 and Q22 to each other, a current-voltage converter (IV) 41 having a sufficiently large conversion gain, and a resistor R inserted in series to each emitter of the bipolar transistors Q21 and Q22. , R, etc. V + indicates a power supply potential.

In the constant current circuit 4, the base side of the transistor Q21 having an emitter area ratio of 1 (× 1) is connected to the bases of the rightmost bipolar transistors Qn of the plurality of bipolar transistors Q1 to Qn, Qn, and the emitter area is The ratio is 2 (×
The base side of the transistor Q22 of 2) is connected to the current output side of the voltage-current conversion circuit 41. Then, a negative feedback loop is formed so that the voltage-current conversion circuit 41 outputs the current Ix such that the currents flowing through the two bipolar transistors Q21 and Q22 become equal to each other. That is, a current Ix that causes a base-emitter voltage difference equivalent to that of the transistors Q21 and Q22 having an emitter area ratio of 1: 2 flows. As a result, the constant current circuit 4A produces a correction current Ix that causes weighting of current equivalent to weighting the emitter areas of the plurality of bipolar transistors Q1 to Qn, Qn according to a power series of 1/2. Can occur.

FIG. 6 shows a configuration example of the constant current circuit 4D that discharges the correction current Ix.

The constant current circuit 4D shown in the figure is similar to the constant current circuit 4A described above in that it includes pnp bipolar transistors Q11, Q12, Q13 that form a current mirror circuit, and two bipolar transistors having an emitter area of 1 to 2. Transistors Q21 and Q22
Composed of etc. In this case, a resistor 2 is placed on the emitter side of the bipolar transistor Q22 with an emitter area ratio of 2.
R is inserted in series and this resistor 2R and bipolar
The current delivered by the transistor Q22 and the transistor Q22 are mapped to the bipolar transistor Q21 having an emitter area ratio of 1 with a mirror ratio of 1: 1. Then, the currents (Ix / 2, Ix / 2) flowing through the bipolar transistors Q21 and Q22 are merged, and the merged current Ix (Ix = Ix = Ix = Ix / 2)
x / 2 + Ix / 2) is output as the correction current Ix.

FIG. 7 shows a configuration example of the switch circuit 2. FIG. 8 shows an equivalent circuit of the switch circuit 2 shown in FIG.

As shown in FIGS. 7 and 8, the switch circuit 2 has a number (n) of selection changeover switch circuits corresponding to the number of bits (n bits) of the parallel digital input signal Din. The selection state of each selection switch circuit is the digital input signal Din
Are individually controlled based on each bit data of. Each selection changeover switch circuit is constituted by a two-stage cascade connection type current switch composed of bipolar transistors Q31 to Q35 and a resistor R _E , and equivalently has one selection terminal and two selected terminals. In this case, each select terminal has a corresponding bipolar transistor Q1 ...
Connected to the collector of Qn. Also, the two selected terminals are commonly connected to each. Then, the output current Io having a magnitude corresponding to the data value of the digital input signal Din is added and taken out from the one common connection side.

In FIG. 7, Vs1, Vs2, and Vs3 are constant reference voltages.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. There is no end. For example, the bipolar transistors Q1 to Qn, Qn may be active devices other than the bipolar transistors.

In the above description, the case where the invention mainly made by the present inventor is applied to the D / A converter which is the field of application which is the background has been described, but the present invention is not limited thereto, and for example, the A / D conversion is performed. It can also be applied to vessels.

[Effects of the Invention] The effects obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows.

That is, in a D / A converter or the like, it is possible to reduce the number of dimensional types of a plurality of bipolar transistors in which weighted currents are flown, and thus, while maintaining high accuracy, for example, in the manufacturing process, This has the effect of facilitating management or optimization of layout design.

[Brief description of drawings]

1 is a circuit diagram showing one embodiment of a D / A converter to which the technique according to the present invention is applied, FIG. 2 is a circuit diagram showing another embodiment of the present invention, and FIG. 3 is a further diagram of the present invention. FIG. 4 is a circuit diagram showing another embodiment, FIG. 4 is a circuit diagram showing still another embodiment of the present invention, FIG. 5 is a circuit diagram showing a configuration example of a constant current circuit for absorbing a correction current, and FIG. FIG. 7 is a circuit diagram showing a configuration example of a constant current circuit for discharging current, FIG. 7 is a circuit diagram partially showing a configuration example of a switch circuit used in the D / A converter according to the present invention, and FIG. 7 is an equivalent circuit diagram of the switch circuit shown in FIG. 7, and FIG. 9 is a circuit diagram showing a configuration example of a D / A converter examined prior to the present invention. 1 ... Resistance ladder, 2 ... Switch circuit, 3 ... Constant current circuit, 4 ... Correction current source, 4A, 4C, 4D ... Constant current circuit, 4B
…… Current mirror, Q1 to Qn, Qn …… Bipolar transistor that carries weighted current, Ix …… Corrected current.

Claims (2)

[Claims] 1. A plurality of bipolar transistors which are provided corresponding to a digital input signal composed of a plurality of bits and have the same emitter areas, and a common reference voltage is applied to the bases of the plurality of bipolar transistors. A resistance ladder in which a reference voltage source to be supplied and a resistance consisting of R and 2R having a resistance ratio of 1: 2 are connected in series and parallel, and the emitter of the bipolar transistor is connected to a resistance of 2R arranged in parallel. And the bipolar
A first constant current source for injecting a correction current for generating a base-emitter voltage such that a weighting current according to a power series flows in a transistor from one end of a resistor R of the resistor ladder, and the resistor. At the other end of the ladder, a second constant current source adapted to absorb the total current flowing through the plurality of bipolar transistors and the correction current, and the collector current of the corresponding bipolar transistor by the digital input signal are supplied to the power source side. Alternatively, a D / A converter comprising a switch circuit for switching to the output side. 2. The second constant current source, a constant current source for flowing a total current flowing through the plurality of bipolar transistors, and the same current as the first constant current source as an input current,
A current mirror for flowing the same current as that is connected in parallel to the current mirror.
D / A converter described in paragraph.