JPH0774964A - Image processor - Google Patents

Abstract

PURPOSE:To improve the efficiency of picture transmission by controlling the quantity of compressed data in the case of converting multi-valued information into binary information and transmitting a compressed data. CONSTITUTION:In the case of connecting a connector of a core part 10 to a reader part 1, four kinds of signals, i.e., a multi-valued video signal, are built in the connector and a CPU in the reader part 1 is allowed to execute communication. A video signal to be a bidirectional signal can input/output information obtained from the reader part 1 to/from the core part 10. A single direction signal is separated from the bidirectional signal and the multi-valued video signal from the reader part 1 is inputted to a succeeding filter. An output signal from the filter is inputted to a binarizing circuit or a selector and a signal selected from the binarizing circuit or the selector is inputted to a succeeding rotation circuit which is not shown in accordance with a CPU instruction through a FAX part 4, a file part 5, a computer interface part 7, a format part 8, and an image memory part 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for filtering image information based on the amount of information when the image information is compressed.

[0002]

2. Description of the Related Art A facsimile is similar to the image processing apparatus of the present invention. Conventionally, a facsimile is configured so that analog image information from an image reader is binarized by a comparator and the binarized information is compressed.

[0003]

However, in the above-mentioned conventional example, since there is no distinction between the originals read by the image reader, when the originals are natural images with many halftones, the amount of compressed compression information becomes enormous. It took a lot of time to send by facsimile.

Therefore, according to the present invention, an image which can be efficiently transmitted by controlling the amount of compressed data when converting multi-valued information into binary information and compressing it and transmitting the image. An object is to provide a processing device.

[0005]

In order to solve the above-mentioned problems, the image processing apparatus of the present invention has an image reading means for reading information of a document as multivalued information, and multivalued information from the image reading means. Filter means for edge enhancement or smoothing, binary conversion means for converting multivalued information from the filter means into binary information, compression means for compressing binary information from the binarization means, and compression means In an image processing apparatus having processing means for processing the compressed information from, when the amount of compressed information of the compression means is larger than a predetermined value,
By providing control means for increasing the area size of the filter means, control is performed so that the amount of compressed information does not become large even if the original is a natural image with many halftones.

[0006]

1 is a block diagram showing the construction of an image forming system according to an embodiment of the present invention.

In FIG. 1, 1 is an image input device for converting a document into image data (hereinafter referred to as a reader section), 2 has plural kinds of recording paper cassettes, and image data is visible on the recording paper by a print command. An image output device (hereinafter referred to as a printer) 3 for outputting as an image is an external device electrically connected to the reader unit 1 and has various functions.
The external device 3 includes a fax unit 4, a file unit 5, an external storage device 6 connected to the file unit 5, a computer interface unit 7 for connecting to the computer 11, and a visible image of information from the computer 11. The formatter unit 8 for storing the information, the image memory unit 9 for temporarily storing the information from the reader unit of the computer, the information sent from the computer, and the core unit 10 for controlling the above functions. And so on.

The functions of the respective units 1-9 will be described in detail below.

<Description of Reader Unit 1> FIG. 2 shows the reader unit 1.
FIG. 3 is a cross-sectional view showing the configuration of the printer unit 2 and
The configuration and operation will be described.

The originals stacked on the original feeding device 101 are sequentially conveyed one by one onto the original glass surface 102. When the document is conveyed, the lamp 103 of the scanner unit lights up and the scanner unit 104 moves to illuminate the document. The reflected light of the document is reflected by the mirrors 105, 106, 1
After passing through the lens 108, the image is input to the CCD image sensor unit 109 (hereinafter referred to as CCD).

FIG. 3 is a circuit block diagram showing the signal processing configuration of the reader unit 1 described above, and the configuration and operation will be described below.

The image information input to the CCD 109 is photoelectrically converted here and converted into an electric signal. CCD109
Color information from the following amplifiers 110R, 110G,
At 110B, the signal is amplified according to the input signal level of the A / D converter 111. The output signal from the A / D converter 111 is input to the shading circuit 112, where uneven light distribution of the lamp 103 and uneven sensitivity of the CCD are corrected. The signal from the shading circuit 112 is the Y signal
It is input to the color detection circuit 113 and the external I / F switching circuit 119.

The Y signal generation / color detection circuit 113 calculates the signal from the shading circuit 112 by the following equation to obtain a Y signal.

Y = 0.3R + 0.6G + 0.1B Further, it has a color detecting circuit for separating the R, G, B signals into seven colors and outputting the signals for the respective colors. The output signal from the Y signal generation / color detection circuit 113 is input to the scaling / repeat circuit 114. Scanner unit 104
Magnification in the sub-scanning direction depending on the scanning speed of
The repeat circuit 114 performs scaling in the main scanning direction. Further, the scaling / repeat circuit 114 can output a plurality of identical images. The edge enhancement circuit 115 obtains edge enhancement and contour information by enhancing high frequency components of the signal from the scaling / repeat circuit 114. The signal from the edge enhancement circuit 115 is used for patterning / thickening / masking / marker area determination / contour generation circuit 116.
It is input to the trimming circuit 117.

Marker area determination / contour generation circuit 116
Reads the portion of the manuscript written with a marker pen of a specified color to generate contour information of the marker, and the next patterning / thickening / masking / trimming circuit 117 thickens, masks or trims the contour information. I do.
Further, patterning is performed by the color detection signal from the Y signal generation / color detection circuit 113.

An output signal from the patterning / thickening / masking / trimming circuit 117 is input to the laser driver circuit 118 and variously processed signals are converted into signals for driving a laser. The output signal of the laser driver 118 is input to the printer 2 and image formation is performed as a visible image.

Next, an external I / F for performing I / F with an external device
The F switching circuit 119 will be described.

When outputting the image information from the reader unit 1 to the external device 3, the external I / F switching circuit 119 outputs the image information from the patterning / thickening / masking / trimming circuit 117 to the connector 120. When the image information from the external device 3 is input to the reader unit 1, the external switching circuit 119 inputs the image information from the connector 120 to the Y signal generation / color detection circuit 113.

Each of the above-mentioned image processings is performed according to an instruction from the CPU 122, and the area generation circuit 121 generates various timing signals necessary for the above-mentioned image processing according to the value set by the CPU 122. Further CPU 122
Communication with the external device 3 is performed using the communication function built in the. The SUB / CPU 123 controls the operation unit 124 and communicates with the external device 3 by using the communication function built in the SUB / CPU 123.

<Description of Printer Unit 2> The configuration and operation of the printer unit 2 will be described with reference to FIG.

The signal input to the printer unit 2 is converted into an optical signal by the exposure control unit 201 and illuminates the photoconductor 202 according to the image signal. The latent image formed on the photoconductor 202 by the irradiation light is developed by the developing device 203. At the same time as the development, the transfer paper is conveyed from the transfer paper stacking section 204 or 205, and the developed image is transferred at the transfer section 206. The transferred image is fixed on the transfer target paper by the fixing unit 207, and then the paper output unit 208.
Is discharged to the outside of the device. The transfer paper output from the paper output unit 208 is discharged to each bin when the sort function is working in the sorter 220 or to the highest bin of the sorter when the sort function is not working. .

Next, a method for outputting sequentially read images on both sides of one output sheet will be described.

After the output sheet fixed by the fixing section 207 is once conveyed to the sheet discharge section 208, the conveying direction of the sheet is reversed and the re-transferred transfer sheet stacking section 210 is passed through the conveying direction switching member 209. Transport to. When the next manuscript is prepared,
The original image is read in the same manner as in the above process, but the transfer paper is fed from the re-transferred transfer paper stacking unit 210, so that two original images are output on the front surface and the back surface of the same output paper. can do.

<Description of External Device 3> The external device 3 is connected to the reader 1 by a cable, and the core of the external device 3 controls signals and functions. In the external device 3, a fax unit 4 for transmitting / receiving a facsimile, a file unit 5 for converting various document information into electric signals and storing the same, a formatter unit 8 for developing code information from a computer into image information, and an interface with the computer. An image memory unit 9 for storing information from the computer interface unit 7, the reader unit 1 or temporarily storing information sent from the computer, and a core unit 10 for controlling the above functions. .

The configuration and operation of the core section 10 of the external device 3 will be described below with reference to the block diagram shown in FIG.

<Description of Core Unit 10> FIG. 4 is a block diagram showing a detailed configuration of the core unit 10 described above.

The connector 1001 of the core section 10 is connected to the connector 120 of the reader section 1 by a cable. The connector 1001 contains four types of signals.
057 is an 8-bit multivalued video signal. Signal 10
Reference numeral 55 is a control signal for controlling the video signal. Signal 1
051 communicates with the CPU 122 in the reader 1. The signal 1052 communicates with the SUB / CPU 123 in the reader 1. The signals 1051 and 1052 are communication ICs.
Communication protocol processing is performed by 1002 and CPU bus 1053
The communication information is transmitted to the CPU 1003 via the.

The signal 1057 is a bidirectional video signal line, and it is possible for the core unit 10 to receive information from the reader unit 1 and to output information from the core unit 10 to the reader unit 1.

Signal 1057 is connected to buffer 1010 where bidirectional to unidirectional signals 1058 and 1
070. The signal 1058 is an 8-bit multi-valued video signal from the reader unit 1, and is the filter 10 of the next stage.
11 is input. In the filter 1011, the reader unit 1
The image information from is filtered by the area size according to the instruction from the CPU 1003. The output signal 1059 from the filter 1011 is input to the binarization circuit 1012 or the selector 1013. In the binarization circuit 1012,
A simple binarization function that binarizes a multi-valued signal 1059 at a fixed slice level, a binarization function that uses a variable slice level in which the slice level changes from the values of pixels around a target pixel, and an error diffusion method It has a valuation function. The binarized information is converted into a multilevel signal of 00H at 0 and FFH at 1 and input to the selector 1013 at the next stage. The selector 1013 selects either the signal from the filter 1011 or the output signal of the binarization circuit 1012. The output signal 1060 from the selector 1013 is input to the selector 1014. The selector 1014 outputs video signals output from the fax unit 4, file unit 5, computer interface unit 7, formatter unit 8 and image memory unit 9 to connectors 1005 and 100, respectively.
6, 1007, 1008, 1009 through the core portion 10
The signal 1064 input to the selector 1013 and the output signal 1060 of the selector 1013 are selected by the instruction of the CPU 1003.
The output signal 1061 of the selector 1014 is the rotation circuit 10
15 or to the selector 1016. The rotation circuit 1015 applies the input image signal to +90 degrees, -90 degrees, +1.
It has the function of rotating at 80 degrees. The rotation circuit 1015 is
The information output from the reader unit 1 is converted into a binary signal by the binarization circuit 1012 and then stored in the rotation circuit 1015 as information from the reader unit 1. Next, according to an instruction from the CPU 1003, the rotation circuit 1015 rotates and reads the stored information. The selector 1016 has a rotation circuit 1015.
Output signal 1062 and input signal 1 of rotation circuit 1015
061 is selected, and as the signal 1063, the connector 1005 with the fax unit 4, the connector 1006 with the file unit 5, the connector 1007 with the computer interface unit, and the connector 10 with the formatter unit 8 are selected.
08, and outputs to the connector 1009 to the image memory unit and the selector 1017.

The signal 1063 is a synchronous 8-bit unidirectional video bus for transferring image information from the core unit 10 to the fax unit 4, file unit 5, computer interface unit 7, formatter unit 8 and image memory unit 9. The signal 1064 includes a fax section 4, a file section 5,
It is a synchronous 8-bit unidirectional video bus for transferring image information from the computer interface unit 7, the formatter unit 8 and the image memory unit 9. Signal 10 above
The video control circuit 1004 controls the synchronous bus of 63 and the signal 1064.
Control is performed by the output signal 1056 from 04. In addition to the signals 10 to the connectors 1005 to 1009,
54 are respectively connected. The signal 1054 is a bidirectional 16-bit CPU bus,
Exchange commands. Transfer of information between the fax unit 4, the file unit 5, the computer interface unit 7, the formatter unit 8, the image memory unit 9 and the core unit 10 is possible by the above two video buses 1063 and 1064 and the CPU bus 1054. .

The signal 1064 from the fax unit 4, file unit 5, computer interface unit 7, formatter unit 8 and image memory unit 9 is sent to the selector 1014.
Is input to the selector 1017. Selector 1016
Inputs the signal 1064 to the rotation circuit 1015 at the next stage according to the instruction from the CPU 1003.

The selector 1017 selects the signal 1063 and the signal 1064 according to an instruction from the CPU 1003. The output signal 1065 of the selector 1017 is input to the pattern matching 1018 and the selector 1019. The pattern matching 1018 pattern-matches the input signal 1065 with a predetermined pattern. When the patterns match, a predetermined multi-valued signal is output to the signal line 1.
Output to 066. If they do not match in the pattern matching, the input signal 1065 is output as the signal 1066.

The selector 1019 outputs the signals 1065 and 1
066 is selected by the instruction of the CPU 1003. The output signal 1067 of the selector 1019 is the LUT 102 of the next stage.
Input to 0.

The LUT 1020 uses the input signal 1 according to the characteristics of the printer when outputting image information to the printer unit 2.
Convert 067.

The selector 1021 selects the output signal 1068 and the signal 1065 of the LUT 1020 according to an instruction from the CPU 1003. The output signal of the selector 1021 is input to the expansion circuit 1022 at the next stage.

The enlarging circuit 1022 can set the enlarging magnification independently in the X and Y directions according to an instruction from the CPU 1003. The expansion method is a first-order linear interpolation method. The output signal 1070 of the expansion circuit 1022 is input to the buffer 1010.

The signal 107 input to the buffer 1010
0 indicates a bidirectional signal 1057 according to an instruction from the CPU 1003.
Next, it is sent to the printer unit 2 via the connector 1001 and printed out.

The signal flow between the core section 10 and each section will be described below.

[Core part 10 based on information of fax part 4
Operation] The case of outputting information to the fax unit 4 will be described. The CPU 1003 communicates with the CPU 122 of the reader 1 via the communication IC 1002 and issues a document scan command. The reader unit 1 outputs the image information to the connector 120 when the scanner unit 104 scans the document according to this command. The reader unit 1 and the external device 3 are connected by a cable, and the information from the reader unit 1 is input to the connector 1001 of the core unit 10.
Also, the image information input to the connector 1001 passes through the multi-level 8-bit signal line 1057 and the buffer 101.
Input to 0. The buffer circuit 1010 inputs the bidirectional signal 1057 as a unidirectional signal to the filter 1011 via the signal line 1058 according to the instruction of the CPU. The filter 1011 filters the image information from the reader unit 1 according to the area size optimal for binarization. The relationship between the maximum filter size and binarization according to the present invention will be described in detail in the section of description of the fax unit 4. The output signal 1059 of the filter 1011 is input to the binarization circuit 1012 at the next stage. The binarization circuit 1012 converts the 8-bit multilevel signal 1059 into a binarized signal. The binarizing circuit 1012 converts the binarized signal into two multi-level signals such as 00H when it is 0 and FFH when it is 1. The output signal of the binarization circuit 1012 is input to the rotation circuit 1015 or the selector 1016 via the selectors 1013 and 1014. The output signal 1062 of the rotation circuit 1015 is also the selector 1016.
Is input to the selector 1016, and the selector 1016 selects either the signal 1061 or the signal 1062. Signal selection is CP
It is determined by the U1003 communicating with the fax unit 4 via the CPU bus 1054. Selector 1016
The output signal 1063 from is sent to the fax unit 4 via the connector 1005.

Next, the case of receiving information from the fax section 4 will be described.

The image information from the fax unit 4 is transmitted to the signal line 1064 via the connector 1005. The signal 1064 is input to the selector 1014 and the selector 1017. The printer unit 2 is instructed by the CPU 1003.
In the case of rotating and outputting the image at the time of receiving the fax, the rotating circuit 1015 rotates the signal 1064 input to the selector 1014. The output signal 1062 from the rotation circuit 1015 is the selector 1016 and the selector 1017.
Is input to the pattern matching 1018 via.

When the image at the time of fax reception is output to the printer 2 as it is according to the instruction of the CPU 1003,
The signal 1064 input to the selector 1017 is input to the pattern matching 1018.

The pattern matching 1018 has a function of smoothing rattling of an image when received by fax. The pattern-matched signal is sent to the selector 10
It is input to the LUT 1020 via 19. LUT10
In order to output the image received by fax to the printer unit 2 at a desired density, the density conversion table of the LUT 1020 can be changed by the CPU 1003. L
The output signal 1068 of the UT 1020 is the selector 1021.
It is input to the enlargement circuit 1022 via. Enlargement circuit 10
22 is an 8 bit having two values (00H, FFH)
Enlargement processing is performed on multivalues by a linear interpolation method of the first order. An 8-bit multivalued signal having many values from the expansion circuit 1022 is sent to the reader unit 1 via the buffer 1010 and the connector 1001. The reader unit 1 inputs this signal to the external I / F switching circuit 119 via the connector 120. The external I / F switching circuit 119 is used by the fax unit 4
The signal from is input to the Y signal generation / color detection circuit 113. The output signal from the Y signal generation / color detection circuit 113 is
After the processing as described above is performed, the image is output to the printer unit 2 and an image is formed on the output paper.

[Operation of Core Unit 10 Based on Information of File Unit 5] A case of outputting information to the file unit 5 will be described.

The CPU 1003 communicates with the CPU 122 of the reader unit 1 via the communication IC 1002 and issues a document scan command. The reader unit 1 causes the scanner unit 104 to scan the document according to this command,
The image information is output to the connector 120. The reader unit 1 and the external device 3 are connected by a cable, and the information from the reader unit 1 is input to the connector 1001 of the core unit 10. The image information input to the connector 1001 becomes a unidirectional signal 1058 by the buffer 1010. The signal 1058 which is a multi-valued 8-bit signal is the filter 1011.
Filter by the desired area size by. The output signal 1059 of the filter 1011 is the selector 101
3, input to the connector 1006 via the selector 1014 and the selector 1016.

That is, the binarization circuit 1012 and the rotation circuit 1
The 8-bit multi-value data is transferred to the file unit 5 without using the function of 015. When filing a binarized signal by communicating with the file unit 5 via the CPU bus 1054 of the CPU 1003, the functions of the binarization circuit 1012 and the rotation circuit 1015 are used. The binarization process and rotation process are the same as in the case of the fax described above, and will be omitted.

Next, the case of receiving information from the file section 5 will be described.

The image information from the file section 5 is the connector 1
The signal 1064 is input to either the selector 1014 or the selector 1017 via 006. It is possible to input to the selector 1017 in the case of 8-bit multi-valued filing and to the selector 1014 or 1017 in the case of binary filing. In the case of binary filing, description is omitted because it is the same processing as fax.

In the case of multi-value filing, the selector 10
The output signal 1065 from 17 is input to the LUT 1020 via the selector 1019. In the LUT 1020, a look-up table is created according to an instruction from the CPU 1003 in accordance with a desired print density. LUT1020
The output signal 1068 is input to the expansion circuit 1022 via the selector 1021. 8-bit multilevel signal 107 expanded to a desired expansion ratio by the expansion circuit 1022.
0 is sent to the reader unit 1 via the buffer 1010 and the connector 1001. The information in the file section sent to the reader section 1 is stored in the printer section 2 as in the fax described above.
And the image is formed on the output paper.

[Operation of Core Unit 10 Based on Information of Computer Interface Unit 7] The computer interface unit 7 interfaces with a computer connected to the external device 3. The computer interface unit 7 includes a plurality of interfaces for communicating with SCSI, RS232C, and Centronics. The computer interface unit 7 has the above-mentioned three types of interfaces, and information from each interface is stored in the connector 1007 and the data bus 1054.
Is sent to the CPU 1003 via. CPU 1003
Various controls are performed based on the contents sent.

[Core part 1 based on information from the formatter part 8]
Operation of 0] The formatter unit 8 has a function of expanding command data such as a document file sent from the computer interface unit 7 described above into image data. When the CPU 1003 determines that the data sent from the computer interface unit 7 via the data bus 1054 is the data related to the formatter unit 8, the CPU 1003 transfers the data to the formatter unit 8 via the connector 1008. The formatter unit 8 develops the transferred data in the memory as a meaningful image such as a character or a figure.

Next, a procedure for receiving information from the formatter unit 8 and forming an image on an output sheet will be described.

The image information from the formatter section 8 is transmitted as a multilevel signal having two values (00H, FFH) on the signal line 1064 through the connector 1008. The signal 1064 is the selector 1014 and the selector 10
17 is input. The selectors 1014 and 1017 are controlled by the instruction of the CPU 1003. Hereafter, the description is omitted because it is similar to the case of the above-mentioned fax.

[Operation of Core Unit 10 Based on Information of Image Memory Unit 9] A case of outputting information to the image memory unit 9 will be described.

The CPU 1003 communicates with the CPU 122 of the reader unit 1 via the communication IC 1002 and issues a document scan command. The reader unit 1 causes the scanner unit 104 to scan the document according to this command,
The image information is output to the connector 120. The reader unit 1 and the external device 3 are connected by a cable, and the information from the reader unit 1 is input to the connector 1001 of the core unit 10. The image information input to the connector 1001 is multivalued 8
It is sent to the filter 1011 via the bit signal line 1057 and the buffer 1010. The output signal 1059 of the filter 1011 is the selectors 1013, 1014, 10
16, image memory unit 9 via connector 1009
To the multivalued image information. The image information stored in the image memory unit 9 is stored in the CPU bus 1 of the connector 1009.
It is sent to the CPU 1003 via 054. CPU10
03 is the computer interface unit 7 described above.
The data sent from the image memory unit 9 is transferred to the. The computer interface section 7 has the above-mentioned 3
Transfer the data to the computer on the desired interface of the types of interfaces (SCSI, RS232C, Centronics).

Next, the case of receiving information from the image memory unit 9 will be described.

First, the computer interface section 7
Image information is sent from the computer to the core unit 10 via the. The CPU 1003 of the core unit 10 is a computer
When it is determined that the data sent from the interface unit 7 via the CPU bus 1054 is the data related to the image memory unit 9, it is transferred to the image memory unit 9 via the connector 1009. Next, the image memory unit 9
Is an 8-bit multilevel signal 106 via the connector 1009.
4 is transmitted to the selector 1014 and the selector 1017.
An output signal from the selector 1014 or the selector 1017 is output to the printer unit 2 according to an instruction from the CPU 1003, similarly to the above-described fax, and an image is formed on an output sheet.

<Description of Fax Unit 4> FIG. 5 is a block diagram showing the detailed arrangement of the fax unit 4.

The fax section 4 is connected to the core section 10 by the connector 400 and exchanges various signals. Core part 1
When the binary information from 0 is stored in any of the memories A405 to D408, the signal 453 from the connector 400 is input to the memory controller 404, and the memories A405 and B are controlled under the control of the memory controller.
406, memory C407, or memory D408,
Alternatively, it is stored in a cascade connection of two sets of memories.

The memory controller 404 is the CPU 41.
According to the instruction of No. 2, a mode for exchanging data with the memory A 405, the memory B 406, the memory C 407, the memory D 408 and the CPU bus 462, and a mode for exchanging data with the CODEC bus 463 of the CODEC 411 having an encoding / decoding function. , Memory A405, memory B406, memory C407, memory D408 contents D
The scaling circuit 403 is controlled by the MA controller 402.
Mode for exchanging data with the bus 454 from
A mode in which binary video input data 454 is stored in one of the memories A405 to D408 under the control of the timing generation circuit 409, and a mode in which the memories A405 to D4 are stored.
08 to read the memory contents from any of the signal lines 4
It has five functions of outputting to 52.

The memory A 405, the memory B 406, the memory C 407, and the memory D 408 each have 2 Mbytes.
And has an image storage capacity of 400 dpi and stores an image corresponding to A4 at a resolution of 400 dpi. The timing generation circuit 409 uses the connector 4
00 and the signal line 459, the core unit 10
Control signals from (HSYNC HEN, VSYNCVE
N), it generates signals to accomplish the following two functions: One is a function of storing the image signal from the core unit 10 in any one of the memories A405 to D408, or two memories, and the second is:
This is a function of reading an image signal from any one of the memories A405 to D408 and transmitting it to the signal line 452. The dual port memory 410 has a signal line 461.
The CPU 1003 of the core unit 10 is connected to the CPU 412 of the fax unit 4 via a signal line 462. Each CPU exchanges commands via the dual port memory 410. SCSI
The controller 413 interfaces with the hard disk connected to the fax unit 4 of FIG.
Accumulates data when fax is sent and received. The CODEC 411 reads out the image information stored in any of the memories A405 to D408, encodes the image information by a desired method of MH, MR, and MMR, and then encodes the encoded information in any of the memories A405 to D408. Memorize as. Also, the memory A405
-The encoded information stored in the memory D408 is read out and decoded by a desired method of the MH, MR, and MMR systems, and then stored in any of the memories A405 to D408 as the decoded information, that is, image information. . MO
The DEM 414 has a function of modulating the coded information from the hard disk connected to the CODEC 411 or the SCSI controller 413 in order to transfer it to the telephone line, and demodulates the information sent from the NCU 415 to convert it into coded information. , CODEC 411 or a hard disk connected to the SCSI controller 413 to transfer the encoded information. The NCU 415 exchanges information according to a predetermined procedure with an exchange that is directly connected to a telephone line and installed in a telephone office or the like.

In the fax transmission, one embodiment of the present invention will be described. The binary image signal from the reader unit 1 is input from the connector 400 and reaches the memory controller 404 through the signal line 453. The signal 453 is stored in the memory A 405 by the memory controller 404. The timing stored in the memory A 405 is generated by the timing generation circuit 409 according to the timing signal 459 from the reader unit 1. The CPU 412 connects the memory A 405 and the memory B 406 of the memory controller 404 to the bus line 463 of the CODEC 411. CO
The DEC 411 reads the image information from the memory A 405, encodes it by the MR method, and stores the encoded information in the memory B.
Write to 406. COD of A4 size image information
When the EC 411 encodes, the CPU 412 transfers the memory B 406 of the memory controller 404 to the CPU bus 462.
Connect to. The CPU 412 uses the encoded memory B4
Check the encoded information amount of 06. If the amount of encoded information is larger than a predetermined value, the CPU 412 determines that the binarized image information from the reader unit 1 is a natural image with many halftones, and the area of the filter 1011 in FIG. A command for increasing the size and a rescan request command for the reader unit 1 are written in the dual port memory 410 via the CPU bus 462. The CPU 1003 of the core unit 10
Filter 101 according to the command from fax unit 4
The area size of 1 is made larger than the area size at the time of normal character reading. In addition, a rescan request is issued to the CPU 122 of the reader unit 1 using the communication IC 1002.
The CPU1 signal 22 of the reader unit 1 rereads the same original document as the one previously scanned. The image information from the reader unit 1 is input to the buffer 1010 through the bidirectional video signal line 1057 of the core unit 10. The output signal 1058 from the buffer 1010 is converted to 5 by the next filter 1011.
Smoothing processing is performed according to the area size of * 5. After processing the output signal 1059 from the filter 1011,
The description is omitted because it is similar to the description of the core portion 10 described above. Core part 1
The binary image signal from 0 is input from the nectar 400 and reaches the memory controller 404 through the signal line 453. The signal 453 is stored in the memory A 405 by the memory controller 404. The encoding of the image information in the memory A 405 is the same as the above, and will be omitted.

The CPU 412 determines whether the image information from the reader 1 represents a character or a natural image, and the core unit 10
The area size of the filter 1011 is changed. CODE
The information encoded by C411 is sequentially read from the memory B406 by the CPU 412 and the MODEM41
Transfer to 4. MODEM 414 modulates the encoded information and sends the fax information over the telephone line over the NCU.

Next, an embodiment of fax reception will be described. The information sent from the telephone line is NCU4
15 and is connected to the fax section 4 by the NCU 415 according to a predetermined procedure. Information from NCU415 is MO
It enters the DEM 414 and is demodulated. CPU412 is CP
The information from the MODEM 414 is stored in the memory C407 via the U bus 462. Information of one screen is memory C40
Stored in memory 7, the CPU 412 controls the memory controller 404 to connect the data line 457 of the memory C407 to the line 463 of the CODEC 411. The CODEC 411 sequentially reads the encoded information in the memory C407 and decodes it, that is, stores it in the memory D408 as image information. The CPU 412 communicates with the CPU 1003 of the core unit 10 via the dual port memory 410, and makes settings for printing out an image from the memory D 408 through the core unit to the printer unit 2. When the setting is completed, the CPU 412 causes the timing generation circuit 4
09 is activated, and a predetermined timing signal is output from the signal line 460 to the memory controller. The memory controller 404 reads the image information from the memory D408 in synchronization with the signal from the timing generation circuit 409, transmits it to the signal line 452, and outputs it to the connector 400. Since the output from the connector 400 to the printer unit 2 has been described in the core unit, it is omitted.

<Explanation of File Unit 5> FIG. 6 is a block diagram showing the detailed structure of the file unit 5. The structure and operation will be described with reference to FIG.

The file section 5 is connected to the core section 10 by the connector 500 and exchanges various signals. The multi-valued input signal 551 is input to the compression circuit 503, where multi-valued image information is converted into compressed information and the memory controller 51.
It is output to 0. The output signal 552 of the compression circuit 503 is
The memory A 506 under the control of the memory controller 510,
It is stored in any one of the memory B 507, the memory C 508, and the memory D 509, or one in which two sets of memories are cascade-connected. The memory controller 510 is the CPU 5
16 instructions, memory A506, memory B507,
A mode for exchanging data with the memory C508, the memory D509 and the CPU bus 560, a mode for exchanging data with the CODEC bus 570 of the CODEC 517 for encoding / decoding, a memory A506 and a memory B5.
07, memory C508, memory D509 contents are DMA
The signal 563 is sent to the memory A under the control of the timing generation circuit 514 in a mode in which data is exchanged with the bus 562 from the scaling circuit 511 under the control of the controller 518.
It has five functions: a mode of storing in any of 506 to memory D509 and a mode of reading out memory contents from any of memory A506 to memory D509 and outputting to the signal line 558.

The memory A 506, the memory B 507, the memory C 508, and the memory D 509 each have 2 Mbytes.
And has an image storage capacity of 400 dpi and stores an image corresponding to A4 at a resolution of 400 dpi. The timing generation circuit 514 uses the connector 5
00 and the signal line 553, and the core unit 10
Control signals from (HSYNC HEN, VSYNCVE
N), it generates signals to accomplish the following two functions: One is a function of storing information from the core unit 10 in any one of the memories A506 to D509 or two memories, and a second is image information from any one of the memories A506 to D509. Is read out and transmitted to the signal line 556. The dual port memory 515 has a signal line 554.
Through the CPU 1003 of the core unit 10 and the signal line 56
It is connected to the CPU 516 of the file unit 5 via 0. Each CPU uses this dual port memory 515
Exchange commands via. The SCSI controller 519 interfaces with the external storage device 6 connected to the file unit 5 in FIG. The external storage device 6 is specifically composed of a magneto-optical disk, and stores data such as image information. The CODEC 517 reads the image information stored in any of the memories A506 to D509, encodes the image information by a desired method of the MH, MR, and MMR systems, and then encodes it into any of the memories A506 to D509. Store as information.
In addition, after the encoded information stored in the memories A506 to D509 is read out and decoded by a desired method of the MH, MR, and MMR methods, the decoded information, that is, an image, is stored in one of the memories A506 to D509. Store as information.

An embodiment of accumulating file information in the external storage device 6 will be described. The 8-bit multi-valued image signal from the reader unit 1 is input from the connector 500 and the signal line 55
It is input to the compression circuit 503 through 1. The signal 551 is
It is input to the compression circuit 503 and converted into compression information 552 here. The compression information 552 is stored in the memory controller 51.
Input to 0. The memory controller 510 uses the signal 553 from the core unit 10 to generate the timing generation circuit 55.
At 9, the timing signal 559 is generated, and the compressed signal 552 is stored in the memory A 506 according to this signal. CPU5
16 is the memory A 506 and the memory B 507 of the memory controller 510 and the bus line 57 of the CODEC 517.
Connect to 0. The CODEC 517 reads the compressed information from the memory A 506, encodes it by the MR method, and writes the encoded information in the memory B 507. CODEC 5
When 17 finishes the encoding, the CPU 516 transfers the memory B 507 of the memory controller 510 to the CPU bus 560.
Connect to. The CPU 516 sequentially reads the encoded information from the memory B 507 and the SCSI controller 51
Transfer to 9. The SCSI controller 519 stores the encoded information 572 in the external storage device 6.

Next, an embodiment for fetching information from the external storage device 6 and outputting it to the printer unit 2 will be described. Upon receiving the information retrieval / print command, the CPU 516
Receives the encoded information from the external storage device 6 via the SCSI controller 519 and transfers the encoded information to the memory C508. At this time, the memory controller 510 instructs the CPU bus 560 according to the instruction from the CPU 516.
Is connected to the bus 566 of the memory C508. Memory C5
When the transfer of the encoded information to 08 is completed, the CPU 516
By controlling the memory controller 510,
The memory C508 and the memory D509 are connected to the bus 570 of the CODEC 517. CODEC 517 is a memory C
After reading the encoded information from 508 and sequentially decoding,
Transfer to memory D509. If scaling such as enlargement / reduction is required when outputting to the printer unit 2, the memory D509
Is connected to the bus 562 of the scaling circuit 511 to scale the contents of the memory D509 under the control of the DMA controller 518. The CPU 516 communicates with the CPU 1003 of the core unit 10 via the dual port memory 515, and makes settings for printing out an image from the memory D509 to the printer unit 2 through the core unit 10. When the setting is completed,
The CPU 516 activates the timing generation circuit 514 and outputs a predetermined timing signal from the signal line 559 to the memory controller 510. Memory controller 5
10 reads the decoding information from the memory D509 in synchronization with the signal from the timing generation circuit 514 and transmits it to the signal line 556. The signal line 556 is the expansion circuit 5
04, where the information is decompressed. Expansion circuit 504
Output signal 555 of the core unit 10 via the connector 500.
Output to. The description up to the output from the connector 500 to the printer unit 2 will be omitted because it has been described in the core unit 10.

<Description of Computer Interface Unit 7> The computer interface unit 7 will be described with reference to FIG.

Connector A700 and connector B701
Is a connector for a SCSI interface. The connector C702 is a Centronics interface connector. The connector D703 is an RS232C interface connector. Connector E707
Is a connector for connecting to the core unit 10.

The SCSI interface has two connectors (connector A700, connector B701),
When connecting devices having a plurality of SCSI interfaces, connectors A700 and B701 are used to make a cascade connection. When the external device 3 and the computer are connected one-to-one, the connector A700 and the computer are connected by a cable, and the connector B701 is connected by a terminator, or the connector B701 and the computer are connected by a cable and the connector A700 is connected. Connect the terminator to. Information input from the connector A700 or the connector B701 is transmitted via the signal line 751 to the SCSI I / F-A704 or the SCSI I.
/ F-B708 is input. SCSI I / F-A7
04 or SCSI I / F-B708 is SCSI
Then, the data is output to the connector 707E via the signal line 754. The connector E707 is connected to the CPU bus 1054 of the core unit 10, and the CPU 1003 of the core unit 10 is the CPU
From the bus 1054, the information input to the SCSI I / F connector (connector A700, connector B701) is received. Data from the CPU 1003 of the core unit 10 is transferred to the SCSI connector (connector A700, connector B7
When outputting to 01), the procedure is the reverse of the above.

The Centronics interface is connected to the connector C702 and input to the Centronics I / F 705 via the signal line 752. The Centronics I / F 705 receives the data according to the procedure of the determined protocol, and outputs the data to the connector E707 via the signal line 754. The connector E707 is the core unit 1
0 is connected to the CPU bus 1054, and the core unit 10
The CPU 1003 receives the information input to the Centronics I / F connector (connector C702) from the CPU bus 1054.

The RS232C interface is connected to the connector D703 and is connected to the RS via the signal line 753.
It is input to the 232C I / F 706. RS232C
The I / F 706 receives data according to the procedure of a predetermined protocol, and the connector E is connected via the signal line 754.
Output to 707. The connector E707 is connected to the CPU bus 1054 of the core unit 10, and the C of the core unit 10 is connected.
From the CPU bus 1054 to the PU 1003, the RS 232
The information input to the C / I / F connector (connector D703) is received. Data from the CPU 1003 of the core unit 10 is transferred to the RS232C / I / F connector (connector D
When outputting to 703), the procedure is reversed.

<Description of Formatter Unit 8> FIG. 8 is a block diagram showing the configuration of the formatter unit 8. The configuration and operation of the formatter unit 8 will be described with reference to this figure.

The data from the computer interface unit 7 described above is discriminated by the core unit 10. If the data is related to the formatter unit 8, the core unit 1
The CPU 1003 of 0 has a connector 1008 of the core unit 10.
And the data from the computer is transferred to the dual port memory 803 via the connector 800 of the formatter unit 9. The CPU 809 of the formatter unit 8 receives the code data sent from the computer via the dual port memory 803. The CPU 809 sequentially develops the code data into image data and transfers the image data to the memory A 806 or the memory B 807 via the memory controller 808. Memory A80
6 and the memory B807 each have a capacity of 1 Mbytes and one memory (memory A806 or memory B8).
In 07), it is possible to support up to A4 paper size with a resolution of 300 dpi. In the case of supporting up to A3 size paper at a resolution of 300 dpi, the memory A806 and the memory B807 are cascade-connected to develop image data. The memory control described above is performed by the memory controller 808 according to an instruction from the CPU 809. Further, when it is necessary to rotate a character or a graphic when developing the image data, the memory A 806 is rotated after being rotated by the rotation circuit 804.
Alternatively, it is transferred to the memory B807. When the expansion of the image data in the memory A806 or the memory B is completed, C
The PU 809 controls the memory controller 808 to control the data bus line 858 of the memory A 806 or the memory B.
The data bus line 859 of 807 is connected to the output line 855 of the memory controller 808. Next CPU80
9 communicates with the CPU 1003 of the core unit 10 via the dual port memory 803 and sets a mode in which image information is output from the memory A 806 or the memory B 807. The CPU 1003 of the core unit 10 sets the print output mode in the CPU 122 using the communication function built in the CPU 122 of the reader unit 1 via the communication circuit 1002 in the core unit 10.

When the print output mode is set, the CPU 1003 of the core unit 10 activates the timing generation circuit 802 via the connector 1008 and the connector 800 of the formatter unit 8. Timing generation circuit 80
2 generates a timing signal for reading image information from the memory A 806 or the memory B 807 to the memory controller 808 according to the signal from the core unit 10. The image information from the memory A806 or the memory B807 is
It is input to the memory controller 808 via the signal line 858. Output image information from the memory controller 808 is transferred to the core unit 10 via the signal line 851 and the connector 800. The output from the core unit 10 to the printer unit has been described in the core unit 10 and will not be described.

<Description of Image Memory Unit 9> The configuration and operation of the image memory unit 9 will be described with reference to the configuration block diagram (FIG. 9).

The image memory section 9 is connected to the core section 10 by the connector 900 and exchanges various signals. The multi-valued input signal 954 is stored in the memory 904 under the control of the memory controller 905. Memory controller 90
5 is a memory 904 and CP according to the instruction of the CPU 906.
A signal 954 is stored in the memory 9 under the control of the timing generation circuit 902 in a mode for exchanging data with the U bus 957.
It has three functions: a mode for storing in memory 04 and a mode for reading out the memory contents from the memory 904 and outputting to the signal line 955. The memory 904 has a capacity of 32 Mbytes and stores an image corresponding to A3 with a resolution of 400 dpi and 256 gradations. Timing generation circuit 902
Are connected to the connector 900 by a signal line 952, and control signals (HSYNC HEN,
VSYNC VEN) to generate signals to accomplish the following two functions: One is the core part 1
The function of storing the information from 0 in the memory 904, and the second is to read the image information from the memory 904 and to output the signal line 9
It is a function to transmit to 55. Dual port memory 90
3 is the CPU 1 of the core unit 10 via the signal line 953.
003 and the image memory unit 9 via the signal line 957.
CPU 906 of is connected. Each CPU exchanges commands via the dual port memory 903.

Image information is stored in the image memory unit 9,
An example of transferring this information to a computer will be described. The 8-bit multi-valued image signal from the reader unit 1 is input from the connector 900 and input to the memory controller 905 via the signal line 954. Memory controller 9
In 05, the timing generation circuit 902 generates the timing signal 956 by the signal 952 from the core unit 10, and the signal 954 is stored in the memory 904 in accordance with this signal.
The CPU 906 is the memory 9 of the memory controller 905.
04 is connected to the CPU bus 957. CPU 906
Image information is sequentially read from the memory 904 and transferred to the dual port memory 903. CPU 1 of core unit 10
Reference numeral 003 denotes the image information of the dual port memory 903 of the image memory unit 9 in the signal line 953 and the connector 9
00, and transfers this information to the computer interface section 7. The transfer of information from the computer interface unit 7 to the computer is omitted because it has been described above.

Next, an embodiment for outputting the image information sent from the computer to the printer section 2 will be described. The image information sent from the computer is transferred to the core unit 10 via the computer interface unit 7.
Sent to. The CPU 1003 of the core unit 10 transfers image information to the dual port memory 903 of the image memory unit 9 via the CPU bus 1054 and the connector 1009. At this time, the CPU 906 is the memory controller 9
05 to connect the CPU bus 957 to the bus of the memory 904. The CPU 906 is a dual port memory 90.
3 to transfer the image information to the memory 904 via the memory controller 905. After transferring the image information to the memory 904, the CPU 906 controls the memory controller 905 to connect the data line of the memory 904 to the signal 955. The CPU 906 communicates with the CPU 1003 of the core unit 10 via the dual port memory 903, and makes settings for printing out an image from the memory 904 through the core unit 10 to the printer unit 2. When the setting is completed, the CPU 906 causes the timing generation circuit 90
2 is activated and a predetermined timing signal is output from the signal line 956 to the memory controller 905. The memory controller 905 reads the image information from the memory 904 in synchronization with the signal from the timing generation circuit 902, transmits it to the signal line 955, and outputs it to the connector 900. Since the output from the connector 900 to the printer unit 2 has been described in the core unit 10, the description thereof will be omitted.

[0082]

As described above, according to the present invention, it is possible to improve efficiency by controlling the amount of compressed data when converting multivalued information into binary information and compressing it, and performing image transmission. Image transmission can be performed.

[Brief description of drawings]

FIG. 1 is an overall view of an image forming apparatus.

FIG. 2 is a block diagram of a reader unit 1 and a printer unit 2.

FIG. 3 is a block diagram of an image processing unit in the reader unit 2.

FIG. 4 is a block diagram of a core unit 10.

FIG. 5 is a block diagram of the fax unit 4.

FIG. 6 is a block diagram of a file unit 5.

FIG. 7 is a block diagram of a computer interface unit 7.

FIG. 8 is a block diagram of a formatter unit 8.

FIG. 9 is a block diagram of an image memory unit 9.

[Explanation of symbols]

 1 reader section 2 printer section 3 external device 4 fax section 10 core section

Claims (1)

[Claims] 1. An image reading unit for reading information of an original as multivalued information, a filter unit for edge enhancing or smoothing the multivalued information from the image reading unit, and two sets of multivalued information from the filter unit. In an image processing apparatus having a binarization unit for converting into value information, a compression unit for compressing the binary information from the binarization unit, and a processing unit for processing the compression information from the compression unit, the compression of the compression unit An image processing apparatus comprising: a control unit that increases an area size of the filter unit when the amount of information is larger than a predetermined value.