JPH0774755A - Phase matching device for cell of active and standby system in atm communication system - Google Patents

Abstract

PURPOSE:To prevent disabic uninterruptible redundant changeover of transmission lines resulting from a deviated cell phase in both an active and a standby system when an idle cell is inserted in both the active and a standby system in an ATM cell format converter. CONSTITUTION:When an underflow of format conversion buffers 11A, 11B is detected by detection circuits 12A, 12B, its detection output is sent to other system. Idle cell insert control circuits 14A, 14B make idle cell command to idle cell insert circuits 13A, 13B of a concerned system to avoid a cell phase shift between both the systems when a detection output (idle cell insert command) is sent from the concerned system and other system.

Description

Detailed Description of the Invention

[0001]

The present invention relates to an ATM (Asynchr)
The present invention relates to an active backup dual system cell phasing device in an empty transfer mode communication system, and more particularly to a dual system cell phasing system at the time of instantaneously redundant switching of transmission lines in an ATM communication system.

[0002]

2. Description of the Related Art In an ATM communication system, SDH (Synchronous Digital) on a transmission line is used.
Hierarchy) A only in the payload part of the frame
When converting from the format in which TM cells are inserted (SDH frame structure) to the format in which ATM cells are inserted in the overhead part and payload part of SDH frame (full-spec ATM structure), in addition to the active system, a redundant system is used. A spare system is provided and both systems are switched and used as needed.

FIG. 3 shows CCITT Recommendation G.264. 7 shows a data frame structure on a transmission line according to 708. In FIG. 3, SOH is the section overhead (Sectio
nOverhead), STM-1 Payload is a payload part and a valid data part, and POH is a path overhead (Pass Overhead).

FIG. 4 shows a device block for receiving the data on the transmission line of the SDH frame structure shown in FIG. 3 and converting it into the format of the full-spec ATM structure.
It is composed of an active system A and a standby system B, and both systems have the same configuration.

Format conversion buffer 1 for both systems
1A, 11B, buffer underflow detection circuit 12A,
12B and empty cell insertion circuits 13A and 13B in the device, and outputs of both systems are appropriately selected and derived by the switching circuits 17 and 18.

Format conversion buffers 11A, 11
B is a data buffer for converting the SDH frame structure shown in FIG. 3 to the full-spec ATM structure, and the write control is performed according to the time chart shown in FIG. That is, since SOH and POH in the frame are not ATM cell data, they are not written in the buffers 11A and 11B. This period is indicated by T1 and T2.

Buffer underflow detection circuit 12A, 1
In 2B, since the reading speed of the buffers 11A and 11B is faster than that of writing, the data in the buffer is lost, so that state (underflow) is detected, and empty cells are inserted into the empty cell insertion circuits 13A and 13B. An insertion instruction signal is generated.

Incidentally, in FIG. 5, 19M SYSCLK
Is the system clock of 19MHz, 360KCP
Is a cell pulse of 360 KHz and indicates the head position of each cell.

[0009]

In this case, since empty cells are inserted independently between the active system and the standby system, if the path length difference between the active system and the standby system is different, the time axis In the above, the positions of SOH and POH are different from each other, and the underflow detection positions of the buffer are different. That is, as shown in FIG. 6A, the empty cell insertion positions are different between the two systems, and as a result, the cell phase shifts.

If the system is switched in this state, there is a disadvantage that the transmission line cannot be switched without interruption.

An object of the present invention is to provide an active spare dual system cell phase aligning device in an ATM communication system capable of eliminating non-instantaneous redundancy switching by eliminating cell phase shift of both systems due to insertion of empty cells.

[0012]

The active spare cell phasing device in the ATM communication system according to the present invention is provided in each of the active system and the standby system, and SDH on the transmission line is provided.
A format conversion buffer for converting from a format in which ATM cells are inserted only in the payload portion of a frame to a format in which ATM cells are inserted in the overhead portion and payload portion of an SDH frame in the device, and the active system. And an auxiliary system, each of which is provided with an underflow detecting means for detecting an underflow state of its own buffer, and an empty cell is inserted into an output of an own buffer provided in each of the working system and the standby system. Empty cell insertion means for doing so, and the empty cell insertion of the own system when at least one of the underflow detection means of the own system and the other system is provided in each of the working system and the standby system. Means for generating an empty cell insertion instruction to the means.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and the same portions as those in FIG. 3 are designated by the same reference numerals. Also in this example, the active system A and the standby system B have the same configuration,
In addition to the format conversion buffers 11A and 11B, the buffer underflow detection circuits 12A and 12B and the in-device empty cell insertion circuits 13A and 13B, in-device empty cell insertion control circuits 14A and 14B are further added.

The empty cell inserting circuits 14A, 14 in this apparatus
B is a buffer underflow detection circuit 12A, 1 of its own system.
In addition to the input of the empty cell insertion instruction signal from 2B, the empty cell insertion instruction signal from the buffer underflow detection circuits 12B and 12A of the other system is also input, and the OR (logical sum) condition of these two signals is input. It issues a vacant cell insertion command to the vacant cell insertion circuits 13A and 13B in the own system.

FIG. 2 is a time chart showing the operation of the block shown in FIG. In the active system, when the buffer underflow detection circuit 12A detects underflow of the buffer 11A (high level period), an empty cell insertion instruction is issued via the in-device empty cell insertion control circuit 14A. It is output to 13A. In response to this, the read clock (READ CLK) of the buffer 11A
Is prohibited during the effective cell period T4, and an empty cell is inserted in its place.

On the other hand, when an underflow of the buffer 11B is detected in the standby system, a buffer underflow detection circuit 11B of the standby system generates an empty cell insertion instruction signal, which is sent to the active system as well as the standby system. As a result, empty cells are inserted during the period T5 in FIG.

That is, when an underflow is detected in at least one of the systems, an empty cell is inserted in a cell portion corresponding to both systems in the system, and therefore, in FIG.
As shown in (B), the cell phases of both systems match. Therefore, there is no momentary interruption at any position.

[0019]

As described above, according to the present invention, empty cell insertion instruction signals are transmitted from the active system to the standby system and from the standby system to the active system so that empty cells are inserted simultaneously in both systems. Therefore, there is an effect that the cell phase shift in both systems can be avoided and the non-interruptive redundant switching of the transmission line can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a time chart showing the operation of the embodiment of the present invention.

FIG. 3 is a diagram showing an SDH frame structure.

FIG. 4 is a block diagram of an active standby system switching device in a conventional ATM communication system.

FIG. 5 is a time chart when the format conversion buffer is read.

6A is a diagram showing a cell phase state of a conventional device, FIG.
(B) is a diagram showing a cell phase state of the device according to the present invention.

[Explanation of symbols]

 A active system B standby system 11A, 11B format conversion buffer 12A, 12B buffer underflow detection circuit 13A, 13B device empty cell insertion circuit 14A, 14B device empty cell insertion control circuit 17, 18 switching circuit

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[Procedure amendment]

[Submission date] February 18, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction content]

[0012]

The active spare cell phasing device in the ATM communication system according to the present invention is provided in each of the active system and the standby system, and SDH on the transmission line is provided.
A format conversion buffer for converting from a format in which ATM cells are inserted only in the payload portion of a frame to a format in which ATM cells are inserted in the overhead portion and payload portion of an SDH frame in the device, and the active system. And an auxiliary system, each of which is provided with an underflow detecting means for detecting an underflow state of its own system buffer, and an empty cell is inserted into an output of the own system buffer provided with each of the working system and the standby system. Empty cell insertion means for performing the above-mentioned operation, and both of the underflow detection means of the own system and the other system provided in each of the active system and the standby system.
The output and output of each underflow of at least one
Means for generating an empty cell insertion instruction to the empty cell insertion means of its own system in response to the detection .

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Hiromi Ueda 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation

Claims (1)

[Claims] 1. An ATM is provided in each of a working system and a standby system, and an ATM is provided only in a payload portion of an SDH frame on a transmission path.
A format conversion buffer for converting a format in which cells are inserted into a format in which ATM cells are inserted in the overhead section and payload section of an SDH frame in the device, and in each of the working system and the standby system. Underflow detecting means provided for detecting the underflow state of each own system buffer, and empty cell inserting means for inserting an empty cell into the output of the own system buffer provided in each of the working system and the standby system. An empty cell provided in each of the active system and the standby system, and an empty cell for the empty cell insertion unit of the own system when at least one of the underflow detection unit of the own system and the other system detects an underflow. A means for generating an insertion instruction, and an active spare dual system cell phasing device in an ATM communication system.