JPH0774044A - Manufacture of laminated inductor - Google Patents

Manufacture of laminated inductor

Info

Publication number
JPH0774044A
JPH0774044A JP21728593A JP21728593A JPH0774044A JP H0774044 A JPH0774044 A JP H0774044A JP 21728593 A JP21728593 A JP 21728593A JP 21728593 A JP21728593 A JP 21728593A JP H0774044 A JPH0774044 A JP H0774044A
Authority
JP
Japan
Prior art keywords
insulating
conductive pattern
insulating layer
insulator
laminated inductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21728593A
Other languages
Japanese (ja)
Other versions
JP3159574B2 (en
Inventor
Noboru Mori
昇 毛利
Keiichi Nakao
恵一 中尾
Masayuki Mizuno
雅之 水野
Kunio Yamakawa
邦雄 山川
Shinya Matsutani
伸哉 松谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21728593A priority Critical patent/JP3159574B2/en
Publication of JPH0774044A publication Critical patent/JPH0774044A/en
Application granted granted Critical
Publication of JP3159574B2 publication Critical patent/JP3159574B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

PURPOSE:To form insulator layers on conductor patterns so as to be flat in such a way that the formation process of the insulating layers is simple and that a defect such as a pinhole or the like is not caused by a method wherein the insulator layers are formed in such a way that an insulator paste from a fine discharge port is coated and formed continuously in a belt shape inside a plurality of sections. CONSTITUTION:In a process in which insulator layers and conductor patterns are laminated and formed repeatedly, an insulator paste is discharged from a plurality of fine discharge ports in a belt shape in individual rows in a plurality of sections on an insulator sheet 50 having the plurality of sections by using a discharge device 40 provided with the individual discharge ports, and the insulator layers 51 which are belt-shaped are coated and formed continuously. Then, the insulator layers on the conductor patterns can be formed in such a way that the formation process of the insulator layers is simple and that a defect such as a pinhole or the like is not caused. Thereby, the conductor patterns whose definition is high can be printed and formed, the insulator layers whose number is many can be laminated, and it is possible to obtain the inductor whose yield is high, which is small and whose inductance value is large.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は小型電子機器の高密度実
装回路基板等への面実装用に用いられる積層インダクタ
ーの製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a laminated inductor used for surface mounting on a high density mounting circuit board of a small electronic device.

【0002】[0002]

【従来の技術】従来、この種の積層インダクターは、特
開昭60−100414号公報に記載されているように
また、図31(a)〜(d)に示すように複数のほぼ半
ターン分の導電パターン3を、複数の電気絶縁性または
絶縁化した印刷フェライト磁性体層4a,6a,8a,
10aを介在させながら印刷方式により形成し、導電パ
ターンの端部を連続的に接続し、上下層1a,21aと
中間の磁性体層4a,6a,8a,10aと導電パター
ン3は一体的な焼結体として形成されていた。
2. Description of the Related Art Heretofore, a laminated inductor of this kind has been disclosed in Japanese Patent Laid-Open No. 60-100414, and as shown in FIGS. Of the conductive pattern 3 of a plurality of electrically insulating or insulating printed ferrite magnetic layers 4a, 6a, 8a,
Formed by a printing method with 10a interposed, the end portions of the conductive patterns are continuously connected, and the upper and lower layers 1a, 21a and the intermediate magnetic material layers 4a, 6a, 8a, 10a and the conductive pattern 3 are integrally burned. It was formed as a unity.

【0003】更に、他の方法による積層インダクター
は、特開昭48−81057号公報、米国特許第376
5082号公報に記載されているようにドクターブレー
ド法や押出成形によって厚さ十数〜数十μmの複数のシ
ート状のフェライト磁性層(以下フェライトグリーンシ
ートという)を形成し、スルーホールを打抜き、導電パ
ターンを印刷し且つスルーホールに導体を充填し、全体
をスタックし、最後に焼成することにより積層インダク
ターを製造することが提案されている。
Further, a laminated inductor according to another method is disclosed in JP-A-48-81057 and US Pat. No. 376.
As described in Japanese Patent No. 5082, a plurality of sheet-shaped ferrite magnetic layers (hereinafter referred to as ferrite green sheets) having a thickness of several tens to several tens μm are formed by a doctor blade method or extrusion molding, and through holes are punched, It has been proposed to manufacture a laminated inductor by printing a conductive pattern and filling the through holes with a conductor, stacking the whole and finally firing.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記従
来の印刷方式による積層インダクターでは、フェライト
磁性体層を印刷によって形成するために印刷部分にピン
ホールが発生しやすく、フェライト磁性体層を挟んで上
下層に周回しているコイル用導電パターン間で短絡が発
生し、歩留りを悪くしている。
However, in the laminated inductor according to the above-mentioned conventional printing method, since the ferrite magnetic material layer is formed by printing, pinholes are easily generated in the printed portion, and the ferrite magnetic material layer is sandwiched between the laminated inductors. A short circuit occurs between the coil conductive patterns that circulate in the lower layer, which deteriorates the yield.

【0005】またピンホールを低減するためにフェライ
ト磁性体層の印刷を複数回行う方法もあるが、この場合
には所望の積層体を得るために非常に印刷回数が増えて
しまうという難点と、複数回の印刷によってフェライト
磁性体層の膜厚が厚くなりすぎて、磁性体層の縁端部を
介して導電パターンを印刷する際に、その厚い磁性体層
の縁端部において導電パターンが充分に印刷されずに断
線してしまうという課題があった。
There is also a method of printing the ferrite magnetic layer a plurality of times in order to reduce pinholes, but in this case, the number of times of printing is extremely increased in order to obtain a desired laminated body. When the conductive pattern is printed through the edge of the magnetic layer due to the thickness of the ferrite magnetic layer becoming too thick by printing multiple times, the conductive pattern is sufficient at the edge of the thick magnetic layer. There was a problem that the wire was not printed and was broken.

【0006】更に、磁性体層と導電パターンを交互に印
刷積層を繰り返すと、導電パターンの上部が盛り上が
り、積層数を多くする時、つまりインダクタンス値を大
きくする時に、高精度で歩留りの高い印刷形成ができな
いという課題があった。
Further, if the magnetic material layer and the conductive pattern are alternately printed and laminated, the upper part of the conductive pattern is raised, and when the number of laminated layers is increased, that is, when the inductance value is increased, the printing is formed with high precision and high yield. There was a problem that I could not do it.

【0007】一方、上記従来のグリーンシート方式の積
層インダクターの場合には、予めグリーンシートを用意
しスルーホールを打抜き、導電パターンを印刷し且つス
ルーホールに導体を充填し、全体をスタックして上下層
間の導体の接続を得る方法であるが、この方法ではスル
ーホールに導体を確実に充填するのが難しく、またグリ
ーンシートの積層時に導体間の接続の信頼性に欠けると
いう欠点を有していた。
On the other hand, in the case of the above-mentioned conventional green sheet type laminated inductor, a green sheet is prepared in advance, the through holes are punched out, the conductive patterns are printed and the conductors are filled in the through holes, and the whole is stacked up and down. This is a method of connecting conductors between layers, but this method has drawbacks that it is difficult to reliably fill the through holes with conductors, and the reliability of the connection between the conductors is poor when the green sheets are stacked. .

【0008】更に、導電パターンの形成されているグリ
ーンシートを積層すると、導電パターンの膜厚があるた
めに積層時に加熱加圧しても層間の密着性が悪く、また
絶縁体層内に圧縮むらによる圧縮ひずみが発生し、クラ
ックやデラミネーションや磁気特性の劣化等の品質不良
が多いという課題があった。
Further, when the green sheets on which the conductive patterns are formed are laminated, the adhesion between the layers is poor even if they are heated and pressed at the time of lamination due to the thickness of the conductive patterns, and due to uneven compression in the insulating layer. There is a problem that compressive strain occurs, and there are many quality defects such as cracks, delamination, and deterioration of magnetic properties.

【0009】更に、グリーンシートで積層体を構成する
場合、グリーンシートは単一材料で大きな面積を製造す
る方法としては優れているが、積層体の一部に異種材料
で複合化する時などは、グリーンシートを複数の材料で
形成する必要があり、非常に複雑で難度の高い工程とな
るなどの課題を有していた。
Further, when a laminated body is formed of green sheets, the green sheet is an excellent method for producing a large area with a single material, but when a part of the laminated body is compounded with different materials, However, there is a problem that the green sheet needs to be formed of a plurality of materials, which is a very complicated and difficult process.

【0010】本発明はこのような従来の課題を解決する
ものであり、絶縁体層の形成を簡潔でしかもピンホール
等の欠陥がなく、導電パターン上の絶縁体層の形成を平
坦に形成できるようにしたので、高精細度な導電パター
ンの印刷形成や多くの絶縁体層の積層が可能となり、更
に絶縁体層の縁端部の段差を小さくできるようにしたた
めに縁端部を介して導電パターンを印刷する際にも導電
パターンが断線しにくい歩留りの高い優れた積層インダ
クターの製造方法を提供することを目的とするものであ
る。
The present invention is to solve such a conventional problem, and the formation of the insulating layer is simple, and there are no defects such as pinholes, and the insulating layer on the conductive pattern can be formed flatly. As a result, it is possible to form a high-definition conductive pattern by printing and stack many insulator layers, and to reduce the step at the edge of the insulator layer so that the conductive layer can be formed through the edge. An object of the present invention is to provide a method for manufacturing an excellent laminated inductor, which has a high yield in which a conductive pattern is not easily broken even when a pattern is printed.

【0011】また、本発明は、更に絶縁体層に自由に異
種材料を形成できるので、適宜材料を選択することによ
って所望の周波数特性を実現することができるという優
れた積層インダクターの製造方法を提供することを目的
とするものである。
Further, according to the present invention, since a different material can be freely formed on the insulating layer, an excellent laminated inductor manufacturing method can be provided in which desired frequency characteristics can be realized by selecting an appropriate material. The purpose is to do.

【0012】[0012]

【課題を解決するための手段】上記課題を解決するため
に本発明は、絶縁体層と導電パターンを繰り返して積層
形成していく工程において、絶縁体層の形成を微細な吐
出口から絶縁体ペーストを複数区画内に連続的に帯状に
塗布形成したものである。更に本発明は、絶縁体シート
に帯状の凹凸状の段差を設け、この凹凸状の段差の大き
さを次工程の絶縁体層の塗布膜厚の約半分とすることに
より絶縁体層の縁端部の段差を小さくしたものである。
In order to solve the above-mentioned problems, the present invention provides a method of forming an insulator layer from a fine ejection port in a step of repeatedly forming an insulator layer and a conductive pattern in layers. The paste is continuously applied in a strip shape in a plurality of sections. Further, the present invention provides a strip-shaped uneven step on the insulating sheet, and the size of the uneven step is set to about half of the coating thickness of the insulating layer in the next step, whereby the edge of the insulating layer is reduced. The difference in level between the parts is small.

【0013】[0013]

【作用】したがって、本発明によれば、絶縁体層と導電
パターンを繰り返して積層形成していく工程において、
絶縁体層の形成を微細な吐出口から絶縁体ペーストを複
数区画内に連続的に帯状に塗布形成したので、絶縁体層
の形成工程が簡潔でしかもピンホール等の欠陥がなく、
導電パターン上の絶縁体層の形成を平坦に形成できるよ
うにしたので高精細度な導電パターンの印刷形成や多く
の絶縁体層の積層が可能となり、歩留りが高く小型でし
かも大きなインダクタンス値を得られる。
Therefore, according to the present invention, in the process of repeatedly laminating the insulating layer and the conductive pattern,
Since the insulating layer is formed by applying the insulating paste continuously in a strip shape from a fine discharge port in a plurality of sections, the insulating layer forming process is simple and there are no defects such as pinholes.
Since the insulating layer on the conductive pattern can be formed flatly, high-definition conductive pattern can be printed and many insulating layers can be stacked, resulting in high yield, small size, and large inductance value. To be

【0014】更に本発明によれば、絶縁体シートに帯状
の凹凸状の段差を設け、この凹凸状の段差の大きさを次
工程の絶縁体層の塗布膜厚の約半分としたので、絶縁体
層の縁端部の段差を小さくすることができ、導電パター
ンの形成でこの縁端部での断線不良が大幅に減少でき
る。
Further, according to the present invention, since the insulating sheet is provided with a band-shaped uneven step and the size of the uneven step is set to about half of the coating thickness of the insulating layer in the next step, The step difference at the edge of the body layer can be reduced, and the disconnection failure at the edge can be significantly reduced by forming the conductive pattern.

【0015】[0015]

【実施例】以下、本発明の実施例を図面を用いて詳しく
説明する。
Embodiments of the present invention will be described in detail below with reference to the drawings.

【0016】本発明において、絶縁体とは電気的絶縁性
の材料であり、本実施例においては特に低温焼結(10
00℃以下)の可能なアルミナ主体のガラス粉末の混合
された絶縁材料を用いるものとする。また磁性材料はF
23主体のNiO,ZnO,CuO系のフェライト磁
性材料を用いるものとする。
In the present invention, the insulator is an electrically insulating material, and in this embodiment, particularly low temperature sintering (10
It is assumed that an insulating material in which glass powder mainly composed of alumina is mixed, which is capable of being heated to 00 ° C or less), is used. The magnetic material is F
A NiO, ZnO, CuO-based ferrite magnetic material mainly composed of e 2 O 3 is used.

【0017】またこれらの絶縁材料あるいはフェライト
磁性材料をそれぞれメチルセルロース、ブチラール樹脂
等の公知の適宜のバインダー及び溶剤、可塑剤と混合・
混練してペースト化とする。更に、導体はAg−Pd,
Ag,Pd、その他の金属粉末とバインダーからなるペ
ーストを用い、印刷することにより形成できるが、本実
施例では金属粉末としてAgを用いた。
Further, these insulating materials or ferrite magnetic materials are respectively mixed with known appropriate binders such as methyl cellulose and butyral resin, solvents and plasticizers.
Knead to make a paste. Furthermore, the conductor is Ag-Pd,
Although it can be formed by printing using a paste composed of Ag, Pd, other metal powder and a binder, Ag is used as the metal powder in this embodiment.

【0018】図1〜図14は本発明の第1の実施例によ
る積層インダクターの積層工程及び構造を工程順によっ
て示し、(a)は平面図、(b)は断面図を示す。この
図の説明を簡略化するために1個の積層インダクターを
図示したものであるが、実際の実施例では図16のよう
に複数個が同時に印刷あるいは塗布が可能なように所定
の区画を定めている。図1〜図14に示す工程は図16
に示す1区画のP部分と理解されたい。
1 to 14 show a stacking process and a structure of a multilayer inductor according to a first embodiment of the present invention in the order of processes, (a) is a plan view and (b) is a sectional view. Although one laminated inductor is shown in order to simplify the explanation of this figure, in an actual embodiment, as shown in FIG. 16, a predetermined section is defined so that a plurality of plural inductors can be printed or coated at the same time. ing. The steps shown in FIGS.
It should be understood as the P part of one section shown in FIG.

【0019】まず図1(a),(b)のように絶縁体シ
ート1を用意する。この絶縁体シート1は前述の従来例
のようにドクターブレード法によってポリエステルフィ
ルム(以下PETという)上(図示せず)に絶縁体のグ
リーンシートを形成する。他の方法として、PET上に
絶縁体ペーストを印刷してもよいし、以下に説明する絶
縁体ペーストによって帯状の絶縁体を形成してもよい。
全面に均一にしかもスルーホールも必要ない場合はグリ
ーンシートを用いることが最適である。
First, an insulating sheet 1 is prepared as shown in FIGS. 1 (a) and 1 (b). In this insulator sheet 1, a green sheet of insulator is formed on a polyester film (hereinafter referred to as PET) (not shown) by the doctor blade method as in the above-mentioned conventional example. As another method, an insulator paste may be printed on PET, or a strip-shaped insulator may be formed from the insulator paste described below.
If the entire surface is uniform and no through holes are required, it is best to use a green sheet.

【0020】次に図2(a),(b)のように絶縁体シ
ート1の約半分の領域に絶縁体ペーストを塗布によって
絶縁体層2を乾燥後の膜厚(以下単に膜厚という)とし
て約30μmで形成した。更に詳しく説明すると図15
に示すような複数の微細な吐出口を有する吐出装置40
により、図17に示すように複数区画を有する絶縁体シ
ート50上に複数区画の各列毎に帯状に各吐出口より絶
縁体ペーストを吐出させ区画単位の約半分の領域が覆わ
れるように連続的に塗布形成される。この絶縁体層2の
形成によって、絶縁体シートの表面は帯状に凹凸状の段
差が発生する。
Next, as shown in FIGS. 2 (a) and 2 (b), a film thickness after the insulator layer 2 is dried by applying an insulator paste to an approximately half region of the insulator sheet 1 (hereinafter simply referred to as a film thickness). As about 30 μm. More specifically, FIG.
A discharge device 40 having a plurality of fine discharge ports as shown in FIG.
As a result, as shown in FIG. 17, on the insulating sheet 50 having a plurality of compartments, the insulating paste is ejected in a strip shape from each ejection port for each row of the plurality of compartments so that about half the area of each compartment is continuously covered. Is applied and formed. Due to the formation of the insulating layer 2, unevenness in a strip shape is generated on the surface of the insulating sheet.

【0021】次に図3(a),(b)のように、導体ペ
ーストによって導電パターン3を印刷し、約半ターンの
コイルを形成する。
Next, as shown in FIGS. 3A and 3B, the conductive pattern 3 is printed with a conductive paste to form a coil of about half a turn.

【0022】次に図4に(a),(b)に示すように、
導電パターン3の上にしかも前述の絶縁体層2のない領
域、つまり前述の帯状の凹部に絶縁体層4を膜厚として
約60μmで形成した。この絶縁体層4の形成方法は前
述の絶縁体層2と同様の方法によって帯状に連続的に塗
布形成した。ここで膜厚を60μmとしたのは、絶縁体
層2との段差を30μmに維持することと、絶縁性の信
頼性を得るためであり、例えば絶縁体層4の膜厚が30
μmで充分であれば、絶縁体層2の膜厚を15μmとす
れば、絶縁体層間1と2、あるいは2と4の段差はそれ
ぞれ15μmとすることが可能である。
Next, as shown in FIGS. 4 (a) and 4 (b),
The insulating layer 4 having a thickness of about 60 μm was formed on the conductive pattern 3 and in the region where the insulating layer 2 was absent, that is, in the above-mentioned band-shaped recess. The insulating layer 4 was formed by a method similar to that of the insulating layer 2 described above, so that the insulating layer 4 was continuously applied in a band shape. Here, the film thickness is set to 60 μm in order to maintain the step difference with the insulator layer 2 at 30 μm and to obtain the reliability of the insulating property. For example, the film thickness of the insulator layer 4 is 30 μm.
If the thickness of the insulating layer 2 is 15 μm, the step between the insulating layers 1 and 2 or 2 and 4 can be 15 μm if the thickness of the insulating layer 2 is 15 μm.

【0023】次に図5(a),(b)に示すように、絶
縁体層2,4の上に導電パターン3の一端と重なるよう
導電パターン5を印刷によって形成する。この時も絶縁
体層2,4間の凹凸状の段差が30μm程度なので、導
電パターン5は段差部でも印刷不良による断線は発生す
ることなく精度の高い印刷が可能である。
Next, as shown in FIGS. 5A and 5B, a conductive pattern 5 is formed on the insulating layers 2 and 4 by printing so as to overlap one end of the conductive pattern 3. Also at this time, since the uneven step between the insulating layers 2 and 4 is about 30 μm, the conductive pattern 5 can be printed with high accuracy without causing disconnection due to printing failure even in the step portion.

【0024】次に図6(a),(b)に示すように、導
電パターン3及び5の上に、しかも前述の絶縁体層2と
同位置で同形状にて同様の方法で絶縁体層6を膜厚も同
じく約60μmで形成した。
Next, as shown in FIGS. 6 (a) and 6 (b), the insulating layer is formed on the conductive patterns 3 and 5 at the same position as the insulating layer 2 and in the same shape by the same method. 6 was also formed with a film thickness of about 60 μm.

【0025】以上のような方法で、同様に図7(a),
(b)〜図11(a),(b)に示すように、絶縁体層
と導電パターンの形成を約半ターンずつ繰り返して、所
望のインダクタンスが得られるまで交互に積層を続け
る。図11(a),(b)においては、コイルパターン
の終端をもつ導電パターン11を示す。導電パターン1
1は、単位区画部の端部へ引き出されており、後に説明
する端面電極へ接続される。図3(a),(b)におけ
る導電パターン3も同様に端面電極へ接続されるように
単位区画部の端部へ引き出されており、この導電パター
ンはコイルパターンの始端となっている。
In the same manner as shown in FIG.
As shown in (b) to (a) and (b) of FIG. 11, the formation of the insulating layer and the conductive pattern is repeated for about half a turn, and the layers are alternately stacked until a desired inductance is obtained. 11A and 11B, the conductive pattern 11 having the end of the coil pattern is shown. Conductive pattern 1
1 is drawn out to the end of the unit partition and is connected to an end face electrode described later. Similarly, the conductive pattern 3 in FIGS. 3A and 3B is also drawn to the end of the unit partition so as to be connected to the end face electrode, and this conductive pattern is the starting end of the coil pattern.

【0026】次に図12(a),(b)に示すように、
導電パターン9,11の上に、しかも絶縁体層8と同位
置で同形状にて同様の方法で絶縁体層12を膜厚約30
μmで形成した。この絶縁体層12の塗布は、絶縁体層
8と10間の段差約30μmを埋めて平坦化するためで
ある。この絶縁体層12は省略しても次工程は製造可能
であるが、凹凸状の段差を大きくとった場合とか、より
品質の高い積層インダクターを得る場合には不可欠とな
る。
Next, as shown in FIGS. 12 (a) and 12 (b),
An insulating layer 12 having a thickness of about 30 is formed on the conductive patterns 9 and 11 in the same position and shape as the insulating layer 8 by the same method.
μm. The application of the insulator layer 12 is for filling the step difference of about 30 μm between the insulator layers 8 and 10 and planarizing it. Although this insulator layer 12 can be manufactured in the next step even if it is omitted, it is indispensable when a large uneven step is obtained or when a laminated inductor of higher quality is obtained.

【0027】積層工程の最終工程として、図13
(a),(b)に示すように、絶縁体シート21を絶縁
体シート1と同様の方法で製造し、導電パターン11、
絶縁体層12の上に積層し、加熱加圧して積層工程を終
了する。この時の絶縁体シートの膜厚は0.3mmのも
のを使用した。
As the final step of the laminating step, FIG.
As shown in (a) and (b), the insulating sheet 21 is manufactured by the same method as that of the insulating sheet 1, and the conductive pattern 11,
It is stacked on the insulator layer 12 and heated and pressed to complete the stacking process. At this time, an insulator sheet having a thickness of 0.3 mm was used.

【0028】次に図16の破線で示す複数の区画ライン
に従って、ダイシングソーあるいは鋭利なカッターで各
個片に切断し、PETから剥離する。剥離された積層体
は焼成炉に入れて絶縁体の所要焼成温度及び時間で処理
する。本実施例では、最高焼成温度を900℃とし、そ
の時間を2時間とした。得られた積層体はバレル研磨を
施し、次いで図14に示すように、導電パターン3と1
1が露出する側端面に導電パターンと同様の導電ペース
トを塗布し、適宜の温度で焼付けて膜状外部端子22と
した。別法として、公知のように膜状外部端子22は積
層体の焼成前に塗布し、膜状外部端子22と同時に焼成
してもよい。
Next, according to a plurality of division lines shown by broken lines in FIG. 16, each piece is cut with a dicing saw or a sharp cutter and peeled from PET. The peeled laminate is placed in a firing furnace and treated at the required firing temperature and time for the insulator. In this example, the maximum firing temperature was 900 ° C. and the time was 2 hours. The obtained laminated body was barrel-polished, and then, as shown in FIG.
A conductive paste similar to the conductive pattern was applied to the end face where 1 was exposed, and baked at an appropriate temperature to form the film-shaped external terminal 22. Alternatively, as is well known, the film-shaped external terminal 22 may be applied before baking the laminated body and baked simultaneously with the film-shaped external terminal 22.

【0029】図19(a)〜(d)には本発明の効果的
な絶縁層の塗布形成の一例を示している。図19(a)
は本実施例の図8の工程の平面図であり、図19(b)
はそのA−A′間の断面図であり、図19(c)は導電
パターン55上に絶縁体ペーストによって平坦な絶縁体
層51の形成を説明する概略図である。さらに、図19
(d)は従来例のように絶縁体層を印刷方式によって同
形状にて積層したときのA−A′間の断面図である。
FIGS. 19A to 19D show an example of effective coating formation of an insulating layer of the present invention. FIG. 19 (a)
FIG. 19B is a plan view of the process of FIG. 8 of the present embodiment, and FIG.
FIG. 19C is a cross-sectional view taken along the line AA ′, and FIG. 19C is a schematic view for explaining the formation of a flat insulator layer 51 on the conductive pattern 55 with an insulator paste. Furthermore, FIG.
(D) is a cross-sectional view taken along the line A-A 'when the insulating layers are laminated in the same shape by a printing method as in the conventional example.

【0030】本実施例のように、図19(c)に示すよ
うな微細な吐出口を絶縁体シート50の上に一定の高さ
hを保持しながら絶縁体シート50と導電パターン55
上を絶縁体ペーストを塗布すると、吐出口と導電パター
ン間の高さは導電パターンの膜厚のためにhよりも小さ
くなり、従って形成される絶縁体の膜厚も薄くなり、結
果的に絶縁体層は導電パターンの有無にかかわらず平坦
な形成が可能となるものである。
As in the present embodiment, the minute discharge ports as shown in FIG. 19C are held on the insulating sheet 50 at a constant height h, and the insulating sheet 50 and the conductive pattern 55 are formed.
When the insulating paste is applied on the top, the height between the discharge port and the conductive pattern becomes smaller than h due to the film thickness of the conductive pattern, and thus the film thickness of the formed insulator also becomes thin, resulting in insulation. The body layer can be formed flat with or without a conductive pattern.

【0031】図19(b)において、絶縁体層4,8が
平坦化された積層状態が実現されている。一方、従来例
においては絶縁体層の形成をスクリーン印刷等の印刷方
法で形成しているために、図19(d)に示すように、
導電パターンの有無にかかわらず印刷される全ての領域
にほぼ同じ膜厚で絶縁体層が形成されるために、導電パ
ターンのある上部の絶縁体層4,8は凸部ができ、更に
積層数が増えた場合には絶縁体層の凸部は一層大きくな
り次の導電パターンが形成不能な程になる。導電パター
ンの膜厚を設計上、更に厚くする必要がある場合には、
本発明による塗布による方法は平坦な絶縁体の形成が容
易であるために一層効果的となる。
In FIG. 19B, a laminated state in which the insulating layers 4 and 8 are flattened is realized. On the other hand, in the conventional example, since the insulator layer is formed by a printing method such as screen printing, as shown in FIG.
Since the insulating layer is formed with almost the same thickness in all the printed areas regardless of the presence or absence of the conductive pattern, the insulating layers 4 and 8 on the upper side having the conductive pattern have a convex portion, and the number of stacked layers is further increased. If the number of charges increases, the convex portion of the insulator layer becomes larger and the next conductive pattern cannot be formed. If it is necessary to increase the thickness of the conductive pattern by design,
The coating method according to the present invention is more effective because a flat insulator can be easily formed.

【0032】更に本実施例の絶縁体層2,4,6,8,
10,12の帯状の連続的な塗布方法の効率的な方法を
図18によって説明する。図17においては、帯状の絶
縁体層は各区画一列分毎の塗布を絶縁体ペーストの吐出
口の1ヶ所から塗布形成していた。しかし図18
(a),(b)に示すように、吐出口をやや幅広くし、
2列分に相当するように改造すれば、吐出口の1ヶ所か
ら同時に区画の2列分に塗布が可能となり、製造効率は
2倍となる。この時、導電パターンは各列毎に必要な絶
縁体層52が塗布されるようにパターンの向きを揃えて
おけば良いだけである。例えば図18(a),(b)に
示す帯状の絶縁体層52は図1〜図13で示す絶縁体層
2,6,10であり、帯状の絶縁体層53は図1〜図1
3で示す絶縁体層4,8,12に相当する。
Further, the insulating layers 2, 4, 6, 8, of the present embodiment
An efficient method of the strip-shaped continuous coating method of 10 and 12 will be described with reference to FIG. In FIG. 17, the strip-shaped insulating layer is formed by applying the coating for each row of each section from one position of the discharge port of the insulating paste. However, FIG.
As shown in (a) and (b), the discharge port is made slightly wider,
If it is modified so as to correspond to two rows, it is possible to apply from one location of the discharge port to two rows of partitions at the same time, and the production efficiency is doubled. At this time, the conductive patterns need only be arranged in the same direction so that the required insulating layer 52 is applied to each column. For example, the strip-shaped insulator layers 52 shown in FIGS. 18A and 18B are the insulator layers 2, 6 and 10 shown in FIGS. 1 to 13, and the strip-shaped insulator layers 53 are shown in FIGS.
This corresponds to the insulator layers 4, 8 and 12 indicated by 3.

【0033】本発明の第2の実施例について図20
(a),(b)と図1〜図14をもって説明する。本実
施例は前述の第1の実施例で詳述した絶縁体シート1に
凹凸状の段差を設けずに絶縁体層と導電パターンを交互
に形成し積層したものである。従って工程としては第1
の実施例において図2と図12で示す絶縁体層2,12
が省略された方法となっている。図20は図13に相当
する製造工程及び構造を示している。
FIG. 20 shows the second embodiment of the present invention.
This will be described with reference to (a) and (b) and FIGS. In this embodiment, the insulating sheet 1 described in detail in the first embodiment is formed by stacking the insulating layers and the conductive patterns alternately without providing uneven steps. Therefore, the first step
In the embodiment of FIG.
Has been omitted. 20 shows a manufacturing process and a structure corresponding to FIG.

【0034】この方法によれば、導電パターン5,9の
印刷形成の時に絶縁体層間の段差が第1の実施例と同様
の絶縁体層の膜厚であれば60μmと大きくなるために
導電パターン5,9の断線不良が多発することになる。
従って本実施例では、絶縁体層4,6,8,10の膜厚
は40μmで塗布形成した。
According to this method, when the conductive patterns 5 and 9 are formed by printing, the step difference between the insulating layers is as large as 60 μm if the thickness of the insulating layer is the same as in the first embodiment. 5 and 9 disconnection failures frequently occur.
Therefore, in this example, the insulating layers 4, 6, 8 and 10 were formed by coating with a thickness of 40 μm.

【0035】本発明のような吐出装置を使用した塗布方
法であれば、印刷形成のようなピンホールの発生もな
く、しかも1度の形成で欠陥のない絶縁体層の形成が可
能となった。この実施例においても、第1の実施例と同
様に導電パターン上の絶縁体層の形成が平坦に形成でき
るので品質の高い高積層のインダクタンスが可能となっ
た。
According to the coating method using the discharge device as in the present invention, it is possible to form a pinhole-free insulating layer without a defect such as printing. . Also in this embodiment, as in the case of the first embodiment, the insulating layer on the conductive pattern can be formed flat, so that high-quality and highly laminated inductance is possible.

【0036】本発明の第3の実施例について図21
(a),(b)をもって説明する。本実施例では第1の
実施例における絶縁体材料に透磁率の高いフェライト磁
性材料を用いた。その材料組成は、Fe23 49mol
%、NiO 10mol%、ZnO 30mol%、CuO 1
1mol%の磁性材料とした。製造方法は図1〜図14と
全く同様の工程で磁性体層と導電パターンを交互に積層
し、切断、焼成、端面電極を形成し、図21(a),
(b)に示すごとく磁性材料からなる積層インダクター
を得た。
FIG. 21 shows the third embodiment of the present invention.
This will be described with reference to (a) and (b). In this example, a ferrite magnetic material having a high magnetic permeability was used as the insulating material in the first example. The material composition is Fe 2 O 3 49 mol
%, NiO 10 mol%, ZnO 30 mol%, CuO 1
A magnetic material of 1 mol% was used. In the manufacturing method, magnetic layers and conductive patterns are alternately laminated in the same steps as in FIGS. 1 to 14, cutting, firing, and end face electrodes are formed.
As shown in (b), a laminated inductor made of a magnetic material was obtained.

【0037】実施例1と3のインダクタンス特性を図2
9に示す。実施例1のものは、インダクタンスは低いが
高周波帯域に使用が可能であり、また、実施例3のもの
は、100MHzまでの周波数帯域で高いインダクタン
スが得られることがわかる。
The inductance characteristics of Examples 1 and 3 are shown in FIG.
9 shows. It can be seen that Example 1 has a low inductance but can be used in a high frequency band, and Example 3 can obtain a high inductance in a frequency band up to 100 MHz.

【0038】本発明の第4の実施例について図22
(a),(b)をもって説明する。本実施例では前述第
3の実施例における磁性体層4a,6a,8a,10a
に替えて、透磁率は低いが高周波特性の優れたフェライ
ト磁性材料を用いて磁性体層4b,6b,8b,10b
を形成した。その材料組成は、Fe23 49mol%、N
iO 30mol%、ZnO 10mol%、CuO 11mol%
の磁性材料とした。製造方法は第3の実施例と全く同様
の工程で磁性体層と導電パターンを交互に積層し、切
断、焼成、端面電極を形成し、図22(a),(b)に
示すごとく2種の磁性材料からなる積層インダクターを
得た。本実施例の構成は様々な周波数特性をもつ磁性材
料を組み合わせることにより、積層インダクターとして
所望の周波数特性を得る場合に特に有効である。
FIG. 22 shows the fourth embodiment of the present invention.
This will be described with reference to (a) and (b). In this embodiment, the magnetic layers 4a, 6a, 8a and 10a in the third embodiment described above are used.
In place of the magnetic layer 4b, 6b, 8b, 10b using a ferrite magnetic material having a low magnetic permeability but excellent high frequency characteristics.
Was formed. The material composition is Fe 2 O 3 49 mol%, N
iO 30mol%, ZnO 10mol%, CuO 11mol%
Of magnetic material. In the manufacturing method, magnetic layers and conductive patterns are alternately laminated in the same steps as those in the third embodiment, and cutting, firing, and end face electrodes are formed, and two kinds are prepared as shown in FIGS. 22 (a) and 22 (b). A laminated inductor made of the magnetic material described above was obtained. The configuration of the present embodiment is particularly effective in obtaining desired frequency characteristics as a laminated inductor by combining magnetic materials having various frequency characteristics.

【0039】本発明の第5の実施例について図23
(a),(b)をもって説明する。本実施例では前述第
3の実施例における磁性体層4a,8aに替えて、透磁
率は低いが高周波特性の優れたフェライト磁性材料を用
いて磁性体層4b,8bを形成した。製造方法は第3の
実施例と全く同様の工程で磁性体層と導電パターンを交
互に積層し、図23(a),(b)に示すごとく2種の
磁性材料からなる積層インダクターを得た。
FIG. 23 shows the fifth embodiment of the present invention.
This will be described with reference to (a) and (b). In this example, instead of the magnetic layers 4a and 8a in the third example, the magnetic layers 4b and 8b were formed by using a ferrite magnetic material having a low magnetic permeability but excellent high frequency characteristics. In the manufacturing method, magnetic layers and conductive patterns are alternately laminated in the same steps as in the third embodiment to obtain a laminated inductor composed of two kinds of magnetic materials as shown in FIGS. 23 (a) and 23 (b). .

【0040】本実施例の構成は第4の実施例と同様の特
性上の効果が得られるもので、様々な周波数特性をもつ
磁性材料を組み合わせることにより、積層インダクター
として所望の周波数特性を得る場合に特に有効であり、
高周波帯域のノイズ除去にも大変優れたものとなる。
The structure of the present embodiment has the same characteristic effect as that of the fourth embodiment. When a desired frequency characteristic is obtained as a laminated inductor by combining magnetic materials having various frequency characteristics. Is especially effective for
It is also very good at removing noise in the high frequency band.

【0041】本実施例の特性について図30に示す。図
中の比較データである磁性材料aは磁性材料に全て高透
磁率材料を用いた実施例3の特性であり、また磁性材料
bは磁性材料に全て透磁率は低いが高周波数特性の優れ
た磁性材料を用いた場合の特性である。
The characteristics of this embodiment are shown in FIG. The magnetic material a, which is the comparative data in the figure, has the characteristics of Example 3 in which a high magnetic permeability material is used for all the magnetic materials, and the magnetic material b has all the magnetic materials having low magnetic permeability but excellent high frequency characteristics. This is a characteristic when a magnetic material is used.

【0042】本実施例の変形例として図24(a),
(b)に示す。本発明の特徴の1つとして吐出装置より
任意の膜厚で帯状の連続的な絶縁体層が得られることで
あるから、図24(a),(b)に示す磁性体層1a,
21aについても帯状の2種の磁性体層で容易に形成で
き磁性体層1a,1b,21a,21bとすることがで
きる。つまり積層体の磁束の通る方向で同質の材料にな
るように、約半分ずつ2種の磁性材料で形成したもので
ある。
As a modified example of this embodiment, as shown in FIG.
It shows in (b). One of the features of the present invention is that a strip-shaped continuous insulating layer having an arbitrary film thickness can be obtained from the discharging device. Therefore, the magnetic layer 1a shown in FIGS.
Also, 21a can be easily formed by two kinds of strip-shaped magnetic material layers to form the magnetic material layers 1a, 1b, 21a and 21b. That is, it is formed of two kinds of magnetic materials, each of which is about half each, so that the same material is formed in the direction in which the magnetic flux of the laminated body passes.

【0043】この方法によれば、磁性材料aとbの磁気
特性を加えたものが積層体の磁気特性になるので、所望
の周波数特性を得るためには磁性材料aとbを選択する
だけで容易に品質の高いものが得られる。この例では磁
性体層を2種の材料で形成したが、所望の周波数特性に
よっては帯状磁性体の材料を3種、4種と増やし、その
時の塗布方法は吐出口のサイズを細くして1ラインに相
当する帯状ラインを例えば2ラインにしてそれぞれの材
料で形成することによって、積層体が3種、4種の異種
材料で構成できる。
According to this method, the magnetic characteristics of the laminated body are obtained by adding the magnetic characteristics of the magnetic materials a and b. Therefore, in order to obtain a desired frequency characteristic, it is only necessary to select the magnetic materials a and b. You can easily obtain high quality products. In this example, the magnetic material layer was formed of two kinds of materials, but the material of the band-shaped magnetic material was increased to three kinds and four kinds depending on the desired frequency characteristic, and the application method at that time was to reduce the size of the ejection port to 1 By forming the strip-shaped lines corresponding to the lines into, for example, two lines and forming them with the respective materials, the laminated body can be formed with three or four kinds of different materials.

【0044】本発明の第6の実施例について図25
(a),(b)、図26(a),(b)をもって説明す
る。本実施例では直流重畳特性を改善するために、磁路
の一部に非磁性体層を形成した例を本発明の製造方法に
従って構成したものである。図25(a),(b)では
導電パターンを挟んだ最上層21、最下層1を非磁性体
の絶縁材料で形成し、内部の絶縁体層4a,6a,8
a,10aをフェライト磁性材料によって形成したもの
である。
FIG. 25 shows the sixth embodiment of the present invention.
This will be described with reference to (a), (b) and FIGS. 26 (a), (b). In this embodiment, an example in which a non-magnetic layer is formed in a part of the magnetic path is formed according to the manufacturing method of the present invention in order to improve the DC superposition characteristic. In FIGS. 25A and 25B, the uppermost layer 21 and the lowermost layer 1 sandwiching the conductive pattern are formed of a nonmagnetic insulating material, and the inner insulating layers 4a, 6a, 8 are formed.
a and 10a are formed of a ferrite magnetic material.

【0045】図26(a),(b)では内部の磁性体層
の一部の層2,4を非磁性材料で形成したものである。
この非磁性材料は第1の実施例で使用したアルミナ主体
のガラス粉末の混合された絶縁材料である。これらの例
はいずれも開磁路構成にしたものであるから、インダク
タンス値は低くなるが直流重畳特性の優れたものが得ら
れる。
In FIGS. 26 (a) and 26 (b), some layers 2 and 4 of the internal magnetic layer are formed of a non-magnetic material.
This non-magnetic material is an insulating material in which glass powder mainly containing alumina used in the first embodiment is mixed. Since each of these examples has an open magnetic circuit configuration, an inductance value is low, but an excellent DC superposition characteristic can be obtained.

【0046】本発明の第7の実施例について図27
(a),(b)をもって説明する。本実施例ではコイル
パターン始端3a及び終端11aと膜状外部端子22間
の接続抵抗を小さくし、積層インダクターの直流抵抗分
をより小さくしたものである。コイルパターン始端3a
と膜状外部端子22間の接続抵抗を小さくするために、
図3においた導電パターン3を印刷形成した後に、更に
導電パターン3の膜状外部端子側に相当する一部のパタ
ーンを印刷することで膜厚を厚くしたものである。
FIG. 27 shows the seventh embodiment of the present invention.
This will be described with reference to (a) and (b). In this embodiment, the connection resistance between the coil pattern starting end 3a and the terminal end 11a and the film-like external terminal 22 is reduced, and the direct current resistance of the laminated inductor is further reduced. Coil pattern start end 3a
In order to reduce the connection resistance between the film-shaped external terminal 22 and
After the conductive pattern 3 shown in FIG. 3 is formed by printing, a part of the pattern corresponding to the film-shaped external terminal side of the conductive pattern 3 is further printed to increase the film thickness.

【0047】またコイルパターン終端8aと膜状外部端
子22間の接続抵抗を小さくするために、図11におい
て導電パターン11を印刷形成した後に、更に導電パタ
ーン11の膜状外部端子側に相当する一部のパターンを
印刷することで膜厚を厚くしたものである。
Further, in order to reduce the connection resistance between the coil pattern end 8a and the film-shaped external terminal 22, after the conductive pattern 11 is formed by printing in FIG. 11, one corresponding to the film-shaped external terminal side of the conductive pattern 11 is further formed. The film thickness is increased by printing the pattern of the part.

【0048】従来、一部のパターンのみ膜厚をより厚く
する場合には、絶縁体層と導電パターン間の膜厚による
段差が大きくなり、次工程での絶縁体層の形成で空隙が
発生したり、印刷不良によるピンホールが発生したり品
質上課題が多かったが、本発明によれば第1の実施例で
詳述したように、絶縁体層の形成が塗布によって形成で
きるので平坦に形成することができ前述の如く品質上の
課題はなく、良質で直流抵抗の小さい積層インダクター
を得ることができる。
Conventionally, when the film thickness of only a part of the patterns is made thicker, the step due to the film thickness between the insulating layer and the conductive pattern becomes large, and voids are generated in the formation of the insulating layer in the next step. In addition, although there were many problems in terms of quality such as pinholes due to defective printing, according to the present invention, as described in detail in the first embodiment, since the insulating layer can be formed by coating, it can be formed flat. As described above, there is no problem in quality, and it is possible to obtain a laminated inductor of good quality and low DC resistance.

【0049】本発明の第8の実施例について図28をも
って説明する。本実施例では導電パターンの形成におい
て図28に示すような溶射装置41によって形成したも
のである。導電パターンは、絶縁体シート50の上に所
望の金属マスク42を密着搭載し、溶射装置41のノズ
ル部よりAg等の金属溶融物を金属マスク42方向に吹
き付けるものである。これによって短時間で溶射金属導
体部43が前述の実施例によるコイルパターンと同様の
形状の金属導体皮膜が得られる。
The eighth embodiment of the present invention will be described with reference to FIG. In this embodiment, the conductive pattern is formed by the thermal spraying device 41 as shown in FIG. The conductive pattern is formed by closely mounting a desired metal mask 42 on the insulating sheet 50, and spraying a metal melt such as Ag from the nozzle portion of the thermal spraying device 41 toward the metal mask 42. As a result, in a short time, the sprayed metal conductor portion 43 can obtain a metal conductor film having the same shape as the coil pattern according to the above-described embodiment.

【0050】溶射金属導体部43は容易に導体膜厚も大
きく得ることができ、しかも導体抵抗も小さいものが得
られるので、積層インダクターの直流抵抗分を小さくす
ることに大変有効である。本実施例の製造工程は、第1
の実施例に対して導電パターンの形成方法が異なるだけ
で、他の製造方法は全て同じである。
Since the sprayed metal conductor portion 43 can easily have a large conductor film thickness and a small conductor resistance, it is very effective in reducing the direct current resistance of the laminated inductor. The manufacturing process of this embodiment is the first
The method of forming the conductive pattern is different from that of Example 1, and the other manufacturing methods are the same.

【0051】以上のように、本発明を若干の例について
説明したが、本発明の範囲で多くの変形例が可能である
ことは明らかである。例えば、アルミナ基板やフェライ
ト基板の上に前述の実施例で説明した方法で積層体を形
成することも可能であるし、更に被形成物によっては複
数の吐出口の形成をそれぞれ被形成物に対応して異なる
ものにしてもよい。
As described above, the present invention has been described with respect to some examples, but it is obvious that many modifications are possible within the scope of the present invention. For example, it is possible to form a laminated body on the alumina substrate or the ferrite substrate by the method described in the above-mentioned embodiment. Further, depending on the object to be formed, the formation of a plurality of ejection ports corresponds to the object to be formed. And may be different.

【0052】また絶縁体シートの凹凸の形成方法におい
て、前述の実施例では平坦な絶縁体シートの上に次いで
帯状の絶縁体層を形成することで凹凸を設けたが、別法
としては、平坦な絶縁体シートをダイシングソー等でシ
ートの一部を帯状に研削することによっても形成できる
し、あるいは金型によって絶縁体シートを帯状に加熱加
圧することによっても凹凸を設けることができる。
In the method of forming the unevenness of the insulating sheet, the unevenness is provided by forming a strip-shaped insulating layer on the flat insulating sheet in the above-mentioned embodiment. Such an insulating sheet can be formed by grinding a part of the sheet into a strip shape with a dicing saw or the like, or the unevenness can be provided by heating and pressing the insulating sheet into a strip shape with a mold.

【0053】更に、本実施例では導電パターンの形成を
約半ターンの渦巻き状コイルパターンで印刷形成した
が、積層体の面積に余裕があれば約1.5ターンあるい
は約2.5ターンの渦巻き状コイルパターンで構成する
ことも可能である。
Further, in the present embodiment, the conductive pattern is formed by printing with a spiral coil pattern of about half turn, but if there is a margin in the area of the laminated body, about 1.5 turns or about 2.5 turns of the spiral pattern are formed. It is also possible to form a coil pattern.

【0054】本発明の帯状絶縁体層の形成に用いた絶縁
体ペーストの吐出装置は一般に様々な用途に利用されて
いるディスペンサーや描画装置あるいはダイコータ等を
用いることができるが、これらの装置に限定されるもの
でもない。
The discharging device of the insulating paste used for forming the strip-shaped insulating layer of the present invention may be a dispenser, a drawing device, a die coater or the like which is generally used for various purposes, but is limited to these devices. It is not something that will be done.

【0055】なお本発明では積層インダクターに関して
詳述したが、インダクターとは単一コイルに限らず、複
数のコイルからなるトランス型のものも含まれると理解
されたい。
Although the present invention has been described in detail with respect to the laminated inductor, it should be understood that the inductor is not limited to a single coil, but may include a transformer type having a plurality of coils.

【0056】[0056]

【発明の効果】本発明は上記実施例より明らかなよう
に、絶縁体シート上の複数区画内に、絶縁体層と導電パ
ターンを繰り返して積層形成していく工程において、絶
縁体層の形成を複数の微細な吐出口から絶縁体ペースト
を複数区画内に連続的に帯状に塗布形成したものであ
り、絶縁体層の形成工程が簡潔でしかもピンホール等の
欠陥がなく、膜厚の厚い導電パターン上の絶縁体層の形
成を平坦に形成できるようにしたので高精細度な導電パ
ターンの印刷形成や多くの絶縁体層の積層が可能とな
り、歩留りが高く小型で直流抵抗が小さくしかも大きな
インダクタンス値を得られるという効果を有する。
As is apparent from the above-described embodiment, the present invention can form an insulating layer in a process of repeatedly laminating and forming an insulating layer and a conductive pattern in a plurality of sections on an insulating sheet. This is a continuous strip-shaped coating of insulating paste from multiple fine outlets, which makes the insulating layer formation process simple and free from defects such as pinholes, and thick conductive film. Since the insulator layer on the pattern can be formed flatly, it is possible to print a highly precise conductive pattern and stack many insulator layers, resulting in high yield, small size, small DC resistance and large inductance. It has the effect of obtaining a value.

【0057】更に、絶縁体シートに帯状の凹凸状の段差
を設け、この凹凸状の段差の大きさを次工程の絶縁体層
の塗布膜厚の約半分としたものであり、導電パターンの
形成でこの縁端部での断線不良が大幅に減少できるとい
う効果を有する。
Further, a band-shaped uneven step is provided on the insulating sheet, and the size of the uneven step is about half of the coating thickness of the insulating layer in the next step, and the conductive pattern is formed. Therefore, there is an effect that the disconnection failure at the edge portion can be significantly reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の積層インダクターの製造方法の一実施
例における第1の工程の説明図
FIG. 1 is an explanatory view of a first step in one embodiment of the method for manufacturing a laminated inductor of the present invention.

【図2】同第2の工程の説明図FIG. 2 is an explanatory diagram of the second step.

【図3】同第3の工程の説明図FIG. 3 is an explanatory view of the third step.

【図4】同第4の工程の説明図FIG. 4 is an explanatory diagram of the same fourth step.

【図5】同第5の工程の説明図FIG. 5 is an explanatory view of the fifth step.

【図6】同第6の工程の説明図FIG. 6 is an explanatory view of the sixth step.

【図7】同第7の工程の説明図FIG. 7 is an explanatory diagram of the seventh step.

【図8】同第8の工程の説明図FIG. 8 is an explanatory diagram of the eighth step.

【図9】同第9の工程の説明図FIG. 9 is an explanatory diagram of the ninth step.

【図10】同第10の工程の説明図FIG. 10 is an explanatory diagram of the tenth step.

【図11】同第11の工程の説明図FIG. 11 is an explanatory diagram of the eleventh step.

【図12】同第12の工程の説明図FIG. 12 is an explanatory diagram of the 12th step.

【図13】同第13の工程の説明図FIG. 13 is an explanatory diagram of the thirteenth step.

【図14】同第14の工程の説明図FIG. 14 is an explanatory diagram of the fourteenth step.

【図15】同絶縁体層を形成する状態を示す説明図FIG. 15 is an explanatory diagram showing a state in which the insulator layer is formed.

【図16】同複数区画を有する絶縁体シートを示す平面
FIG. 16 is a plan view showing an insulator sheet having the same plurality of sections.

【図17】同じく複数区画を有する絶縁体シート上に帯
状の絶縁体層を形成した状態の平面図
FIG. 17 is a plan view showing a state where a strip-shaped insulating layer is formed on an insulating sheet which also has a plurality of sections.

【図18】同じく絶縁体層を2列分同時に塗布形成した
状態の平面図
FIG. 18 is a plan view of a state where two rows of insulating layers are simultaneously applied and formed.

【図19】同方法により平坦化されて形成される積層イ
ンダクターと従来の積層インダクターの例を示す説明図
FIG. 19 is an explanatory view showing an example of a laminated inductor formed by flattening by the same method and a conventional laminated inductor.

【図20】本発明の他の実施例を示す説明図FIG. 20 is an explanatory view showing another embodiment of the present invention.

【図21】同じく他の実施例の説明図FIG. 21 is an explanatory diagram of another embodiment of the present invention.

【図22】同じく他の実施例の説明図FIG. 22 is an explanatory diagram of another embodiment of the same.

【図23】同じく他の実施例の説明図FIG. 23 is an explanatory diagram of another embodiment of the present invention.

【図24】同じく他の実施例の説明図FIG. 24 is an explanatory view of another embodiment.

【図25】同じく他の実施例の説明図FIG. 25 is an explanatory view of another embodiment of the present invention.

【図26】同じく他の実施例の説明図FIG. 26 is an explanatory view of another embodiment of the present invention.

【図27】同じく他の実施例の説明図FIG. 27 is an explanatory view of another embodiment of the present invention.

【図28】同じく他の実施例における溶射による導電パ
ターンの形成を示す説明図
FIG. 28 is an explanatory view showing formation of a conductive pattern by thermal spraying in another example.

【図29】本発明における積層インダクターのインダク
タンス特性図
FIG. 29 is an inductance characteristic diagram of the laminated inductor according to the present invention.

【図30】同じくインダクタンス特性図[FIG. 30] Similarly, an inductance characteristic diagram

【図31】従来における積層インダクターの製造方法に
おけるある工程の説明図
FIG. 31 is an explanatory view of a certain step in the conventional method for manufacturing a laminated inductor.

【符号の説明】[Explanation of symbols]

1 絶縁体シート 2,4,6,8,10,12 絶縁体層 3,5,7,9,11 導電パターン 21 絶縁体シート 22 膜状外部端子 40 吐出装置 41 溶射装置 42 金属マスク 43 溶射金属導体部 50 複数区画を有する絶縁体シート 51,52,53 帯状の絶縁体層 55 導電パターン 1 Insulator Sheet 2, 4, 6, 8, 10, 12 Insulator Layer 3, 5, 7, 9, 11 Conductive Pattern 21 Insulator Sheet 22 Membrane External Terminal 40 Discharge Device 41 Spraying Device 42 Metal Mask 43 Spraying Metal Conductor part 50 Insulator sheet 51 having a plurality of compartments 51, 52, 53 Band-shaped insulator layer 55 Conductive pattern

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山川 邦雄 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 松谷 伸哉 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kunio Yamakawa 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Shinya Matsutani, 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 第1の絶縁体シート上の複数区画内に同
一形状の第1の導体パターンをそれぞれ印刷し、次いで
第1の導電パターンの一端を残して第1の導電パターン
上に複数区画内を連続的に第1の絶縁体層を微細な吐出
口から絶縁体ペーストを帯状に塗布し、その後第2の導
電パターンをその一端を前記第1の導電パターンと接続
するように前記絶縁体層上に印刷し、次いで第2の導電
パターンの他端を残して第2の導電パターン上で、また
第1の帯状の絶縁体層の間に複数区画内を連続的に第2
の絶縁体層を微細な吐出口から絶縁体ペーストを帯状に
塗布し、以下導電パターンを、この導電パターンが積層
方向に重畳するようにして同様の工程を所定回数行い、
最終に最上層に絶縁体シートを全面に形成し、こうして
得られた積層体を各区画に切断し、これら切断された単
位の積層体を高温で焼成して焼結体とし、焼結体の端面
に露出された前記導電パターンの始端と終端とにそれぞ
れ接続する膜状外部端子を前記側端面に形成する積層イ
ンダクターの製造方法。
1. A first conductor pattern having the same shape is printed in each of a plurality of sections on a first insulator sheet, and then a plurality of sections are formed on the first conductive pattern while leaving one end of the first conductive pattern. The first insulating layer is continuously applied to the inside of the insulating paste in a strip shape from a fine ejection port, and then the second conductive pattern is connected to the first conductive pattern at one end thereof. Printed on the layer and then on the second conductive pattern, leaving the other end of the second conductive pattern, and between the first strip-shaped insulator layers continuously in the second section.
The insulating layer of is applied a strip of insulating paste from a fine discharge port, the following conductive pattern, the same step is performed a predetermined number of times so that the conductive pattern is superimposed in the stacking direction,
Finally, an insulator sheet is formed on the entire uppermost layer, the laminate thus obtained is cut into each section, and the cut unit laminate is fired at a high temperature to obtain a sintered body. A method of manufacturing a laminated inductor, wherein film-shaped external terminals, which are respectively connected to a start end and an end of the conductive pattern exposed on an end face, are formed on the side end face.
【請求項2】 帯状の絶縁体層の塗布を複数の微細な吐
出口から絶縁体ペーストを複数区画内に連続的に塗布形
成する請求項1記載の積層インダクターの製造方法。
2. The method for manufacturing a laminated inductor according to claim 1, wherein the coating of the strip-shaped insulating layer is continuously formed by coating the insulating paste in a plurality of sections from a plurality of fine discharge ports.
【請求項3】 帯状の絶縁体層の塗布を、複数の微細な
吐出口のそれぞれの吐出口から絶縁体ペーストを複数区
画内で隣り合った列を同時に覆うようにして連続的に形
成する請求項1記載の積層インダクターの製造方法。
3. A strip-shaped insulating layer is formed by continuously forming an insulating paste from each of a plurality of fine discharge ports so as to simultaneously cover adjacent rows in a plurality of sections. Item 2. A method for manufacturing a laminated inductor according to Item 1.
【請求項4】 第1の絶縁体シートに帯状の凹凸状の段
差を設け、その凹凸状の段差の大きさは絶縁体層の膜厚
の約半分とし、第1の絶縁体層と第2の絶縁体層及び第
2の絶縁体層と次の絶縁体層、以下他の絶縁体層間で絶
縁体層の膜厚の約半分の凹凸状の段差を維持しつつ導電
パターンと絶縁体層を積層方向に所定回数だけ重畳する
請求項1、請求項2または請求項3記載の積層インダク
ターの製造方法。
4. A strip-shaped uneven step is provided on the first insulating sheet, and the size of the uneven step is about half the film thickness of the insulating layer. Of the insulating layer and the second insulating layer and the next insulating layer, and the insulating layer between the other insulating layers, while maintaining the uneven step of about half the thickness of the insulating layer, the conductive pattern and the insulating layer. The method for manufacturing a laminated inductor according to claim 1, 2, or 3, wherein the laminated inductors are overlapped a predetermined number of times in the laminating direction.
【請求項5】 絶縁体シート及び絶縁体層は電気絶縁性
の磁性材料である請求項1、請求項2、請求項3または
請求項4記載の積層インダクターの製造方法。
5. The method for producing a laminated inductor according to claim 1, claim 2, claim 3 or claim 4, wherein the insulator sheet and the insulator layer are electrically insulating magnetic materials.
【請求項6】 絶縁体シートと絶縁体層は、透磁率がそ
れぞれ異なる電気絶縁性の磁性材料である請求項5記載
の積層インダクターの製造方法。
6. The method for manufacturing a laminated inductor according to claim 5, wherein the insulating sheet and the insulating layer are electrically insulating magnetic materials having different magnetic permeability.
【請求項7】 絶縁体層において、少なくとも2種以上
の透磁率からなる電気絶縁性の磁性材料を形成する請求
項5または請求項6記載の積層インダクターの製造方
法。
7. The method for manufacturing a laminated inductor according to claim 5, wherein the insulating layer is formed of an electrically insulating magnetic material having at least two kinds of magnetic permeability.
【請求項8】 絶縁体シート及び絶縁体において、少な
くとも2種以上の透磁率からなる電気絶縁性の磁性材料
を積層体の導電パターンより発生する磁束の通る方向で
同質の材料になるように形成する請求項5または請求項
6記載の積層インダクターの製造方法。
8. In an insulating sheet and an insulating material, an electrically insulating magnetic material having at least two kinds of magnetic permeability is formed so as to be the same material in a direction in which a magnetic flux generated by a conductive pattern of a laminated body passes. 7. The method for manufacturing a laminated inductor according to claim 5 or 6.
【請求項9】 端面に露出される部分の導電パターンの
膜厚が渦巻き状パターンの膜厚よりも厚くした請求項1
記載の積層インダクターの製造方法。
9. The film thickness of the conductive pattern in the portion exposed on the end face is larger than that of the spiral pattern.
A method for manufacturing the laminated inductor described.
【請求項10】 導電パターンが金属材料の溶射によっ
て形成された請求項1記載の積層インダクターの製造方
法。
10. The method of manufacturing a laminated inductor according to claim 1, wherein the conductive pattern is formed by thermal spraying of a metal material.
JP21728593A 1993-09-01 1993-09-01 Manufacturing method of multilayer inductor Expired - Fee Related JP3159574B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21728593A JP3159574B2 (en) 1993-09-01 1993-09-01 Manufacturing method of multilayer inductor

Publications (2)

Publication Number Publication Date
JPH0774044A true JPH0774044A (en) 1995-03-17
JP3159574B2 JP3159574B2 (en) 2001-04-23

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005277385A (en) * 2004-02-27 2005-10-06 Tdk Corp Laminate chip inductor forming member and method of manufacturing laminate chip inductor comonent
JP2016162892A (en) * 2015-03-02 2016-09-05 株式会社村田製作所 Electronic component and method of manufacturing the same
JP2017188557A (en) * 2016-04-05 2017-10-12 株式会社村田製作所 Electronic component and manufacturing method of the electronic component

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005277385A (en) * 2004-02-27 2005-10-06 Tdk Corp Laminate chip inductor forming member and method of manufacturing laminate chip inductor comonent
JP2016162892A (en) * 2015-03-02 2016-09-05 株式会社村田製作所 Electronic component and method of manufacturing the same
US10290415B2 (en) 2015-03-02 2019-05-14 Murata Manufacturing Co., Ltd. Electronic component and manufacturing method therefor
JP2017188557A (en) * 2016-04-05 2017-10-12 株式会社村田製作所 Electronic component and manufacturing method of the electronic component

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