JPH0766428A - 薄膜ｓｏｉ装置及びその製造方法 - Google Patents

薄膜ｓｏｉ装置及びその製造方法

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Publication number
JPH0766428A
JPH0766428A JP6188161A JP18816194A JPH0766428A JP H0766428 A JPH0766428 A JP H0766428A JP 6188161 A JP6188161 A JP 6188161A JP 18816194 A JP18816194 A JP 18816194A JP H0766428 A JPH0766428 A JP H0766428A
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JP
Japan
Prior art keywords
drift region
region
silicon layer
thin film
film soi
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JP6188161A
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JP3871352B2 (ja
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Steven L Merchant
エル マーチャント スティーブン
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Koninklijke Philips NV
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Philips Electronics NV
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract

(57)【要約】 【目的】 特にブリッジ型回路に対するソース高電位動
作を改善し、順方向電流飽和を無くすことにある。 【構成】 トランジスタのドリフト領域を厚肉部分25と
薄肉部分24とを以って構成する。薄肉部分24はドリフト
領域の全長の1/3 〜2/3 に亘って延在させ、ゲート電極
20から分離した電界プレート27をドリフト領域の薄肉部
分の上方に延在させ、ゲート電極20と電界プレート27と
を相互接続金属22により短絡させる。

Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は、埋込絶縁層と、この埋
込絶縁層上の珪素層と、この珪素層上の上側絶縁層とを
具える薄膜ＳＯＩ装置であって、前記の珪素層が、横方
向に延在するドリフト領域と、このドリフト領域の一端
部でこの珪素層の上方にゲート電極を有するゲート領域
と、前記の一端部とは反対側のドリフト領域の端部のド
レイン領域と、前記のゲート領域から横方向で分離され
たソース領域とを具えている当該薄膜ＳＯＩ装置に関す
るものである。本発明は又、このようなＳＯＩ装置の製
造方法にも関するものである。
【０００２】
【従来の技術】このような装置は欧州特許出願第５４９
０４２号明細書に記載されており既知であり、これを図
１に示す。高電圧集積回路技術における主な問題は、構
成素子や副回路区分の分離問題に対する満足な解決策を
見出すことにある。この既知の装置では、ＳＯＩトラン
ジスタのドリフト領域４が約２００〜３００ｎｍの厚さ
の薄肉珪素（シリコン）層として設けられている。この
装置では、絶縁層が酸化物である。この珪素層上の上側
酸化物層６はこの珪素層の下側の埋込酸化物層２と同じ
厚さとするのが好ましい。この構造の利点は、ドリフト
領域４をその上下両方から空乏化できる為、ドリフト領
域４における移動電荷を２倍にしうるということであ
る。これにより装置のオン抵抗を減少させる。この既知
の装置では、基板３上の埋込酸化物層２の厚さが１〜３
ミクロンの範囲にあり、上側酸化物層６の厚さも１〜３
ミクロンの範囲にある。この既知の装置の場合、珪素層
１のドリフト領域４が極めて薄肉である、すなわち０．
１〜０．４ミクロンである個所で５００〜９００Ｖの範
囲の高い降服電圧が得られる。
【０００３】更に、この既知の装置では、ドリフト領域
４にゲート領域の付近でドーピング濃度の少ない横方向
の線形ドーピング領域が設けられている。又、ドリフト
領域４上には電界プレート７が設けられている。ゲート
領域１における珪素層上には、薄肉のゲート酸化物８が
あり、その上に多結晶ゲート電極１３が位置している。
このゲート電極の横方向の延在範囲は薄肉の横方向の線
形ドーピング領域を被覆するものである。ＳＯＩ装置は
ｎ+ 導電型のソース及びドレイン領域１０を有し、これ
らソース及びドレイン領域はそれぞれゲート領域及びド
リフト領域に隣接する。ソース領域はｐ+ ソース層１１
をも有し、従ってソース接点１２はソース領域１０とソ
ース層１１との双方に接触している。ソース領域はｐ型
本体９上に形成されている。ソース領域、ドレイン領域
及びゲート電極１３の各々には電気接点１２が接触され
ている。この既知の構造のものは高降服電圧特性を有す
るＳＯＩ半導体装置を構成するものである。
【０００４】
【発明が解決しようとする課題】しかし、上述した既知
の装置には、ブリッジ回路で遭遇するような、ソース高
電位形態で順方向電流の飽和が大きくなるという問題が
ある。すなわち、ソースが高電位にフロートさせられる
と、順方向電流が比較的小さくなる。
【０００５】本発明の目的は、この問題を回避すること
により上述した従来の構造を改善せんとするにある。
【０００６】
【課題を解決するための手段】本発明は、埋込絶縁層
と、この埋込絶縁層上の珪素層と、この珪素層上の上側
絶縁層とを具える薄膜ＳＯＩ装置であって、前記の珪素
層が、横方向に延在するドリフト領域と、このドリフト
領域の一端部でこの珪素層の上方にゲート電極を有する
ゲート領域と、前記の一端部とは反対側のドリフト領域
の端部のドレイン領域と、前記のゲート領域から横方向
で分離されたソース領域とを具えている当該薄膜ＳＯＩ
装置において、前記のドリフト領域が厚肉部分と薄肉部
分との双方を有していることを特徴とする。
【０００７】ソース高電位動作中、ドリフト領域は電子
の空乏化状態となる。しかし、ドリフト領域の厚肉部分
には空乏化が行われない。ドリフト領域は横方向の線形
ドーピング領域を有し、ドリフト領域の薄肉部分はドリ
フト領域の全長の１／３〜２／３の長さに亘って延在さ
せ、上側絶縁層上に電界プレートを設け、この電界プレ
ートをゲート電極と短絡させ、この電界プレートをドリ
フト領域の薄肉部分上で延在させるのが好ましい。
【０００８】ドリフト領域が横方向の線形ドーピング領
域を有すると、ドーピング濃度はゲート領域からドレイ
ン領域の方向に増大する。この場合、空乏化はゲート領
域の付近でゲート領域の左側に向けて一層著しいものと
なる。その理由は、ゲート領域の左側に向けてドーピン
グ濃度が少なくなる為である。この場合、ドリフト領域
の薄肉部分はドレイン領域に隣接して設けられる。
【０００９】本発明の装置によれば、逆電圧特性を実質
的に既知の装置におけるのと同様に保つことができると
ともに、既知の装置における順方向電流が負の基板電圧
に対し著しく減少するのに対し、ブリッジ回路で遭遇す
るソース高電位形態での順方向電圧特性が順方向電流の
飽和をほんのわずかしか生ぜしめないＳＯＩ回路を提供
する。
【００１０】
【実施例】図１及び２においては同じ部分に同じ符号を
付してある。
【００１１】本発明の装置は欧州特許出願第５４９０４
２号の既知の装置を改善したものである。本発明の新規
な装置は、欧州特許出願第５４９０４２号や、この欧州
特許出願で従来技術として用いられている欧州特許出願
第４９７４２７号で記載されている既知の装置の製造に
類似する方法で製造した。この既知の装置の更なる詳細
及びその製造処理に関しては、これらの欧州特許出願明
細書を参照しうる。
【００１２】本発明の装置は、ブリッジ回路の場合に生
じるようなソース高電位動作中の順方向電流飽和を阻止
する。このことは、本発明によれば、図２の珪素層２
４，２５を、ＳＯＩ装置の横方向線形ドーピング領域を
構成するドリフト領域の全長の約１／３〜２／３の部分
２４においてのみ薄肉とすることにより達成する。この
珪素層の左側部分２５は約１〜２ミクロンのように厚肉
とし、右側部分２４は約０．１〜０．４ミクロンまで薄
肉にする。
【００１３】多結晶珪素ゲート電極２０は多結晶珪素電
界プレート２７から分離させる。アルミニウムのような
金属より成る相互接続金属２２を用いてゲート電極２０
と電界プレート２７とを短絡し、この相互接続金属を珪
素層の厚肉左側部分２５の上方の金属電界プレートとし
て作用させる。右側部分２４と電界プレート２７との間
の中間の上側酸化物層６は埋込酸化物層２と同じ厚さで
相互接続金属２２と珪素層の左側部分２５との間にも延
在させる。
【００１４】図３ａ及び３ｂは図１に示す装置のような
既知の装置及び図２に示す本発明の新規な装置の逆電圧
特性をそれぞれ示す。これら双方の装置では約６２０ボ
ルトの同一の降服電圧が達成された。
【００１５】一方、図４ａ及び４ｂは既知のＳＯＩ装置
及び本発明のＳＯＩ装置の順方向電圧特性をそれぞれ示
す。これらの双方では、基板を−１ボルトのステップで
０ボルトから−２００ボルトまでバイアスした。この検
査はブリッジ回路で用いられているソース高電位形態を
表わす。従来の装置の順方向電流は負の基板電圧で著し
く減少し、その結果順方向電流の飽和が大きくなる。本
発明の改善した構造によれば、順方向電流の飽和をほん
のわずかしか呈さない装置が得られる。
【００１６】本発明の装置の変形例としては、ｎ+ ドレ
イン領域１０の代わりに薄肉のｐ+ドレイン領域を用い
てＬＩＧＢＴ回路装置を形成することができる。しかし
この場合、ｐ+ ドレインをｎ型バッファ層上に配置す
る。
【図面の簡単な説明】
【図１】既知のＳＯＩ装置を示す断面図である。
【図２】本発明のＳＯＩ装置の一実施例を示す断面図で
ある。
【図３】図１の装置の逆方向電圧特性（ａ）と図２の装
置の逆方向電圧特性（ｂ）との比較を示す線図である。
【図４】図１の装置の順方向電圧特性（ａ）と図２の装
置の順方向電圧特性（ｂ）との比較を示す線図である。
【符号の説明】
１ 珪素層（ゲート領域） ２ 埋込酸化物層 ３ 基板 ４ ドリフト領域（珪素層） ６ 上側酸化物層 ７ 電界プレート ８ ゲート酸化物 ９ ｐ型本体 １０ ソース及びドレイン領域 １１ ソース層 １２ 電気接点 １３ 多結晶ゲート電極 ２０ 多結晶ゲート電極 ２２ 相互接続金属 ２４ 珪素層の右側部分 ２５ 珪素層の左側部分 ２７ 電界プレート

Claims (5)

    【特許請求の範囲】
  1. 【請求項１】 埋込絶縁層と、この埋込絶縁層上の珪素
    層と、この珪素層上の上側絶縁層とを具える薄膜ＳＯＩ
    装置であって、前記の珪素層が、横方向に延在するドリ
    フト領域と、このドリフト領域の一端部でこの珪素層の
    上方にゲート電極を有するゲート領域と、前記の一端部
    とは反対側のドリフト領域の端部のドレイン領域と、前
    記のゲート領域から横方向で分離されたソース領域とを
    具えている当該薄膜ＳＯＩ装置において、 前記のドリフト領域が厚肉部分と薄肉部分との双方を有
    していることを特徴とする薄膜ＳＯＩ装置。
  2. 【請求項２】 請求項１に記載の薄膜ＳＯＩ装置におい
    て、前記のドリフト領域が横方向の線形ドーピング領域
    を有し、ドリフト領域の薄肉部分がドリフト領域の全長
    の１／３〜２／３の長さに亘って延在し、前記の上側絶
    縁層上に電界プレートが設けられ、この電界プレートは
    ゲート電極に短絡し且つドリフト領域の薄肉部分の上方
    で延在していることを特徴とする薄膜ＳＯＩ装置。
  3. 【請求項３】 請求項１に記載の薄膜ＳＯＩ装置におい
    て、ドリフト領域の薄肉部分の厚さは０．１〜０．４μ
    m にしたことを特徴とする薄膜ＳＯＩ装置。
  4. 【請求項４】 請求項１に記載の薄膜ＳＯＩ装置におい
    て、前記の珪素層の厚さは前記の薄肉部分に隣接するド
    リフト領域において約１〜２μm としたことを特徴とす
    る薄膜ＳＯＩ装置。
  5. 【請求項５】 基板上の埋込酸化物層上に珪素層を形成
    する工程と、この珪素層の一部分を薄肉にする工程と、
    この珪素層上に酸化物層を形成する工程と、前記の一部
    分にかからないようにこの珪素層上にゲート電極を設け
    る工程と、前記の一部分の上方で前記の酸化物層上に電
    界プレートを延在させる工程と、この電界プレートと前
    記のゲート電極とを短絡させる工程とを有することを特
    徴とする薄膜ＳＯＩ装置の製造方法。
JP18816194A 1993-08-10 1994-08-10 薄膜ｓｏｉ装置及びその製造方法 Expired - Fee Related JP3871352B2 (ja)

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Application Number Priority Date Filing Date Title
US08/105213 1993-08-10
US08/105,213 US5362979A (en) 1991-02-01 1993-08-10 SOI transistor with improved source-high performance

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JPH0766428A true JPH0766428A (ja) 1995-03-10
JP3871352B2 JP3871352B2 (ja) 2007-01-24

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EP (1) EP0638938B1 (ja)
JP (1) JP3871352B2 (ja)
KR (1) KR100348668B1 (ja)
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EP0638938A3 (en) 1995-05-03
DE69408605D1 (de) 1998-04-02
DE69408605T2 (de) 1998-08-06
EP0638938B1 (en) 1998-02-25
JP3871352B2 (ja) 2007-01-24
KR950007022A (ko) 1995-03-21
EP0638938A2 (en) 1995-02-15
KR100348668B1 (ko) 2002-11-23
US5362979A (en) 1994-11-08

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