JPH0750295A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH0750295A
JPH0750295A JP19378193A JP19378193A JPH0750295A JP H0750295 A JPH0750295 A JP H0750295A JP 19378193 A JP19378193 A JP 19378193A JP 19378193 A JP19378193 A JP 19378193A JP H0750295 A JPH0750295 A JP H0750295A
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film
silicon
oxide
gas
semiconductor
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JP19378193A
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Japanese (ja)
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Takatoshi Izumi
宇俊 和泉
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Fujitsu Ltd
富士通株式会社
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Abstract

PURPOSE:To improve the quality of a TEOS-O3.NGS film and improve the step coating by a wiring film coated on the TEOS-O3.NGS film. CONSTITUTION:1 The manufacture of a semiconductor device has a process of forming a silicon oxide film 3 on a semiconductor substrate 1 and sputtering and etching the surface of the silicon oxide film by argon gas and a process of forming a silicate glass film 4 (TEOS-O3.NSG) on the silicon oxide film by vapor growth using the gas which contains organic silicon compound and ozone. 2) The sputtering and the etching of the number 1) can be substituted by the irradiation of the plasma of nitrogen (N2), ammonium (NH3) and dinitrogen monoxide (N2O) gas on the surface of the silicon oxide film 3 or heat treatment in wet oxygen (O2) or dry oxygen. 3) The refractive index of the silicon oxide film is improved by adding gas which contains hydrogen to the gas lows raw material at the time of forming the silicon film 3.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は半導体装置の製造方法に係り, 配線間に形成する層間絶縁膜の平坦化および膜質改善に関する。 The present invention relates relates to a method of manufacturing a semiconductor device, a planarization and film quality improvement of an interlayer insulating film formed between the wiring.

【0002】近年, 半導体装置の高集積化にともない, [0002] In recent years, with the high integration of semiconductor devices,
プロセス中の基板表面の平坦化は極めて困難となってきており,又,平坦化膜の膜質によっては下地のデバイスに悪影響を与え, また, アルミニウム(Al)系等の配線の劣化を招くことがあり,深刻な問題となっている。 Planarization of the substrate surface during the process has become extremely difficult, also adversely affect the underlying devices by the film quality of the flattening film, also can cause deterioration of the wiring aluminum (Al) system and the like Yes, it has become a serious problem.

【0003】 [0003]

【従来の技術】多層膜の平坦化のためには, 従来技術では,平坦化膜としてSOG(スピンオングラス) 膜を用いこれを回転塗布し, ベークする等多数の工程が必要なためスループットの低下および製造コストの増加をきたしていた。 For planarization of the Related Art multilayer film, in the prior art, SOG which used (spin on glass) film is spin coated as a flattening film, lowering of equal number of steps for the required throughput and baked and it had Kitaichi an increase in manufacturing cost. そこで,多層膜の平坦化に優れた層間絶縁膜として TEOS-O 3・NSG 膜が用いられるようになった。 Therefore, now TEOS-O 3 · NSG film is used as an excellent interlayer insulating film flattening of the multilayer film.

【0004】TEOS-O 3・NSG 膜は常圧または常圧に近い減圧下で行う気相成長(CVD) 法でTEOS(テトラエトキシシラン, (C 2 H 5 O) 4 Siと O 3との混合ガスを用いて成長したNSG(ノンドープのシリケートグラス) 膜である。 [0004] TEOS-O 3 · NSG film TEOS (tetraethoxysilane vapor deposition (CVD) carried out under reduced pressure close to atmospheric pressure or atmospheric pressure, and (C 2 H 5 O) 4 Si and O 3 NSG grown by using a mixed gas a membrane (silicate glass doped).

【0005】しかし, TEOS-O 3・NSG 膜は含有水分が多く, 下地デバイスに悪影響を与え,且つその膜質は下地膜に大きく依存するため,膜質は不安定であった。 However, TEOS-O 3 · NSG film is often water content, adversely affect the underlying device, and the film quality is very dependent on the underlying film, the film quality was unstable. また, TEOS-O 3・NSG 膜を用いたときも,例えばメモリ素子等のセル部と周辺部にかけての大きな段差ができるが, 段差被覆の改善も重要である。 Further, even when using TEOS-O 3 · NSG film, for example, can be a large difference in level toward cell portion such as a memory device and a peripheral portion, improvement of the step coverage is also important.

【0006】 [0006]

【発明が解決しようとする課題】本発明は TEOS-O 3・NS The object of the invention is to solve the present invention is TEOS-O 3 · NS
G 膜の膜質を改善し, 且つその上に被着する配線膜の段差被覆を改善することを目的とする。 Improving the quality of the G film, and aims to improve the step coverage of the wiring film depositing thereon.

【0007】 [0007]

【課題を解決するための手段】上記課題の解決は(図1 Solving the problems SUMMARY OF THE INVENTION The (Figure 1
参照) 1)半導体基板 1上に酸化シリコン膜 3を成膜し,該酸化シリコン膜の表面をアルゴンガスでスパッタ・エッチングする工程と,該酸化シリコン膜の上に有機シリコン化合物とオゾンを含むガスを用いた気相成長法により珪酸グラス(TEOS-O 3・NSG)膜を成膜する工程とを有する半導体装置の製造方法, あるいは 2)前記1)のスパッタ・エッチングに代えて,前記酸化シリコン膜 3の表面を窒素(N 2 ), アンモニア(NH 3 ), See) 1) a silicon oxide film 3 is formed on the semiconductor substrate 1, a gas comprising the steps of: a surface of the silicon oxide film is sputter etching with argon gas, an organic silicon compound and ozone on the silicon oxide film method of manufacturing a semiconductor device having a step of forming a silicate glass (TEOS-O 3 · NSG) film by vapor deposition using or 2) in place of the sputter etching of the 1), the silicon oxide nitrogen surface of the membrane 3 (N 2), ammonia (NH 3),
亜酸化窒素(N 2 O) ガスのプラズマを照射するか,あるいはウエット酸素(O 2 )またはドライ酸素中で熱処理を行う半導体装置の製造方法, あるいは 3)前記1)の前記酸化シリコン膜(3)の成膜時に,原料ガスに窒素を含むガスを添加して該酸化シリコン膜の屈折率を高くする半導体装置の製造方法により達成される。 Or it is exposed to the plasma of nitrous oxide (N 2 O) gas, or wet oxygen (O 2), a method of manufacturing a semiconductor device performing the heat treatment in a dry oxygen atmosphere or 3) the silicon oxide film of the 1) (3, during the formation of), it is achieved by a method of manufacturing a semiconductor device a gas containing nitrogen in raw material gas is added to increase the refractive index of the silicon oxide film.

【0008】 [0008]

【作用】本発明では,下層配線終了後に, 水分や不純物の拡散を阻止する等のブロック層としてプラズマ気相成長による酸化シリコン(p-SiO) 膜を用い, アルゴン・スパッタ・エッチング(ASE) によりp-SiO 膜の表面改質を行い, この上に TEOS-O 3・NSG 膜を成長する。 According to the present invention, after the completion of the lower layer wiring, using the silicon oxide (p-SiO) film by plasma chemical vapor deposition as a blocking layer such as to prevent the diffusion of moisture or impurities, the argon sputter etch (ASE) It performs a surface modification of the p-SiO film, the growth of the TEOS-O 3 · NSG film on this.

【0009】膜質を改善するこめには,p-SiO 膜を1000 [0009] The rice to improve the quality, the p-SiO film 1000
〜2000Å成長し,アルゴン・スパッタ・エッチングで 1 ~2000Å grow, 1 with argon sputter etch
50Å程度エッチングし,この上に TEOS-O 3・NSG 膜を成長する。 And 50Å etched about to grow a TEOS-O 3 · NSG film thereon.

【0010】また,膜質を改善し且つ平坦度も併せて改善するには,p-SiO 膜を4000〜5000Åと厚く成長し,AS [0010] In addition, in order to improve and also to and flatness to improve the film quality, the p-SiO film is grown thick with 4000~5000Å, AS
E で1500Å程度エッチングし,この上に TEOS-O 3・NSG 1500Å about etched with E, TEOS-O 3 · NSG on this
膜を成長する。 The growth of the film. この場合は, p-SiO 膜を厚く成長することにより, ブロック性を良くして下地デバイスへの影響を少なくし,さらにセルと周辺回路間の落ち込み部分(段差)の上層配線膜の被覆を改善することができる。 In this case, by growing thick p-SiO film, to reduce the influence of the underlying device with good block resistance, further improve the coverage of the upper wiring layer of the drop portion between cells and the peripheral circuit (step) can do.

【0011】次に, 下地膜の前処理としてASE 等のエッチングを行うことにより, 膜質が改善される理由と, どのように改善されるかを示すデータを説明する。 [0011] Next, by etching the ASE such as a pretreatment of the underlying film will be described why the film quality is improved, the data indicating how to improve. 図3 Figure 3
(A),(B) は本発明の効果を説明する図である。 (A), (B) is a diagram for explaining the effect of the present invention.

【0012】図3(A) はアルゴン・スパッタ・エッチングなしの場合の断面図と表面を見た斜視図, 図3(B) は同有りの場合を示す。 [0012] FIG. 3 (A) a perspective view of the cross section and surface of a case of no argon sputter etching, and FIG. 3 (B) shows the case of the same there. いずれも実験結果を示す写真の模写図である。 Both a replication view photograph showing the experimental results.

【0013】図より, アルゴン・スパッタ・エッチングなしの場合は, TEOS-O 3・NSG 膜に「す」ができており, また, TEOS-O 3・NSG 膜の表面を撮影した写真では膜の表面荒れが観測されている。 [0013] From the figure, for no argon sputter etching, and it can "be" in the TEOS-O 3-NSG film, also the membrane is a photograph obtained by photographing the surface of the TEOS-O 3-NSG film rough surface has been observed. これに対してアルゴン・スパッタ・エッチング有りの場合は「す」が消滅し, In the case of there argon sputter etching contrast "to" disappears,
表面荒れもなくなっており,非常に良好な膜質になっていることがわかった。 Surface roughness is also gone, it was found that that is a very good film quality.

【0014】その理由は, アルゴン・スパッタ・エッチングにより,酸化シリコン膜の結合手が変わり, TEOS- [0014] This is because, by argon sputter etching, alters the bonds of the silicon oxide film, TEOS-
O 3・NSG 膜の結合が変化するためと考えられる。 Binding of O 3 · NSG film is considered to change.

【0015】 [0015]

【実施例】図1(A),(B) は本発明の実施例(1) を説明する断面図である。 EXAMPLES FIG. 1 (A), the cross-sectional views for explaining the (B) Example of the present invention (1). 図1(A) において,バルク工程が終わり表面にボロンドープのりん珪酸ガラス(PSG) 膜が被着された基板 1の上に1層目アルミニウム(Al)配線 2を形成し,その上に厚さ1000〜2000Åのp-SiO 膜 3を成長する。 In FIG. 1 (A), to form a first layer of aluminum (Al) wiring 2 on the substrate 1, phosphorus silicate glass (PSG) film doped with boron on the surface ends and the bulk process is deposited, the thickness on the to grow a p-SiO film 3 of 1000~2000Å.

【0016】図1(B) において,p-SiO 膜 3の上に成長する TEOS-O 3・NSG 膜の下地依存をなくする膜質改善処理として, アルゴン・スパッタ・エッチングでp-SiO 膜 [0016] In FIG. 1 (B), the as film quality improvement process to eliminate the underlying dependence of TEOS-O 3-NSG film grown on the p-SiO film 3, p-SiO film with argon sputter etch
3を150Å程度エッチングし,この上に厚さ7000〜9000 3 was 150Å etched by about a thickness from 7,000 to 9,000 on the
Åの TEOS-O 3・NSG 膜 4を成長する。 Growing TEOS-O 3 · NSG film 4 Å.

【0017】アルゴン(Ar)・スパッタ・エッチングの条件の一例は以下のようである。 [0017] One example of a condition of an argon (Ar), sputter etching are as follows. Ar圧力: 0.1 Torr Ar流量: 50 SCCM RF電力: 800 W 基板温度: 100℃ また, TEOS-O 3・NSG 膜の成膜条件の次に一例を示す。 Ar Pressure: 0.1 Torr Ar flow rate: 50 SCCM RF power: 800 W substrate temperature: 100 ° C. Further, an example following the deposition conditions of the TEOS-O 3 · NSG film.

【0018】TEOS流量: 1.0 SLM O 3流量: 7.5 SLM 希釈N 3流量:18.0 SLM (O 3濃度 120 g/m 3 ) ガス圧力: 常圧 基板温度: 400 ℃ さらに別の膜質改善処理方法として,N 2 , NH 3 , N 2 Oガスのプラズマを照射するか,あるいはウエットO 2またはドライO 2中で, 例えば 450℃, 30分間の熱処理を行う方法がある。 As 400 ° C. Yet another quality improvement processing method,: [0018] TEOS flow rate: 1.0 SLM O 3 flow rate: 7.5 SLM diluted N 3 flow rate: 18.0 SLM (O 3 concentration 120 g / m 3) Gas pressure: atmospheric pressure substrate temperature N 2, NH 3, or is exposed to the plasma of the N 2 O gas, or in wet O 2 or a dry O 2, for example 450 ° C., there is a method of performing heat treatment for 30 minutes.

【0019】次に, N 2 , NH 3 , N 2 Oのプラズマ照射条件の一例を示す。 [0019] Next, an example of a plasma irradiation conditions of N 2, NH 3, N 2 O. N 2 , またはNH 3 , またはN 2 O 圧力: それぞれ, 1.0 , N 2 or NH 3, or N 2 O pressure: respectively, 1.0,
1.0 ,1.0 Torr N 2 , またはNH 3 , またはN 2 O 流量: それぞれ, 300 , 1.0, 1.0 Torr N 2 or NH 3, or N 2 O flow rate: respectively, 300,
100 ,300 SCCM RF電力: 500 W 電極間隔: 400 mils 基板温度: 350℃ 照射時間: 60 s 図2(A),(B) は従来例と対比して本発明の実施例(2) を説明する断面図である。 100, 300 SCCM RF power: 500 W distance between electrodes: 400 mils substrate temperature: 350 ° C. irradiation time: 60 s Figure 2 (A), explaining the (B) Example of the present invention in comparison with the conventional example (2) it is a cross-sectional view.

【0020】この例はセルと周辺回路との境界の段差部の断面を示し,図2(A) は実施例を, 図2(B) は従来例を示す。 [0020] This example shows a cross section of the stepped portion of the boundary between the cell and the peripheral circuit, FIG. 2 (A) Example, FIG. 2 (B) shows a conventional example. 図2(A) において,図1と同じ基板上1層目Al In FIG. 2 (A), the same substrate the first layer Al and 1
配線 2を形成し,その上に厚さ4000〜5000Åのp-SiO 膜 The wiring 2 is formed, p-SiO film having a thickness of 4000~5000Å thereon
3を成長する。 3 to grow.

【0021】次いで,アルゴン・スパッタ・エッチングでp-SiO 膜 3を1500Å程度エッチングして図示のように段差の角をとり,この上に厚さ5000〜7000ÅのTEOS-O 3 [0021] Then, a p-SiO film 3 by argon sputter etching takes the corner of the step, as shown by 1500Å etched by about, TEOS-O 3 having a thickness of 5000~7000Å on this
・NSG 膜 4を成長する。 · NSG film 4 to grow.

【0022】次いで,その上に2層目配線Al膜 5を成膜すると段差部で断線することなく被覆が改善される。 [0022] Then, the coating is improved without breaking when forming the second wiring layer Al film 5 thereon at the step portion. 図2(B) ではアルゴン・スパッタ・エッチングを行わない場合で,TEOS-O 3・NSG 膜 4上に2層目配線Al膜 5を成膜すると段差部で断線する場合がある。 In case of FIG. 2 (B) in not performed argon sputter etching, sometimes disconnected at the step portion when forming the second wiring layer Al film 5 on the TEOS-O 3-NSG film 4.

【0023】実施例(2) では,ブロック膜であるp-SiO [0023] In Example (2), p-SiO is a block film
膜 3が厚いことから下地素子への水分拡散が防止でき, Because of the film 3 thick prevents moisture diffusion to the underlying element,
また TEOS-O 3・NSG 膜 4を通常の場合〔実施例(1) 〕より約2000Å薄くできるため,全体としての含有水分量も低減できる。 Since the TEOS-O 3 · NSG film 4 which can be about 2000Å thinner than normal Example (1)], can be reduced moisture content as a whole.

【0024】また,p-SiO 膜 3の膜質改良処理として, [0024] In addition, as the film quality improvement process of p-SiO film 3,
成膜時にN 2 O およびNH 3等を添加して, p-SiO 膜 3に窒素を含有させて屈折率を1.60〜1.80と高くすることにより,一層ブロック性を向上することができる。 During film formation by addition of N 2 O and NH 3 or the like, the refractive index contain a nitrogen p-SiO film 3 by increasing a from 1.60 to 1.80, can be improved more blockiness.

【0025】 [0025]

【発明の効果】本発明によれば, TEOS-O 3・NSG 膜の膜質を改善し, 且つその上に被着する配線膜の段差被覆を改善することができた。 According to the present invention, to improve the quality of the TEOS-O 3 · NSG film, and it was possible to improve the step coverage of the wiring film depositing thereon. この結果, TEOS-O 3・NSG 膜から下地素子への水分等の拡散が防止され,デバイスの信頼性と製造歩留の向上に寄与することができた。 As a result, the diffusion from the TEOS-O 3 · NSG film such as moisture to the underlying element is prevented, it could contribute to the improvement of the production yield and reliability of the device.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】 本発明の実施例(1) を説明する断面図 Sectional views illustrating examples (1) of the present invention; FIG

【図2】 従来例と対比して本発明の実施例(2) を説明する断面図 2 is a cross-sectional view for explaining an embodiment (2) of the comparison with the conventional example in the present invention

【図3】 本発明の効果を説明する図 Diagram for explaining the effect of the present invention; FIG

【符号の説明】 DESCRIPTION OF SYMBOLS

1 表面に絶縁膜が被着された基板 2 1層目アルミニウム(Al)配線 3 酸化シリコン膜でp-SiO 膜 4 TEOS-O 3・ノンドープ珪酸グラス(NSG) 膜 5 2層目アルミニウム(Al)配線 1 the surface insulating film substrate 2 first-layer aluminum is deposited (Al) p-SiO film 4 TEOS-O 3 · undoped silicate glass wiring 3 silicon oxide film (NSG) film 5 second layer of aluminum (Al) wiring

Claims (3)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 半導体基板(1) 上に酸化シリコン膜(3) 1. A silicon oxide film on a semiconductor substrate (1) (3)
    を成膜し,該酸化シリコン膜の表面をアルゴンガスでスパッタ・エッチングする工程と,該酸化シリコン膜の上に有機シリコン化合物とオゾンを含むガスを用いた気相成長法により珪酸グラス(TEOS-O 3・NSG)膜を成膜する工程とを有することを特徴とする半導体装置の製造方法。 Was formed, a step of the surface of the silicon oxide film is sputter etching with argon gas, silicate glass by vapor deposition using a gas containing an organic silicon compound and ozone on the silicon oxide film (TEOS- the method of manufacturing a semiconductor device characterized by having a step of forming the O 3 · NSG) film.
  2. 【請求項2】 請求項1のスパッタ・エッチングに代えて,前記酸化シリコン膜(3)の表面を窒素(N 2 ), アンモニア(NH 3 ), 亜酸化窒素(N 2 O) ガスのプラズマを照射するか,あるいはウエット酸素(O 2 )またはドライ酸素中で熱処理を行うことを特徴とする半導体装置の製造方法。 2. Instead of the sputter etching according to claim 1, nitrogen (N 2) surface of the silicon oxide film (3), ammonia (NH 3), a plasma of nitrous oxide (N 2 O) gas the method of manufacturing a semiconductor device which is characterized in that either radiation or a heat treatment in wet oxygen (O 2), dry oxygen.
  3. 【請求項3】 請求項1の前記酸化シリコン膜(3)の成膜時に,原料ガスに窒素を含むガスを添加して該酸化シリコン膜の屈折率を高くすることを特徴とする半導体装置の製造方法。 Wherein during the film formation of the silicon oxide film according to claim 1 (3), a gas containing nitrogen in raw material gas by adding a semiconductor device characterized by increasing the refractive index of the silicon oxide film Production method.
JP19378193A 1993-08-05 1993-08-05 Manufacture of semiconductor device Withdrawn JPH0750295A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
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JPH0964029A (en) * 1995-08-18 1997-03-07 Canon Sales Co Inc Film formation method
JPH09186155A (en) * 1995-12-23 1997-07-15 Hyundai Electron Ind Co Ltd Semiconductor element manufacturing method
US6225236B1 (en) 1998-02-12 2001-05-01 Canon Sales Co., Inc. Method for reforming undercoating surface and method for production of semiconductor device
US6255230B1 (en) 1999-06-04 2001-07-03 Canon Sales Co., Inc. Method for modifying a film forming surface of a substrate on which a film is to be formed, and method for manufacturing a semiconductor device using the same
EP1061573A3 (en) * 1999-06-17 2003-10-15 Fujitsu Limited Semiconductor device and method of manufacturing the same
US6900144B2 (en) 2000-03-31 2005-05-31 Canon Sales Co., Inc. Film-forming surface reforming method and semiconductor device manufacturing method

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0964029A (en) * 1995-08-18 1997-03-07 Canon Sales Co Inc Film formation method
US5800877A (en) * 1995-08-18 1998-09-01 Canon Sales Co., Inc. Method for forming a fluorine containing silicon oxide film
JPH09186155A (en) * 1995-12-23 1997-07-15 Hyundai Electron Ind Co Ltd Semiconductor element manufacturing method
US6225236B1 (en) 1998-02-12 2001-05-01 Canon Sales Co., Inc. Method for reforming undercoating surface and method for production of semiconductor device
US6255230B1 (en) 1999-06-04 2001-07-03 Canon Sales Co., Inc. Method for modifying a film forming surface of a substrate on which a film is to be formed, and method for manufacturing a semiconductor device using the same
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