JPH07335742A - Semiconductor substrate and its manufacture - Google Patents

Abstract

PURPOSE:To provide a semiconductor substrate having structure, in which the induction of a crystal defect in the vicinity of a trench is inhibited, and its manufacture. CONSTITUTION:Trenches 4 are formed on the mirror surface side of a first single crystal silicon substrate, and polycrystalline silicon films 5 are formed to the mirror surface and trenches 4 of the first single crystal silicon substrate. Silicon oxide films 6 are shaped onto the polycrystalline silicon films 5, and a polycrystalline silicon film 7 is deposited onto the silicon oxide films 6 to fill the insides of the trenches 4. The surface of the polycrystalline silicon film 7 is specular-polished and flattened, and the mirror surface side of the first single crystal silicon substrate and the mirror surface 8a of a second single crystal silicon substrate 8 are laminated, thus forming a clad substrate 9. Another surface of the first single crystal silicon substrate in the clad substrate 9 is ground and specular-polished, and the silicon oxide films 6 formed in the trenches 4 are exposed onto the surface. Accordingly, the semiconductor substrate having structure, in which the polycrystalline silicon films 5 are interposed among the inwalls of the trenches 4 and the silicon oxide films 6, is manufactured.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a manufacturing method thereof, and more particularly to a semiconductor substrate in which an element forming region is insulated and separated by a groove and a manufacturing method thereof.

[0002]

2. Description of the Related Art As a method of electrically isolating elements from each other in order to prevent a malfunction due to mutual interference between elements, a groove is formed and the element is filled with an insulating material for isolation. A known method (trench isolation method) is known (for example, JP-A-61-2).
92934). In particular, SOI (SiliconO
In a semiconductor substrate having an (n Insulator) structure, a groove having a depth reaching an embedded insulator is formed, and an insulator is formed on a sidewall of the groove to completely surround the element formation region with the insulator. Insulation can be separated. This prevents malfunction between elements (for example, CM
It is possible to form a high breakdown voltage element (for example, an LDMOS transistor) and a low breakdown voltage element (for example, a bipolar transistor or a MOS transistor) on the same chip. It is also possible to form elements and the like. FIG. 26 shows a sectional view of the final structure. In FIG. 26, a buried silicon oxide film 32 is formed in a single crystal silicon substrate 31, a groove 33 reaching the buried silicon oxide film 32 is formed, and a silicon oxide film 34 is formed in the groove 33 and a groove 33. The inside is filled with polycrystalline silicon 35. As a result, the bipolar transistor 36, the CMOS transistor 37, and the LDMO
The S transistor 38 is isolated from each other.

[0003]

However, in the above-described conventional separation method by groove formation, as shown in FIG.
Insulator (silicon oxide film 34) formed on the side wall of the groove 33
From the difference in the coefficient of thermal expansion between the single crystal silicon (31) and
There is a problem that stress is applied to the single crystal silicon region in the vicinity of the groove 33 during the heat treatment for forming the insulator and the subsequent heat treatment, and crystal defects are easily induced in this region. Therefore, the active region of the element must be formed apart from the groove 33 by a predetermined distance (distance in which crystal defects are not induced), which reduces the area where the element can be formed. This becomes a problem as the degree of integration increases.

Therefore, an object of the present invention is to provide a semiconductor substrate having a structure for suppressing the induction of crystal defects near the groove and a method for manufacturing the semiconductor substrate.

[0005]

According to a first aspect of the present invention, there is provided a semiconductor in which an insulating isolation groove is formed around an element forming region made of single crystal silicon and a silicon oxide film is formed in the groove. The gist of the substrate is a semiconductor substrate in which a polycrystalline silicon film is interposed between the inner wall of the insulating separation groove and the silicon oxide film.

According to a second aspect of the present invention, the first step of forming a groove around the element forming region on the mirror surface side of the first single crystal silicon substrate having at least one surface mirror-polished, and the first step Second step of forming a polycrystalline silicon film on the mirror surface and groove of the single crystal silicon substrate, a third step of forming a silicon oxide film on the polycrystalline silicon film, and a polycrystalline silicon film on the silicon oxide film. A fourth step of depositing a film to fill the groove, a fifth step of mirror-polishing the surface of the polycrystalline silicon film formed in the fourth step to planarize it, and the first single crystal silicon substrate Laminating a mirror-polished polycrystalline silicon surface with a mirror surface of a second single-crystal silicon substrate having at least one surface mirror-polished to form a bonded substrate, and the bonding. substrate And a seventh step of exposing the silicon oxide film formed in the groove to the surface by grinding and mirror-polishing the other surface of the first single crystal silicon substrate. .

According to a third aspect of the present invention, at least one surface is mirror-polished, and a first step of forming a single crystal silicon substrate in which a silicon oxide film is embedded to a predetermined depth from the mirror surface, A second step of forming a silicon oxide film on the mirror surface of the single crystal silicon substrate and etching the silicon oxide film using the mask as a mask to reach the silicon oxide film around the element formation region; And a third step of forming a polycrystalline silicon film on the silicon oxide film functioning as the mask, and using the polycrystalline silicon film on the silicon oxide film functioning as the mask and at the bottom of the groove as the mask The removed silicon oxide film and the silicon oxide film embedded in the single crystal silicon substrate are removed by dry etching using the stopper as a stopper. Then, the fourth step of leaving only the polycrystalline silicon film on the side wall of the groove, the fifth step of removing the silicon oxide film on the mirror surface functioning as the stopper, and the inside of the groove and the single crystal silicon substrate. A sixth step of forming a silicon oxide film on the mirror surface, a seventh step of depositing a polycrystalline silicon film on the silicon oxide film formed in the sixth step to fill the groove, and a seventh step Eighth step of selectively removing the polycrystalline silicon film formed in the sixth step by using the silicon oxide film formed in the sixth step as a stopper to remove the polycrystalline silicon film in the groove, and a mirror surface of the single crystal silicon substrate. Ninth removing the silicon oxide film on
The gist is a method of manufacturing a semiconductor substrate, which includes a step and a tenth step of planarizing the polycrystalline silicon film in the groove by mirror polishing.

According to a fourth aspect of the present invention, after a silicon oxide film is formed on the mirror surface of a single crystal silicon substrate whose at least one surface is mirror-polished, the silicon oxide film is used as a mask to surround the element formation region. A first step of forming a groove,
A second step of forming a polycrystalline silicon film in the groove and on the silicon oxide film functioning as the mask, and removing the polycrystalline silicon film from the polycrystalline silicon film, leaving at least the polycrystalline silicon film on the side wall of the groove. A third step, a fourth step of forming a silicon oxide film in the groove and on the mirror surface portion of the single crystal silicon substrate, and a polycrystalline silicon film deposited on the silicon oxide film formed in the fourth step to form a groove. The fifth step of filling the inside and the polycrystalline silicon film formed in the fifth step are selectively polished using the silicon oxide film formed in the fourth step as a stopper to leave the polycrystalline silicon film in the groove. A sixth step of removing the silicon oxide film remaining on the mirror surface of the single crystal silicon substrate, and a seventh step of polishing the polycrystalline silicon film in the groove by mirror polishing The method of manufacturing a semiconductor substrate having a step and its gist the.

[0009]

According to the invention described in claim 1, with the change of temperature,
Due to the difference in coefficient of thermal expansion between silicon oxide and single crystal silicon, stress tends to be applied to the element formation region made of single crystal silicon in the vicinity of the groove, but a polycrystalline silicon film is formed between the inner wall of the groove and the silicon oxide film. Since it is interposed, stress is relaxed by this polycrystalline silicon film, and crystal defects are less likely to be induced. That is, the stress due to the difference in thermal expansion coefficient between single crystal silicon and silicon oxide is relaxed in the polycrystalline silicon film.

According to a second aspect of the present invention, in the first step, a groove is formed around the element forming region on the mirror surface side of the first single crystal silicon substrate having at least one surface mirror-polished, By the process, a polycrystalline silicon film is formed on the mirror surface and the groove of the first single crystal silicon substrate.
Then, in the third step, a silicon oxide film is formed on the polycrystalline silicon film, and in the fourth step, the polycrystalline silicon film is deposited on the silicon oxide film to fill the inside of the groove.
Further, in the fifth step, the surface of the polycrystalline silicon film formed in the fourth step is mirror-polished to be planarized, and in the sixth step, the mirror-polished polycrystalline silicon surface of the first single crystal silicon substrate is formed. The bonded substrate is formed by bonding the mirror surface of the second single crystal silicon substrate having at least one surface mirror-polished. By the seventh step, the other surface of the first single crystal silicon substrate in the bonded substrate is ground and mirror-polished to expose the silicon oxide film formed in the groove on the surface. As a result, the semiconductor substrate according to claim 1 is manufactured.

According to a third aspect of the invention, in the first step, at least one surface is mirror-polished, and a single crystal silicon substrate in which a silicon oxide film is embedded to a predetermined depth from the mirror surface is formed. Then, in the second step, a silicon oxide film is formed on the mirror surface of the single crystal silicon substrate,
By etching using this as a mask, a groove reaching the silicon oxide film is formed around the element formation region. Then, in the third step, a polycrystalline silicon film is formed in the groove and on the silicon oxide film functioning as the mask, and in the fourth step, the polycrystalline silicon film functioning as the mask and the bottom part of the groove are formed. The crystalline silicon film is removed by dry etching using the silicon oxide film functioning as a mask and the silicon oxide film embedded in the single crystal silicon substrate as a stopper, leaving only the polycrystalline silicon film on the sidewall of the groove. Be done. Further, in the fifth step, the silicon oxide film on the mirror surface functioning as the stopper is removed, in the sixth step, the silicon oxide film is formed in the groove and on the mirror surface of the single crystal silicon substrate, and in the seventh step, A polycrystalline silicon film is deposited on the silicon oxide film formed in the sixth step to fill the trench. In the eighth step, the polycrystalline silicon film formed in the seventh step is selectively polished by using the silicon oxide film formed in the sixth step as a stopper to remove the polycrystalline silicon film in the groove, and the ninth step is performed. By the step, the silicon oxide film on the mirror surface of the single crystal silicon substrate is removed, and by the tenth step, the polycrystalline silicon film in the groove is mirror-polished and planarized. As a result, the semiconductor substrate according to claim 1 is manufactured.

According to a fourth aspect of the present invention, in the first step, after a silicon oxide film is formed on the mirror surface of a single crystal silicon substrate having at least one surface mirror-polished, the silicon oxide film is used as a mask. A groove is formed around the element formation region, and in the second step, a polycrystalline silicon film is formed in the groove and on the silicon oxide film functioning as a mask. Then, in the third step, at least the polycrystalline silicon film on the side wall portion of the groove is left behind with respect to the polycrystalline silicon film, and in the fourth step, a silicon oxide film is formed in the groove and on the mirror surface portion of the single crystal silicon substrate. To be done. Further, in the fifth step, a polycrystalline silicon film is deposited on the silicon oxide film formed in the fourth step to fill the trench, and in the sixth step, the polycrystalline silicon film formed in the fifth step is first By selectively polishing the silicon oxide film formed in the four steps as a stopper, the polycrystalline silicon film in the groove is removed and left. In the seventh step, the silicon oxide film remaining on the mirror surface of the single crystal silicon substrate is removed, and in the eighth step, the polycrystalline silicon film in the groove is mirror-polished and flattened. As a result, the semiconductor substrate according to claim 1 is manufactured.

[0013]

【Example】

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings.

1 to 7 are cross-sectional views of the essential part of the semiconductor substrate in the order of manufacturing steps of the semiconductor substrate of this embodiment. In this embodiment, as shown in FIG. 7, the SOI structure, that is, the SOI
It is embodied in a semiconductor substrate having a region 10. Hereinafter, the present embodiment will be described in the order of manufacturing steps.

First, as shown in FIG. 1, a first single crystal silicon substrate 1 having at least one surface mirror-polished is prepared. Then, the mirror surface 1a of the first single crystal silicon substrate 1
Then, a silicon oxide film 2 having a thickness of 100 to 2000 nm is formed by thermal oxidation or CVD. After that, a resist 3 is applied, and the silicon oxide film 2 in the region where the groove is formed is removed by, for example, RIE.

Next, as shown in FIG. 2, a groove 4 is formed around the element forming region Z1 by RIE or wet etching. Then, the silicon oxide film 2 is removed with an aqueous solution of hydrogen fluoride. Subsequently, as shown in FIG. 3, 10 to 20 are provided on the mirror surface 1a side of the first single crystal silicon substrate 1.
A 00 nm polycrystalline silicon film 5 is formed by LPCVD. As a result, the mirror surface 1 of the first single crystal silicon substrate 1
Polycrystalline silicon film 5 is arranged on a and in trench 4.
After that, a thickness of 100 to 40 is formed on the polycrystalline silicon film 5.
A 00 nm silicon oxide film 6 is formed by thermal oxidation or CVD. The polycrystalline silicon film 5 may or may not be doped with impurities.
When the silicon oxide film 6 is formed by thermal oxidation, the polycrystalline silicon film 5 is oxidized to form the silicon oxide film 6, but the silicon oxide film 6 having a required thickness is formed. The thickness of the deposited polycrystalline silicon film 5 is set in advance so that the polycrystalline silicon film 5 having a thickness required for stress relaxation remains after the formation.

Subsequently, as shown in FIG. 4, a polycrystalline silicon film 7 is formed on the silicon oxide film 6 by, for example, LPCVD, and the trench 4 is filled with the polycrystalline silicon film 7.
Then, as shown in FIG. 5, the polycrystal silicon 7 is mirror-polished to flatten the dent in the upper part of the groove 4 and to finish the mirror surface until the surface roughness is such that the substrates (wafers) can be bonded. To do. At this time, in order to facilitate the flattening, the surface of the polycrystalline silicon film 7 may be previously flattened by grinding before mirror-polishing. Further, in the subsequent bonded substrate forming step, in order to reduce the unbonded portion generated at the bonding interface, the mirror-polished polycrystalline silicon surface 7a is ion-implanted with silicon, arsenic, or the like. The surface of 7a may be made amorphous.

Next, as shown in FIG.
Recon substrate 1 and a mirror-polished first surface of at least one side
2 single-crystal silicon substrate 8 and, for example, NH_FourOH:
H₂O₂: H₂O = 1: 1: 4 mixture of organic substances
Removal, HCl: H₂O₂: H ₂O = 1: 1: 4 mixture
To remove metal contamination and clean with pure water
More, wash thoroughly. Then, the first single crystal silicon substrate
Polycrystalline silicon flattened by mirror polishing on the plate 1
Native silicon oxide film on surface 7a and second single crystal
The native silicon oxide film on the silicon substrate 8 is formed by, for example, HF:
H₂Remove with O = 1: 50 mixture. Moreover,
For the crystalline silicon substrates 1 and 8, for example, H₂SO_Four: H
₂O₂= 4: 1 immersion in an acidic solution such as a mixed solution
Is 1 to 100 n on the substrate surface due to oxygen plasma irradiation or the like.
An oxide layer of about m is formed to make it hydrophilic and washed with pure water.
Purify. Then, spin or other drying is performed to absorb it on the substrate surface.
After controlling the amount of water to be deposited, as shown in FIG.
Mirror-polished polycrystalline silicon on crystalline silicon substrate 1
The surface 7a of the silicon film 7 and the mirror surface 8a of the single crystal silicon substrate 8
To adhere. As a result, the two substrates 1 and 8 are formed on the surface.
Of silanol groups formed and water of water molecules adsorbed on the surface
It is adhered by elementary bond. At this time, the polycrystal to be adhered
At least the surface 7a of the silicon film 7 and the mirror surface 8a of the substrate 8
Also, 100 to 100% by thermal oxidation before being adhered to one surface.
You may form a 2000nm silicon oxide film.
Yes.

Further, the bonded substrates 1 and 8 are
For example, it is dried in a vacuum of 10 Torr or less. After that, the substrates 1 and 8 are placed in an inert atmosphere of, for example, nitrogen or argon, or dry O ₂ , wet O ₂ , H ₂ / O ₂
By performing heat treatment at 1100 ° C. or higher for 1 hour or longer in a mixed combustion gas, a dehydration condensation reaction occurs on the bonding surface, and the two substrates 1 and 8 are directly bonded and integrated to form a bonded substrate 9. It

Then, the first single crystal silicon substrate 1 is ground and mirror-polished from the surface 1b side until the silicon oxide film 6 is exposed on the surface. As a result, as shown in FIG. 7, a semiconductor substrate having a structure in which polycrystalline silicon film 5 is interposed between the inner wall of insulating isolation trench 4 and silicon oxide film 6 is manufactured.

In such a semiconductor substrate, the single crystal silicon layer (SOI region) 10 made of the silicon oxide film 6 is used.
The stress on the substrate can be relaxed by the polycrystalline silicon film 5. As a result, the thermal expansion of single crystal silicon and silicon oxide occurs in the step of forming the silicon oxide film 6 on the side wall of the groove 4, the heat treatment in the step of directly joining the substrate 1 and the substrate 8, and the heat treatment in the device forming step. Induction of crystal defects in single crystal silicon due to the stress generated by the difference can be prevented.

As described above, in this embodiment, the groove 4 is formed around the element forming region Z1 on the mirror surface 1a side of the first single crystal silicon substrate 1 having at least one surface mirror-polished (first step). , Mirror surface 1 of the first single crystal silicon substrate 1
A polycrystalline silicon film 5 is formed in a and the groove 4 (second
Process). Then, the silicon oxide film 6 is formed on the polycrystalline silicon film 5 (third step), the polycrystalline silicon film 7 is deposited on the silicon oxide film 6 to fill the inside of the groove 4 (fourth step), The surface of the crystalline silicon film 7 is flattened by mirror polishing (fifth step). Further, the mirror-polished polycrystalline silicon surface 7a of the first single-crystal silicon substrate 1 and the mirror surface 8a of the second single-crystal silicon substrate 8 of which at least one surface is mirror-polished are bonded to each other. A laminated substrate 9 is formed (sixth step), and the other surface of the first single crystal silicon substrate 1 in the laminated substrate 9 is ground and mirror-polished to form the silicon oxide film 6 formed in the groove 4 on the surface. Exposed (7th step).

As a result, in the semiconductor substrate in which the insulating separation groove 4 is formed around the element forming region Z1 made of single crystal silicon and the silicon oxide film 6 is formed in the groove 4, the insulating separation groove 4 is formed. Inner wall and silicon oxide film 6
The structure has a polycrystalline silicon film 5 interposed between and.
In this substrate, due to the difference in thermal expansion coefficient between silicon oxide and single crystal silicon due to the change in temperature, stress tends to be applied to the element formation region Z1 made of single crystal silicon in the vicinity of the groove 4, but Since the polycrystalline silicon film 5 is interposed between the inner wall and the silicon oxide film 6, the polycrystalline silicon film 5 alleviates stress and makes it difficult for crystal defects to be induced. That is, the stress due to the difference in thermal expansion coefficient between single crystal silicon and silicon oxide is relaxed in polycrystalline silicon film 5. (Second Embodiment) Next, a second embodiment will be described with reference to FIGS. Also in this embodiment, as shown in FIG.
It is embodied in a semiconductor substrate having a structure (SOI region 13).

First, as shown in FIG. 8, a single crystal silicon substrate 11 is prepared. At least one surface of the single crystal silicon substrate 11 is mirror-polished and the mirror surface 11a is formed.
A silicon oxide film 14 is buried to a predetermined depth. More specifically, it is formed as follows. First, the silicon oxide film 14 is formed on at least one of the mirror surface 12 a of the single crystal silicon substrate 12 and the mirror surface 13 a of the single crystal silicon substrate 13. Then, this silicon oxide film 1
Mirror surface 12 of single crystal silicon substrate 12 with 4 interposed
a and the mirror surface 13a of the single crystal silicon substrate 13 are closely attached,
Further, it is heat-treated to obtain a laminated substrate. Finally,
The single crystal silicon substrate 13 is ground and mirror-polished to form the single crystal silicon substrate 11.

Then, using the single crystal silicon substrate 11 thus formed, as shown in FIG. 9, a silicon oxide film 15 is formed on the mirror surface 11a of the single crystal silicon substrate 11, and then a groove is formed. The silicon oxide film 15 in the region is removed by RIE, for example. Then, the silicon oxide film 1
Using the mask 5 as a mask, the groove 16 is formed by RIE or wet etching until the embedded silicon oxide film 14 of the substrate 11 is reached. The groove 16 is formed around the element forming region Z1.

Subsequently, as shown in FIG. 10, a polycrystalline silicon film 17 having a thickness of 10 to 2000 nm is formed on the single crystal silicon substrate 13 by LPCVD. As a result, polycrystalline silicon film 17 is arranged in trench 16 and on silicon oxide film 15. The polycrystalline silicon film 17 may or may not be doped with impurities.

Next, as shown in FIG. 11, anisotropic (vertical) etching is performed by dry etching such as RIE to form the polycrystalline silicon film 1 formed on the side wall of the groove 16.
Etching is performed in the form of leaving 7. At this time, the polycrystalline silicon film 17 formed on the silicon oxide film 15 and the buried silicon oxide film 14 is completely removed by using the silicon oxide film 15 and the buried silicon oxide film 14 as etching stoppers.

Thereafter, as shown in FIG. 12, the silicon oxide film 15 is removed with an aqueous solution of hydrogen fluoride. Furthermore, FIG.
As shown in FIG. 3, a silicon oxide film 18 having a thickness of 100 to 2000 nm is formed on the single crystal silicon substrate 13 by thermal oxidation or CVD. At this time, when the silicon oxide film 18 is formed by thermal oxidation, the polycrystalline silicon film 17 is oxidized on the side wall of the groove 16 so that the silicon oxide film 18 is formed.
However, after the silicon oxide film 18 having the required thickness is formed, the polycrystalline silicon film 17 is deposited so that the polycrystalline silicon film 17 having the thickness required for stress relaxation remains. The thickness of the film 17 is preset.

Next, as shown in FIG. 14, a polycrystalline silicon film 19 is formed on the silicon oxide film 18 by LPCVD, for example.
And the inside of the groove 16 is filled. Further, as shown in FIG. 15, the polycrystalline silicon film 19 is replaced with the silicon oxide film 18
Selectively polish as a stopper. Then, as shown in FIG. 16, the silicon oxide film 18 on the mirror surface 11a of the single crystal silicon substrate 11 is removed with an aqueous solution of hydrogen fluoride. After that, the convex portion of the polycrystalline silicon film 19 filling the groove 16 is flattened by mirror polishing. As a result, FIG.
As shown in FIG. 3, a semiconductor substrate having a structure in which the polycrystalline silicon film 17 is interposed between the inner wall of the insulating isolation groove 16 and the silicon oxide film 18 is manufactured.

In such a semiconductor substrate, the single crystal silicon layer (SOI region) 1 made of the silicon oxide film 18 formed on the sidewall of the groove 16 by the polycrystalline silicon film 17 is used.
The stress to 3 can be relaxed. This allows the groove 16
Of forming crystal defects in the single crystal silicon due to stress generated by the difference in thermal expansion between the single crystal silicon and the silicon oxide during the heat treatment in the step of forming the silicon oxide film 18 on the side wall of the substrate and in the step of forming the device. it can.

As described above, in this embodiment, at least one surface is mirror-polished, and the single crystal silicon substrate 11 in which the silicon oxide film 14 is embedded to a predetermined depth from the mirror surface 11a is formed (first 1 step), a silicon oxide film 15 is formed on the mirror surface 11a of the single crystal silicon substrate 11 and is etched using this as a mask to form a groove 16 reaching the silicon oxide film 14 around the element formation region Z1 (first step). 2 steps). And in the groove 16,
Then, a polycrystalline silicon film 17 is formed on the silicon oxide film 15 functioning as a mask (third step), and the polycrystalline silicon film 17 functioning as a mask and the polycrystalline silicon film 17 at the bottom of the groove 16 are The silicon oxide film 15 functioning as a mask and the silicon oxide film 14 buried in the single crystal silicon substrate 11 are removed by dry etching as a stopper, leaving only the polycrystalline silicon film 17 on the side wall of the groove 16. (Fourth step). Further, the silicon oxide film 15 on the mirror surface 11a functioning as a stopper is removed (fifth step), and the silicon oxide film 18 is formed in the groove 16 and on the mirror surface 11a of the single crystal silicon substrate 11 (sixth step). A polycrystalline silicon film 19 is deposited on the silicon oxide film 18 to fill the inside of the groove 16 (seventh step). Subsequently, the polycrystalline silicon film 19 is selectively polished by using the silicon oxide film 18 as a stopper to remove the polycrystalline silicon film 19 in the groove 16 (8th embodiment).
Process), the silicon oxide film 18 on the mirror surface 11a of the single crystal silicon substrate 11 was removed (9th process), and the polycrystalline silicon film 19 in the groove 16 was mirror-polished to be flattened (10th process).

As a result, the structure is such that the polycrystalline silicon film 17 is interposed between the inner wall of the insulating isolation groove 16 and the silicon oxide film 18. In this substrate, due to the difference in thermal expansion coefficient between silicon oxide and single crystal silicon due to the change in temperature, stress tends to be applied to the element forming region Z1 made of single crystal silicon in the vicinity of the groove 16; Since the polycrystalline silicon film 17 is interposed between the inner wall and the silicon oxide film 18, the polycrystalline silicon film 17 alleviates the stress and makes it difficult to induce crystal defects. (Third Embodiment) Next, a third embodiment will be described with reference to FIGS. In this embodiment, as shown in FIG.
It is embodied in a semiconductor substrate in which the element formation region Z1 is insulated and separated by the groove 22 without using the I structure.

First, as shown in FIG. 18, a single crystal silicon substrate 20 having at least one surface mirror-polished is prepared. Then, as shown in FIG. 19, a silicon oxide film 21 is formed on the mirror surface 20 a of the single crystal silicon substrate 20. After that, the silicon oxide film 21 in the region where the groove is formed is removed by, for example, RIE. Further, using the silicon oxide film 21 as a mask, a groove 22 is formed around the element formation region Z1 by RI.
It is formed by E or wet etching.

Then, as shown in FIG. 20, the single crystal silicon substrate 20 has a thickness of 10 to 2000 on the mirror surface 20a side.
A polycrystalline silicon film 23 having a thickness of nm is formed by LPCVD. As a result, polycrystalline silicon film 23 is arranged in trench 22 and on silicon oxide film 21. At this time, the polycrystalline silicon film 23 may not be doped with impurities, but is doped with impurities to form a stopper layer (impurity diffusion layer) 24 having a conductivity type different from that of the single crystal silicon substrate 20. You may keep it. As another method of forming the stopper layer (impurity diffusion layer) 24, before the deposition of the polycrystalline silicon film 23, the silicon oxide film 21 is used as a mask and the sidewalls and the bottom of the groove 22 are doped with impurities by ion implantation. After that, an undoped polycrystalline silicon film 23 may be deposited.

Next, as shown in FIG. 21, by selectively polishing the silicon oxide film 21 as a stopper, the groove 22 is formed.
The polycrystalline silicon film 23 on the silicon oxide film 21 is completely removed by leaving the polycrystalline silicon film 23 on the side walls and the bottom of the. Alternatively, anisotropic (perpendicular) etching may be performed by dry etching such as RIE to leave the polycrystalline silicon film 23 formed on the sidewall of the groove 22. At this time, the polycrystalline silicon film 23 formed on the silicon oxide film 21 is completely removed by using the silicon oxide film 21 as an etching stopper.

Further, as shown in FIG. 22, a thickness of 100 to 200 is provided on the mirror surface 20a side of the single crystal silicon substrate 20.
A 0 nm silicon oxide film 25 is formed by thermal oxidation or CVD. As a result, the silicon oxide film 25 is arranged in the trench 22 and on the silicon oxide film 21. At this time, when the silicon oxide film 25 is formed by thermal oxidation, the polycrystalline silicon 23 is oxidized to form the silicon oxide film 25. However, the silicon oxide film 25 having a required thickness is formed. After that, the thickness of the deposited polycrystalline silicon film 23 is set in advance so that the polycrystalline silicon film 23 having a thickness required for stress relaxation remains. At this time, before forming the silicon oxide film 25, the silicon oxide film 2 is formed.
1 may be removed.

Next, a polycrystalline silicon film 26 is formed on the silicon oxide film 25 by, for example, LCVD to fill the inside of the groove 22. After that, as shown in FIG. 23, the polycrystalline silicon film 26 is selectively polished using the silicon oxide film 25 as a stopper.

Then, as shown in FIG. 24, the silicon oxide films 21 and 2 on the mirror surface 20a of the single crystal silicon substrate 20 are formed.
Remove 5 with aqueous hydrogen fluoride. After that, the convex portion of the polycrystalline silicon film 26 filling the inside of the groove 22 is planarized by mirror polishing. As a result, as shown in FIG.
A semiconductor substrate having a structure in which a polycrystalline silicon film 23 is interposed between the inner wall of the insulating separation groove 22 and the silicon oxide film 25 is manufactured.

By thus forming the semiconductor substrate separated by the groove 22, the stress to the element forming region Z1 due to the silicon oxide film 25 formed on the side wall of the groove 22 by the polycrystalline silicon film 23 can be relaxed. it can. This induces crystal defects in the single crystal silicon due to the stress generated by the thermal expansion difference between the single crystal silicon and the silicon oxide in the step of forming the silicon oxide film 25 on the sidewall of the groove 22 and the heat treatment in the device forming step. Can be prevented.

As described above, in this embodiment, the mirror surface 2 of the single crystal silicon substrate 20 having at least one surface mirror-polished
After the silicon oxide film 21 is formed on the silicon oxide film 0a, a groove 22 is formed around the element forming region Z1 using the silicon oxide film 21 as a mask (first step), and the silicon oxide film functioning in the groove 22 and as the mask is formed. A polycrystalline silicon film 23 is formed on 21 (second step). Then, with respect to the polycrystalline silicon film 23, at least the polycrystalline silicon film 23 on the side wall of the groove 22 is removed and left (the third step), and the silicon oxide film is formed in the groove 22 and on the mirror surface 20a of the single crystal silicon substrate 20. 25 (fourth step), a polycrystalline silicon film 26 is deposited on the silicon oxide film 25 to fill the inside of the groove 22 (fifth step). Further, for the polycrystalline silicon film 26,
By selectively polishing the silicon oxide film 25 as a stopper, the polycrystalline silicon film 26 in the groove 22 is removed and left (sixth step), and the silicon oxide film 21, which remains on the mirror surface 20a of the single crystal silicon substrate 20, is removed. 25 removed (7th
Process), the polycrystalline silicon film 26 in the groove 22 was mirror-polished to be planarized (eighth process).

As a result, a structure is obtained in which the polycrystalline silicon film 23 is interposed between the inner wall of the insulating separation groove 22 and the silicon oxide film 25. In this substrate, due to the difference in thermal expansion coefficient between silicon oxide and single crystal silicon due to a change in temperature, stress tends to be applied to the element forming region Z1 made of single crystal silicon in the vicinity of the groove 22. Since the polycrystalline silicon film 23 is interposed between the inner wall and the silicon oxide film 25, the polycrystalline silicon film 23 alleviates the stress and makes it difficult for crystal defects to be induced.

[0042]

As described in detail above, according to the invention described in claim 1, the excellent effect of suppressing the induction of crystal defects in the vicinity of the groove is exhibited.

According to the invention described in claims 2, 3 and 4,
The semiconductor substrate according to claim 1 can be easily manufactured.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor substrate of a first embodiment.

FIG. 2 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the first embodiment.

FIG. 3 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the first embodiment.

FIG. 4 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the first embodiment.

FIG. 5 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the first embodiment.

FIG. 6 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the first example.

FIG. 7 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the first example.

FIG. 8 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 9 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 10 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 11 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 12 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second example.

FIG. 13 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 14 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 15 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 16 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second embodiment.

FIG. 17 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the second example.

FIG. 18 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 19 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 20 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 21 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 22 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 23 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 24 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third example.

FIG. 25 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of the third embodiment.

FIG. 26 is a sectional view for explaining a conventional technique.

FIG. 27 is a sectional view for explaining a conventional technique.

[Explanation of symbols]

1 ... 1st single crystal silicon substrate, 1a ... Mirror surface, 4 ... groove,
5 ... Polycrystalline silicon film 6 ... Silicon oxide film, 7 ... Polycrystalline silicon film, 8 ... Second single crystal silicon substrate, 8a ... Mirror surface, 9 ... Bonded substrate, 11 ... Single crystal silicon substrate,
11a ... mirror surface, 14 ... silicon oxide film, 15 ... silicon oxide film, 16 ... groove, 17 ... polycrystalline silicon film, 18 ... silicon oxide film, 19 ... polycrystalline silicon film, 20 ... single crystal silicon substrate, 20a ... mirror surface , 21 ... Silicon oxide film,
22 ... Groove, 23 ... Polycrystalline silicon film, 25 ... Silicon oxide film, 26 ... Polycrystalline silicon film, Z1 ... Element forming region

Claims (4)

[Claims] 1. A semiconductor substrate in which an insulating separation groove is formed around an element forming region made of single crystal silicon and a silicon oxide film is formed in the groove, wherein an inner wall of the insulating separation groove and the oxide are formed. A semiconductor substrate having a polycrystalline silicon film interposed between the silicon substrate and the silicon film. 2. A first step of forming a groove around an element forming region on the mirror surface side of a first single crystal silicon substrate whose at least one surface is mirror-polished, and a mirror surface of the first single crystal silicon substrate. And a second step of forming a polycrystalline silicon film in the groove, a third step of forming a silicon oxide film on the polycrystalline silicon film, and a step of depositing a polycrystalline silicon film on the silicon oxide film to form the groove. A fourth step of filling the inside, a fifth step of mirror-polishing and flattening the surface of the polycrystalline silicon film formed in the fourth step, and a mirror-polished polycrystal of the first single crystal silicon substrate. A sixth step of forming a bonded substrate by bonding a silicon surface and a mirror surface of a second single crystal silicon substrate having at least one surface mirror-polished, and the first step in the bonded substrate. Single crystal And a seventh step of exposing the silicon oxide film formed in the groove to the surface by grinding and mirror-polishing the other surface of the silicon substrate. 3. A first step of forming a single crystal silicon substrate in which at least one surface is mirror-polished and a silicon oxide film is embedded to a predetermined depth from the mirror surface; A second step of forming a silicon oxide film on the mirror surface and etching the silicon oxide film using the mask as a mask to form a groove reaching the silicon oxide film in the periphery of the element formation region; and functioning in the groove and as the mask. A third step of forming a polycrystalline silicon film on the silicon oxide film; a silicon oxide film on which the polycrystalline silicon film on the silicon oxide film functioning as the mask and on the bottom of the groove function as the mask; The silicon oxide film embedded in the single crystal silicon substrate is removed by dry etching using the stopper as a stopper, so that the sidewall portion of the groove is largely removed. A fourth step of leaving only the crystalline silicon film, a fifth step of removing the silicon oxide film on the mirror surface functioning as the stopper, and a silicon oxide film in the groove and on the mirror surface of the single crystal silicon substrate. A sixth step, a seventh step of depositing a polycrystalline silicon film on the silicon oxide film formed in the sixth step to fill the inside of the groove, and the polycrystalline silicon film formed in the seventh step, Eighth step of selectively removing the polycrystalline silicon film in the groove by selectively polishing the silicon oxide film formed in the sixth step as a stopper; and removing the silicon oxide film on the mirror surface of the single crystalline silicon substrate. 9. A method of manufacturing a semiconductor substrate, comprising 9 steps and a 10th step of polishing the polycrystalline silicon film in the groove by mirror-polishing. 4. A first step of forming a silicon oxide film on a mirror surface of a single crystal silicon substrate, at least one surface of which has been mirror-polished, and then forming a groove around an element formation region using the silicon oxide film as a mask. And a second step of forming a polycrystalline silicon film in the groove and on the silicon oxide film functioning as the mask, leaving at least the polycrystalline silicon film on the side wall of the groove with respect to the polycrystalline silicon film. A third step of removing, a fourth step of forming a silicon oxide film in the groove and on the mirror surface portion of the single crystal silicon substrate, and a polycrystalline silicon film deposited on the silicon oxide film formed in the fourth step. 5th step of filling the inside of the groove with a groove, and by selectively polishing the polycrystalline silicon film formed in the 5th step using the silicon oxide film formed in the 4th step as a stopper A sixth step of removing the polycrystalline silicon film remaining, a seventh step of removing the silicon oxide film remaining on the mirror surface of the single crystal silicon substrate, and a mirror polishing of the polycrystalline silicon film in the groove. Eighth step of flattening by means of a flattening process.