JPH07326765A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent a hillock from being generated in aluminium wirings under a passivation film when the passivation film is formed. CONSTITUTION:When aluminium wirings are formed, an aluminium film 108 is first formed on the whole surface of a substrate. A current is made to flow through a metal in an electrolyte solution, the metal is anodized and an anodized film 109 is formed. After that, the films 108 and 109 are etched and the aluminium wirings 110 are formed. As the surfaces of these wirings 110 are covered with the anodized film, the generation of a hillock in the aluminium wirings can be inhibited when a passivation film 111 is formed.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (T
The present invention relates to a semiconductor device using FT). In particular, the present invention relates to a semiconductor device that can be used for an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art As a semiconductor device having a TFT, an active type liquid crystal display device, an image sensor and the like are known. When the element is exposed to the outside air, the TFT used in these devices is affected by moisture in the outside air,
There was a problem that performance deteriorated. Therefore, in order to protect the element from the outside air, the entire element is covered with a passivation film made of a material whose main component is silicon nitride.

[0003]

However, when aluminum is used for the source / drain electrodes / wirings under the passivation film, the heat generated during the formation of the passivation film affects the surface of the aluminum film.
Hillocks in which aluminum crystallizes in the form of protrusions are generated. Then, there is a problem that the wiring is short-circuited by the hillock.

[0004]

The present invention is intended to suppress the generation of hillocks during the formation of a passivation film by forming an anodized film having a thickness of 50 to 500Å on the surface of an aluminum wiring. First, contact holes are formed in the source / drain by a known TFT manufacturing method. Then, an aluminum film for forming aluminum wiring is formed into a film having a thickness of 3000 Å to 2 by a sputtering method or the like.
The film is formed to a thickness of μm, preferably 4000 to 8000 Å. At this time, in order to further suppress hillocks, Si, Sc, Cu, or the like is added as an impurity to the used aluminum by 5%.
You may use what added to about wt%.

Then, an anodic oxidation is conducted in the electrolytic solution by applying an electric current to form a barrier type anodic oxide having a thickness of 50 to 500 Å. The barrier type anodic oxide is suitable for the purpose of the present invention because it has high hardness and is dense. In order to obtain a barrier type anodic oxide, what is to be anodized may be connected to the positive electrode in a substantially neutral appropriate electrolytic solution, and current may be applied while increasing the voltage. For example, as an electrolytic solution, for example, L-tartaric acid in ethylene glycol
What was diluted with the density | concentration of%, and adjusted pH to about 7 using ammonia, etc. are used. Dip the substrate in this solution,
Connect the + side of the constant current source to the aluminum film on the substrate,
A platinum electrode is connected to the side to apply a voltage in a constant current state, and oxidation is continued until a voltage of about 5 to 30 V is reached. Further, current is applied in a constant voltage state, and oxidation is continued until almost no current flows. As a result, an aluminum oxide film is obtained on the aluminum film. The thickness of the aluminum oxide coating is almost proportional to the applied voltage, and the higher the voltage, the thicker the coating obtained.

Here, the thicker the film thickness of the aluminum oxide film functions as a better barrier, but it is necessary to increase the applied voltage in order to increase the film thickness. However, if the applied voltage is increased, the device may be destroyed. Therefore, the voltage and the film thickness of the aluminum oxide film may be determined so as not to destroy the element. Then, the aluminum film and the aluminum oxide film thus obtained are etched to form an aluminum wiring whose upper surface is covered with aluminum oxide. After that, if a passivation film is formed, the anodic oxide film exists on the surface of the aluminum film, so that the generation of hillocks can be suppressed.

[0007]

By forming the anodic oxide film on the surface of the aluminum wiring, the passivation film can be formed without generating hillocks on the surface of the aluminum wiring.
Therefore, defects that break through the passivation film are drastically reduced. As a result, the passivation film can be made thin, which is extremely effective in miniaturizing the TFT.
Further, conventionally, when a TFT is used in a pixel portion of a liquid crystal display device, hillocks of a source / drain electrode / wiring may be in contact with the counter electrode to cause a short circuit. However, according to the present invention, the hillock is in contact with the counter electrode. And the rate of non-defective products is improved.

[0008]

【Example】

[Embodiment 1] FIG. 1 shows this embodiment. First, the substrate 101
A silicon oxide film 102 having a thickness of 1000 to 5000 Å, for example 2000 Å, was formed as a base oxide film on (Corning 7059, 100 mm × 1000 mm). This oxide film is formed by sputtering in an oxygen atmosphere, TEO.
There is a method of decomposing and depositing S by a plasma CVD method, etc., but here, it is formed by a sputtering method in an oxygen atmosphere. Further, the silicon oxide film thus formed may be annealed at 400 to 650 ° C.

Thereafter, an amorphous silicon film is deposited by plasma CVD or LPCVD to a thickness of 300 to 5000 Å, preferably 400 to 1000 Å, for example, 500 Å, and this is left in a reducing atmosphere at 550 to 600 ° C. for 8 to 24 hours. Then, it was crystallized. At that time, a small amount of nickel may be added to promote crystallization. Further, this step may be performed by laser irradiation. And
The crystallized silicon film was etched to form the island region 103. Further, a gate insulating film was formed on this. Here, the thickness is set to 7 by the plasma CVD method.
00 to 1500Å, for example, 1200Å silicon oxide film 1
04 was formed.

Thereafter, an aluminum (containing 1 wt% Si or 0.1-0.3 wt% Sc (scandium)) film having a thickness of 1000 Å to 3 μm, for example 5000 Å, is formed by a sputtering method, and this film is formed. Etching was performed to form the gate electrode 105. Then, the gate electrode 105 was anodized by passing an electric current in an electrolytic solution to form an anodic oxide having a thickness of 500 to 2500Å, for example, 2000Å. The electrolytic solution used was prepared by diluting L-tartaric acid in ethylene glycol at a concentration of 5% and adjusting the pH to 7.0 ± 0.2 using ammonia. The substrate is immersed in the solution, the + side of the constant current source is connected to the gate electrode on the substrate, the platinum electrode is connected to the-side, and voltage is applied at a constant current of 20 mA until 150V is reached. Oxidation was continued. In addition, at a constant voltage of 150V, add 0.1
Oxidation was continued until it became mA or less. As a result, thickness 2
A 000Å aluminum oxide film was obtained. (Fig. 1
(A))

After that, an impurity (here, phosphorus) is self-alignedly injected into the island-shaped silicon film 103 by ion doping using the gate electrode portion 105 (that is, the gate electrode and the anodic oxide film around the gate electrode) as a mask, The N type impurity region 106 was formed. Here, the dose amount is 1 × 10 ¹⁵ to
8 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 60 to 90 kV,
For example, the dose amount was 5 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage was 80 kV. Furthermore, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was irradiated to activate the doped impurities. Laser energy density is 200-400 mJ / c
m ^2, and a preferably suitably 250~300J / cm ^2. Since aluminum is used for the gate electrode in this embodiment, there is a problem in heat resistance and it is difficult to carry out, but thermal annealing may be performed instead of laser irradiation. (Fig. 1 (B))

Next, a silicon oxide film 107 having a thickness of 5000 Å was formed on the entire surface as an interlayer insulating film by the CVD method.
Then, the interlayer insulating film 107 and the gate insulating film 104 were etched to form contact holes in the source / drain of the TFT. After that, an aluminum film 108 having a thickness of 3000 Å to 2 μm, preferably 4000 to 8000 Å, for example, 5000 Å, was formed by a sputtering method. Then, similarly to the above-mentioned anodization, anodization was performed by passing an electric current in an electrolytic solution to form an anodized oxide 109 having a thickness of 50 to 500Å, for example, 100Å. Again, as a solution,
L-tartaric acid was diluted with ethylene glycol at a concentration of 5%, and the pH thereof was adjusted to 7.0 ± 0.2 with ammonia. The substrate was immersed in this solution, the positive side of the constant current source was connected to the aluminum film 108 on the substrate, the platinum electrode was connected to the negative side, and a voltage was applied at a constant current state of 20 mA, and 5 to 30 V was applied. Here, the oxidation was continued until it reached 10V. Furthermore, 0.1V is added at a constant voltage of 0.1V.
Oxidation was continued until it became mA or less. As a result, an aluminum oxide film 109 having a thickness of about 100Å was obtained.
(Fig. 1 (C))

Then, the aluminum film 108 and the aluminum oxide film 109 thus obtained were etched to form a second layer aluminum wiring 110. After that, a passivation film 111 was formed in order to protect the element from the outside air. Here, NH ₃ / SiH ₄ / H
Silicon nitride was deposited to a film thickness of 2000 to 8000Å, for example, 4000Å by the plasma CVD method using ₂ mixed gas. The substrate temperature during film formation was 250 to 350 ° C. (FIG. 1D) In general, when a silicon nitride film is formed directly on an aluminum film, hillocks are generated on the aluminum surface due to a temperature increase during film formation. However, in this embodiment, a hillock is formed on the aluminum film. Since the anodic oxide film was formed, the generation of hillocks was suppressed.

[Second Embodiment] FIG. 2 shows the present embodiment. This embodiment relates to a CMOS type TFT. First, the substrate 201
A silicon oxide film 202 having a thickness of 1000 to 5000 Å, for example, 2000 Å, was formed as an underlying oxide film by a plasma CVD method. Further, the silicon oxide film thus formed may be annealed at 400 to 650 ° C. afterwards,
An amorphous silicon film is formed in a thickness of 300 to 50 by plasma CVD method.
00Å, preferably 400 to 1000Å, for example 50
0Å was deposited, and this was left to stand in a reducing atmosphere at 550 to 600 ° C. for 8 to 24 hours to be crystallized. In that case,
A small amount of nickel may be added to promote crystallization.
Further, this step may be performed by laser irradiation. Then, the crystallized silicon film was etched to form island regions 203 and 204. further,
A gate insulating film was formed on this. Here, the thickness is 700 to 1500 Å, for example, 1 by the plasma CVD method.
A 200 Å silicon oxide film 205 was formed.

After that, an aluminum film having a thickness of 1000 Å to 3 μm, for example, 5000 Å, is formed by a sputtering method, and this is etched to form the gate electrodes 206, 2.
07 was formed. Then, under the same conditions as in Example 1, an electric current was applied to the gate electrode in the electrolytic solution to carry out anodization to obtain a thickness of 5
Anodized oxide of 00 to 2500Å, for example 2000Å, was formed. (FIG. 2A) Next, the island-shaped silicon film 20 is formed by an ion doping method.
Impurities were implanted into the layers 3, 204 in a self-aligned manner using the gate electrode portions 206, 207 as masks. First, phosphorus was implanted into the entire surface to form N type impurity regions 208 and 209. Here, the dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ atoms / cm ² ,
The acceleration voltage is 60 to 90 kV, for example, the dose amount is 2 × 1.
The acceleration voltage was set to 0 ¹⁵ atoms / cm ² and 80 kV. (Fig. 2
(B))

After that, the region of the N-channel type TFT is masked with a photoresist 210, and in this state, boron is implanted to invert the conductivity type of the impurity region 209 which was N-type to form a P-type impurity region 211. did. 1x dose
10 ¹⁵ to 8 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 40 to 8
0 kV, for example, the dose amount was set to 5 × 10 ¹⁵ atoms / cm ² , which is larger than that of the previously implanted phosphorus, and the acceleration voltage was set to 65 kV.
(FIG. 2C) Further, the KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was irradiated to activate the doped impurities. The energy density of the laser was 200 to 400 mJ / cm ² , preferably 250. ~ 3
00 J / cm ² was suitable.

Next, a silicon oxide film 212 having a thickness of 5000 Å was formed on the entire surface as an interlayer insulating film by the CVD method.
Then, the interlayer insulating film 212 and the gate insulating film 205 were etched to form contact holes in the source / drain of the TFT. Thereafter, an aluminum film 213 having a thickness of 3000 Å to 2 μm, preferably 4000 to 8000 Å, for example, 5000 Å, was formed by a sputtering method. Then, similarly to the above-mentioned anodization, anodization was performed by passing an electric current in an electrolytic solution to form an anodized oxide having a thickness of 50 to 300Å, for example, 150Å. Now immerse the substrate in the solution,
Connect the + side of the constant current source to the aluminum film on the substrate,
A platinum electrode was connected to the side and a voltage was applied in a constant current state of 20 mA, and oxidation was continued until it reached 5 to 30 V, here 10 V. Furthermore, at a constant voltage of 10 V, oxidation was continued until the current became 0.1 mA or less. As a result,
An aluminum oxide film 214 having a thickness of 150Å was obtained. (Fig. 2 (D))

Then, the aluminum film 213 and the aluminum oxide film 214 thus obtained are etched, and the second-layer aluminum wirings 215, 216 and 217 are etched.
Was formed. After that, the passivation film 218 was formed. Here, silicon nitride oxide (SiO _x N _y ) is added to 2000 to 8000 Å, for example, 4 by a plasma CVD method using a mixed gas of NH ₃ / SiH ₄ / N ₂ O / H _2.
The film was formed to a film thickness of 000Å. (FIG. 2 (E)) In this case also, since the anodic oxide film 214 was formed on the aluminum film, the generation of hillocks was suppressed.

[Embodiment 3] FIG. 3 shows the present embodiment. The TFT shown in this embodiment relates to a TFT arranged in a pixel portion of an active matrix type liquid crystal display device. First, a 2000 Å-thick silicon oxide film 302 was formed as a base oxide film on a substrate 301. After that, plasma CVD
The amorphous silicon film is deposited by 500 Å by the
Leave in a reducing atmosphere at 50-600 ° C for 8-24 hours,
Crystallized. At that time, a small amount of nickel may be added to promote crystallization. Further, this step may be performed by laser irradiation. Then, the crystallized silicon film is etched to form island regions 303.
Was formed. Further, a gate insulating film is formed on this. Here, a 1200 Å silicon oxide film 304 was formed by the plasma CVD method.

After that, an aluminum film having a thickness of 1000 Å to 3 μm, for example, 6000 Å was formed by the sputtering method. Then, a thin anodic oxide film having a thickness of 100 to 400 Å was formed on the surface of the aluminum film in order to maintain the adhesion with the photoresist in the next anodic oxidation process. Then, a photoresist having a thickness of about 1 μm was formed on the aluminum film thus treated by spin coating. Then, a gate electrode was formed by a known photolithography method. The gate electrode 305 was formed. Here, a photoresist mask 306 exists on the gate electrode. (FIG. 3 (A)) Next, the substrate is immersed in a 10% oxalic acid aqueous solution for 5 to 50 V,
For example, a porous anodic oxide 307 having a thickness of about 5000Å was formed on the side surface of the gate electrode by performing anodization at a constant voltage of 8 V for 10 to 500 minutes, for example, 200 minutes. A photoresist mask material 3 on the upper surface of the gate electrode
Since 06 was present, anodization hardly proceeded. (Fig. 3 (B))

Next, the mask material 306 is removed to expose the upper surface of the gate electrode, and the substrate is dipped in an ethylene glycol solution of 3% tartaric acid (neutral pH adjusted with ammonia), and an electric current is applied to this. Then, a voltage was applied in a constant current state of 20 mV, the voltage was raised to 100 V, and anodization was performed. At this time, not only the upper surface of the gate electrode but also the side surface of the gate electrode was anodized to form a dense non-porous anodic oxide having a thickness of 1000 Å. After that, an impurity (here, phosphorus) is injected into the island-shaped silicon film 303 in a self-aligning manner by using the gate electrode portion (that is, the gate electrode and the anodic oxide film around the gate electrode) as a mask by an ion doping method to form an N-type impurity. A region 308 was formed. Here, the dose amount was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ atoms / cm ² , the acceleration voltage was 60 to 90 kV, for example, the dose amount was 5 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage was 80 kV. (Fig. 3 (C))

Then, the porous anodic oxide 307 was etched with a phosphoric acid-based etchant to expose the non-porous anodic oxide. Since the phosphoric acid-based etchant has an extremely low etching rate with respect to non-porous anodic oxide,
Only the porous anodic oxide 307 can be selectively etched, and the non-porous anodic oxide and the aluminum gate therein are protected by this etching process. Further, at this time, since the impurity (phosphorus) is not doped in the lower portion of the portion where the porous anodic oxide was present, it is an offset region. After that, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was irradiated to activate the doped impurities. Laser energy density is 200-400 mJ / c
m ^2, and a preferably suitably 250~300J / cm ^2. At this time, the laser was also applied to the boundary between the impurity region 308 and the offset region, which was effective in preventing deterioration at the boundary.

Next, a silicon oxide film 309 having a thickness of 5000 Å was formed on the entire surface as an interlayer insulating film by the CVD method.
Then, the interlayer insulating film 309 and the gate insulating film 304 were etched to form contact holes in the source / drain of the TFT. After that, an aluminum film 310 of 3000 Å to 2 μm, preferably 4000 to 8000 Å, for example, 5000 Å, was formed by the sputtering method. Then, as in Example 1, anodic oxidation was performed to form a 100 Å anodic oxide 311. (FIG. 3D) The aluminum film 310 thus obtained
Then, the aluminum oxide film 311 was etched to form a second layer aluminum wiring 312. After that, a silicon nitride film having a thickness of 3000 Å was formed as the passivation film 313. Also in this step, the formation of hillocks was suppressed because the anodic oxide film was present on the aluminum film.

After that, the passivation film 313, the interlayer insulating film 309, and the gate insulating film 304 are etched,
A contact hole for the pixel electrode was formed. Then, an ITO (indium tin oxide) film was formed and etched to form a pixel electrode 314 of ITO. (Fig. 3
(E) Although the present embodiment relates to the liquid crystal display device, in the liquid crystal display device, the gap between the counter substrate and the active matrix substrate is only about 5 μm, and the contact between the counter substrate due to the hillock of the wiring is a serious problem. there were. In this embodiment,
Since the hillocks of the wiring can be suppressed, the non-defective rate could be improved.

[Embodiment 4] FIG. 4 shows the present embodiment. The TFT shown in this embodiment relates to a TFT arranged in a pixel portion of an active matrix type liquid crystal display device. First, a 2000 Å-thick silicon oxide film 402 was formed as a base oxide film on a substrate 401. After that, plasma CVD
The amorphous silicon film is deposited by 500 Å by the
Leave in a reducing atmosphere at 50-600 ° C for 8-24 hours,
Crystallized. At that time, a small amount of nickel may be added to promote crystallization. Further, this step may be performed by laser irradiation. Then, the crystallized silicon film is etched to form island regions 403.
Was formed. Further, a gate insulating film was formed on this. Here, a 1200 Å silicon oxide film 404 was formed by a plasma CVD method.

After that, an aluminum film having a thickness of 1000 Å to 3 μm, for example, 6000 Å was formed by a sputtering method, and this was etched to form a gate electrode 405. Then, an electric current was applied to the gate electrode in an electrolytic solution to carry out anodization to form an anodic oxide having a thickness of 2000 liters. (FIG. 4A) Then, the silicon oxide film 406 is formed by a plasma CVD method.
Was deposited. This silicon oxide film 406 is used to form sidewalls. Therefore, the optimum thickness of the silicon oxide film varies depending on the height of the gate electrode. When the height of the gate electrode portion (that is, the gate electrode and the anodic oxide film around the gate electrode) is about 6000Å as in this embodiment, it is preferably ⅓ to 1.2 μm, which is ⅓ to Ⅻ of the height. , 6000Å. (Fig. 4 (B))

Next, this silicon oxide film was etched by performing anisotropic dry etching by the known RIE method. This etching was completed when the etching reached the gate insulating film. Through the above steps, the substantially triangular insulator 407 (sidewall) was formed on the side surface of the gate electrode portion. (Fig. 4
(C)) Thereafter, the island-shaped silicon film 40 is formed by an ion doping method.
An impurity (phosphorus in this case) is self-aligned with the gate electrode portion 405 and the sidewall 407 as a mask, and an N-type impurity region 408 is formed. Here, the dose amount was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ atoms / cm ² , the acceleration voltage was 60 to 90 kV, for example, the dose amount was 5 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage was 80 kV. At this time, no impurities were injected into the lower part of the sidewall, and the region became an offset region.

Furthermore, a KrF excimer laser (wavelength 2
Irradiation with 48 nm and a pulse width of 20 nsec) was performed to activate the doped impurities. The energy density of the laser was 200 to 400 mJ / cm ² , preferably 250 to 300 J / cm ² . (Fig. 4
(D) Next, a silicon oxide film 409 having a thickness of 5000 Å was formed as an interlayer insulating film on the entire surface by a CVD method. Then, the interlayer insulating film 409 and the gate insulating film 404 were etched to form contact holes in the source / drain. After that, 3000Å to 2 μm, preferably 4000 to 800
An aluminum film 410 of 0 Å, for example, 6000 Å was formed by the sputtering method. Then, in the same manner as the anodization, an electric current is applied in the electrolytic solution to perform anodization to obtain a thickness of 50
~ 500Å, eg 250Å, of anodic oxide 411 was formed. (Fig. 4 (E))

Then, the aluminum film 410 and the aluminum oxide film 411 thus obtained were etched to form a second layer aluminum wiring 412. After that, silicon nitride is used as a passivation film 413 in an amount of 400
The film was formed to a film thickness of 0Å. After that, the passivation film 4
13, the interlayer insulating film 409 and the gate insulating film 404 were etched to form contact holes for pixel electrodes. Then, an ITO film was formed and etched to form an ITO pixel electrode 414. (FIG. 4F) Through the steps described above, the pixel TFT having the offset region under the sidewall was formed.

[0030]

According to the present invention, it is possible to suppress the occurrence of hillocks in the second layer aluminum wiring and to reduce defective portions such as a short circuit in the wiring. In particular, when an integrated circuit is manufactured, it is composed of a large number of elements and wirings, but if any one of them is defective, the whole may be unusable. The present invention is extremely effective in greatly reducing such defective points and increasing the yield rate of integrated circuits.

[Brief description of drawings]

FIG. 1 shows the process in Example 1.

2 shows the steps in Example 2. FIG.

FIG. 3 shows the steps in Example 3.

FIG. 4 shows steps in Example 4.

[Explanation of symbols]

 Reference Signs List 101 substrate 102 base oxide film (silicon oxide) 103 island region 104 gate insulating film (silicon oxide) 105 gate electrode 106 impurity region 107 interlayer insulating film (silicon oxide) 108 aluminum film 109 anodic oxide film 110 source / drain electrode 111 passivation Film (silicon nitride)

Claims (7)

[Claims] 1. In a semiconductor device using a thin film transistor, there is an anodic oxide film obtained by closely adhering to a wiring containing aluminum as a main component and anodizing the wiring containing aluminum as a main component, A semiconductor device having a coating film containing silicon nitride as a main component, which is in close contact with the anodic oxide coating film. 2. In a semiconductor device using a thin film transistor, there is an anodic oxide film obtained by closely adhering to a wiring containing aluminum as a main component and anodizing the wiring containing aluminum as a main component, A semiconductor device having a passivation film in close contact with the anodic oxide coating. 3. The aluminum according to claim 1 or 2, wherein 5% by weight or less of Si, Sc, or Cu as an impurity is added to aluminum used for a wiring containing aluminum as a main component.
A semiconductor device characterized in that one to which is added is used. 4. The semiconductor device according to claim 1, wherein the wiring containing aluminum as a main component is formed in an active matrix type liquid crystal display device. 5. A first step of forming an island-shaped semiconductor layer, a gate insulating film covering the semiconductor layer, and a gate electrode made of a material containing aluminum as a main component on the gate insulating film, the gate electrode. A second step of introducing impurities into the semiconductor layer in a self-aligning manner using the mask as a mask, and a third step of forming an interlayer insulating film to cover the gate electrode and forming a contact hole in the source or / and the drain. A fourth step of forming a film containing aluminum as a main component on the entire surface, and forming an anodized film by anodizing the film containing aluminum as a main component; and a film containing the aluminum as a main component. A fifth step of etching the anodic oxide film to form a second layer wiring containing aluminum as a main component, and forming a film mainly containing silicon nitride to cover the second layer wiring. Method of manufacturing a semiconductor device, characterized in that it comprises a sixth step, the to. 6. The aluminum used for the second layer wiring in the fifth step according to claim 5, wherein Si, Sc and Cu as impurities are 5 wt% or less.
A method for manufacturing a semiconductor device, characterized in that a material to which is added is used. 7. The method according to claim 5, wherein after the sixth step, a step of etching the film containing silicon nitride as a main component to form a contact hole, and a step of forming a pixel electrode with a transparent conductive film. And a method for manufacturing a semiconductor device.