JPH07307904A - Dual screen television receiver - Google Patents

Abstract

PURPOSE:To display two pictures based on two television signals different in aspect ratios, with high definition. CONSTITUTION:A picture mode deciding circuit 35 decides the picture modes of video signals for a master screen and a slave screen. A scanning line converting circuit 45 to which a master image signal is applied, for example, converts the number of scanning lines in the master image signal and matches that number with the number of scanning lines in a slave image signal. The output of the scanning line converting circuit 45 is horizontally compressed by a horizontal compressing circuit 46 and the slave image signal is horizontally compressed by a horizontal compressing circuit 49. The phases of master and slave image signals, with time bases compressed, are adjusted and those signals are respectively arranged at the first half and latter half of a horizontal scanning period. A picture switching circuit 48 supplies the outputs of the horizontal compressing circuits 46 and 49 to a monitor 51 while switching them corresponding to picture scanning. Thus, the master and slave pictures are displayed on the left side and right side of the display screen of the monitor 51 with the same number of valid scanning lines and picture definition is improved.

Description

Detailed Description of the Invention

[Object of the Invention]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dual-screen television receiver suitable for use with a wide aspect display screen.

[0002]

2. Description of the Related Art In recent years, wide aspect television receivers (hereinafter referred to as wide television receivers) having a horizontal aspect ratio of 16: 9 have become widespread in order to enable the viewing of programs with a high sense of presence. ing. The aspect ratio of wide-screen TV receivers is HDTV that uses satellite broadcasting.
(High Definition TV) Broadcast and 2nd generation EDTV
(Extended Definition TV) Same as the aspect ratio of broadcasting. Wide television receivers also typically have a tuner for receiving current terrestrial broadcasts with an aspect ratio of 4: 3. Further, in response to the demand for higher functionality, wide-screen television receivers include satellite broadcast receiving tuners, teletext tuners and M
It also has a built-in decoder for receiving USE broadcasts.

In addition, a dual-screen projection function for simultaneously displaying desired two-channel images of a plurality of external video signals input from the plurality of tuners and external signal input terminals is added. Wide TV receivers have been commercialized.

FIG. 11 is a block diagram showing a conventional two-screen television receiver having such a two-screen projection function. In FIG. 11, the tuner section, the detection section, and the audio section are not shown.

A baseband video signal for the main screen is input to the input terminal 1, and a baseband video signal for the subscreen is input to the input terminal 2. The video signal for the parent screen is amplified by the video amplifier circuit 3 and then supplied to the video signal processing circuit 4 and the sync separation circuit 5. The sync separation circuit 5 separates the horizontal and vertical sync signals from the video signal for the parent screen and outputs them to the deflection circuit 6 and the memory control circuit 16. The video signal processing circuit 4 separates the video signal for the parent screen into a luminance signal and a chrominance signal, then performs image quality improvement processing and the like, and outputs the parent image signal to the terminal a of the switch 7.

On the other hand, the video signal for the sub-screen input through the input terminal 2 is amplified by the video amplifier circuit 8 and then supplied to the video signal processing circuit 9 and the sync separation circuit 10. The sync separation circuit 10 separates the horizontal and vertical sync signals from the sub-picture video signal and supplies them to the memory control circuit 16. The video signal processing circuit 9 separates the video signal for the child screen into a luminance signal and a chrominance signal and outputs them to the A / D converter 11. A clock is given to the A / D converter 11 from the memory control circuit 16, and the brightness signal and the color signal for the child screen are converted into digital signals and output to the image memory 12.

Writing and reading of the image memory 12 are controlled by writing and reading control signals from the memory control circuit 16, respectively. The memory control circuit 16 writes the luminance signal and the color signal from the A / D converter 11 in the image memory 12 based on the horizontal and vertical synchronizing signals for the child screen. In this case, the output of the A / D converter 11 is thinned out and writing is performed according to the projected size of the small screen. The luminance signal and the color signal written in the image memory 12 are read in synchronization with the screen scanning of the parent screen by the read control signal based on the horizontal and vertical synchronizing signals for the parent screen. The luminance signal and the chrominance signal read from the image memory 12 are returned to analog signals by the D / A converter 13, and then as a child image signal, the terminal b of the switch 7
Is supplied to.

The switch 7 is switch-controlled by the memory control circuit 16. The memory control circuit 16 gives the switch 7 a timing signal indicating the parent screen display period and the child screen display period. The switch 7 selects the terminal a to output the parent image signal from the video signal processing circuit 4 when the parent screen display period is designated by the timing signal, and selects the terminal b when the child screen display period is designated. Then, the child image signal from the D / A converter 13 is output. The output of the switch 7 is a video output circuit
After being converted into R, G, B signals by 14, it is supplied to the monitor 15. The deflection of the monitor 15 is controlled by the deflection circuit 6, and an image based on the input R, G, B signals is displayed. As a result, the parent screen is displayed in the parent screen area on the display screen of the monitor 15, and for example, in the child screen area whose area ratio is 1/4 to 1/9, the parent screen is replaced with the child image signal. The child screen based on it is reduced. FIG. 12 shows the image memory 12
3 is a timing chart for explaining writing and reading from the. FIG. 13 is an explanatory diagram for explaining the screen display in this case. FIG. 12A shows the input terminal 2
12 shows a video signal for a sub-screen input via FIG.
12B shows the timing signal from the memory control circuit 16, and FIG. 12C shows the parent image signal.

As shown in FIGS. 12 (a) and 12 (c), the video signal for the child screen and the video signal for the parent screen are asynchronous. The video signal for the child screen is written in the image memory 12 while being thinned out. Then, the read signal is read by the read control signal based on the horizontal and vertical synchronizing signals of the parent image signal, and the high level (hereinafter, “H”) of the timing signal (FIG. 12B).
During the period), it is supplied to the monitor 15 as a child image signal via the switch 7 and the video output circuit 14. 12
The shaded area in (c) indicates the period during which the child image signal is selected by the switch 7. The switch 7 selects the parent image signal during the low level (hereinafter referred to as “L”) period of the timing signal.

FIG. 12 (c) shows that a child screen area exists on the lower side from the center in the vertical direction on the display screen. FIG. 13 shows a screen display in this case. On the display screen 18, the parent screen is displayed in the parent screen area 19 and the child screen is displayed in the child screen area 20.

By the way, in recent years, second-generation EDTV broadcasting aiming at higher image quality and higher sound quality has been studied (detailed in Nikkei Electronics 94, 1-31). Second generation E
The DTV broadcast has compatibility with the current broadcast, and as described above, the screen aspect ratio is 16: 9.
The effective scanning line of the second generation EDTV signal corresponds to the vertical center 16: 9 portion of the current NTSC signal having an aspect ratio of 4: 3. Therefore, for example, if the television receiver for current broadcasting having an aspect ratio of 4: 3
When a generation EDTV broadcast is displayed, letterbox display is performed with a non-image part at the top and bottom of the screen and a main screen part in the center.

Widening of video software has become widespread due to advantages such as realism. On the other hand, the aspect ratio of a television receiver compatible with the current NTSC system is 4: 3. Therefore, when broadcasting video software with a wide screen, the letter box format is used to maintain the roundness. It will be converted into a signal and transmitted. Along with the widespread use of wide-screen TV receivers, the number of letterbox format video software is increasing. In particular, there are many letterbox format video signals in movie software, and for example, there are video signals of cinemascope size and vista size.

On the other hand, in a television receiver compatible with the current NTSC system, a squeeze mode signal may be adopted in order to display a wide aspect television signal without lowering the resolution. For example,
When an HDTV broadcast signal is down-converted into a signal of the current NTSC system using a MUSE-NTSC converter (hereinafter referred to as MN converter), a squeeze mode signal with 525 scanning lines and an aspect ratio of 4: 3 is generated. can get. When this squeeze mode signal is applied to a monitor having an aspect ratio of 4: 3 and is displayed in a full mode (a mode in which the entire screen is displayed), a vertically long HDTV image with 525 scanning lines is displayed. When the squeeze mode signal is displayed on a monitor with an aspect ratio of 16: 9, an HDTV image with a correct roundness can be displayed, and by compressing the vertical amplitude of the squeeze mode signal, the aspect ratio can be reduced. An image with no distortion can be obtained even on a monitor with 4: 3.

Video signals of these various screen sizes are input to the above-mentioned wide television receiver.

By the way, in the conventional two-screen television receiver of FIG. 11, it is conceivable to display the parent screen and the child screen in the same size on the left and right of the display screen. FIG. 14 is an explanatory diagram for explaining the display on the display screen in this case. In FIG. 14, the shaded portion indicates a non-image portion displayed in a black band.

FIG. 14A shows a parent screen on the left side of the display screen 18.
21 is displayed and the child screen 22 is displayed on the right side. In this example, the parent screen 21 and the child screen 22 have the same screen size (aspect ratio). Due to the difference between the aspect ratio of the display screen 18 and the aspect ratios of the parent screen 21 and the child screen 22, the parent screen 23 and the child screen 24 are displayed in letterbox.

As described above, when two images having the same screen size are simultaneously displayed on the left and right sides of the display screen, there is no particular problem. However, when the screen sizes of the main screen and the child screen are different, the width of the non-image part (hatched part) is different,
There was a problem that the screen quality deteriorates.

FIG. 14B shows the display when the parent screen 23 and the child screen 24 have different aspect ratios. Main screen
23 and the sub-screen 24 are both letterboxed.
The parent screen 23 is wider than the child screen 24, and the non-image area 29
Is larger than the non-image portion 30 of the sub-screen 24. For this reason,
As shown in FIG. 14B, the parent screen 23 and the child screen 24 have a step difference in display, which is extremely unsightly.

Therefore, it is conceivable to remove the non-image portion by controlling the vertical deflection to adjust the vertical amplitude. However, if the vertical deflection is controlled, the vertical amplitudes of the parent screen and the child screen change at the same time. 14
FIG. 14C is an example in which the non-image portion 30 of the child screen 24 of FIG. 14B is removed. In this case, as shown in FIG. 14C, the non-image portion is removed from the child screen 26, but the parent screen 25
There is no image part left in. Therefore, the screen quality has not been improved.

Further, FIG. 14 (d) is such that the non-image portion 29 of the parent screen 23 of FIG. 14 (b) is removed. In this case, as shown in FIG. 14D, the non-image portion is removed from both the parent screen 27 and the child screen 28. However, the upper and lower parts (broken line part) of the image of the child screen 28 are missing.

It is also possible to display the squeeze mode signal from the MN converter in the full mode as a child screen. That is, a wide aspect television signal having an aspect ratio of 16: 9 is time-compressed in the horizontal direction and is displayed in the entire small screen area. In this case, since the image is compressed in the horizontal direction, the child screen is displayed as a vertically long image. In order to make this sub-picture a normal image without distortion, the vertical amplitude may be reduced. As a result, the child screen becomes an image with the correct roundness.

However, in this case, the vertical amplitude of the parent screen also becomes small, and the parent screen is distorted.

[0023]

As described above, in the above-described conventional two-screen television receiver, when two video signals having different screen sizes are input, no image of the parent screen and the child screen is displayed. There is a problem in that the width of the parts may be different and one of the parent screen and the child screen may be distorted, which deteriorates the screen quality.

The present invention has been made in view of the above problems, and even when two video signals having different screen sizes are input, the two screens can be displayed without degrading the screen quality. It is intended to provide a television receiver.

[Constitution of the Invention]

According to a first aspect of the present invention, there is provided a two-screen television receiver having a first and second input.
Screen mode determining means for determining the screen mode of the video signal and outputting the screen mode signal, and converting the number of scanning lines of either one of the first and second video signals based on the screen mode signal. A scanning line conversion unit that matches the number of the other scanning lines, and a first horizontal compression unit that horizontally compresses the video signal that has been scan line converted by the scanning line conversion unit among the first and second video signals. And the first and second
Second horizontal compression means for horizontally compressing a video signal which has not been subjected to scan line conversion by the scan line conversion means among the video signals of the above, and outputs of the first and second horizontal compression means based on screen scanning. And switching means for switching and outputting the output, display means for displaying the output of the switching means, and vertical amplitude control means for controlling the vertical amplitude of the display means.

[0026]

8. A dual-screen television receiver according to claim 8 of the present invention comprises a screen mode determining means for determining a screen mode of the input first and second video signals and outputting the screen mode signal. , The first based on the screen mode signal
A first vertical amplitude converting means for vertically compressing or expanding the video signal, and a second vertical amplitude converting means for vertically compressing or expanding the second video signal based on the screen mode signal, First horizontal compression means for compressing the output of the first vertical amplitude conversion means in the horizontal direction, and the second horizontal compression means
Second horizontal compression means for horizontally compressing the output of the vertical amplitude conversion means, and switching means for switching and outputting the outputs of the first and second horizontal compression means based on screen scanning.
Display means for displaying the output of the switching means is provided.

[0027]

In the first aspect of the present invention, the screen mode determination means determines the screen mode of the first and second video signals and outputs the screen mode signal. Based on this screen mode signal, the scanning line number of one of the first and second video signals is converted by the scanning line conversion means to match the scanning line number of the other video signal. The first and second video signals converted into the same number of scanning lines are horizontally compressed by the first and second horizontal compression means, and are switched and output based on the screen scanning by the switching means. As a result, the images based on the first and second image signals are simultaneously displayed with the same number of effective scanning lines in the left-right direction on the display screen of the display means.

In the eighth aspect of the present invention, the first and second vertical amplitude converting means compress or expand the first and second video signals in the vertical direction. As a result, the images based on the first and second image signals are simultaneously displayed with the same vertical amplitude in the left-right direction on the display screen of the display means.

[0029]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a dual-screen television receiver according to the present invention.

A video signal for the main screen is input to the input terminal 1, and a video signal for the sub screen is input to the input terminal 2. Video signals input to these input terminals 1 and 2 are, for example, NTSC signals, second-generation EDTVs.
A letterbox signal, a Vista size signal, a cinema size signal, a squeeze mode signal, etc. of the system can be considered, and video signals of various screen sizes are input to the input terminals 1 and 2.

The video signal for the parent screen is given to the A / D converter 31 and the S1 signal detection circuit 32. The A / D converter 31 converts the input video signal into a digital signal and outputs the digital signal to the master signal processing circuit 33 and the master synchronization separation circuit 34.

When a squeeze mode signal is separated into a luminance signal and a chrominance signal and transmitted, a method of identifying a squeeze mode signal by superimposing a DC voltage on the chrominance signal is EIAJ (Japan Electronic Machinery Manufacturers Association) -CXP-1202. The S1 signal detection circuit 32 detects whether or not a predetermined DC voltage is superimposed on the color signal of the input video signal, and determines whether the input video signal is a squeeze mode signal or a lator box signal, The determination result is output to the screen mode determination circuit 35.

The parent sync separation circuit 34 separates the horizontal and vertical sync signals from the parent screen video signal from the A / D converter 31 and outputs them to the parent clock generation circuit 36, the screen mode determination circuit 35 and the deflection circuit 37. To do. The parent clock generating circuit 36 is adapted to generate a parent clock phase-synchronized with horizontal and vertical synchronizing signals (hereinafter, also referred to as parent screen synchronizing signal) of the video signal for the parent screen and output it to the clock changeover switch 38. . The parent signal processing circuit 33 separates the parent screen video signal from the A / D converter 31 into a luminance signal and a color signal, performs a predetermined image quality improving process, and outputs the parent image signal to the screen changeover switch 43. It is like this.

On the other hand, the video signal for the sub-screen input through the input terminal 2 is the A / D converter 39 and the S1 signal detection circuit.
Given to 32. The A / D converter 39 converts the input video signal into a digital signal and outputs it to the child signal processing circuit 40 and the child synchronization separation circuit 41. The child synchronization separation circuit 41 separates horizontal and vertical synchronization signals (hereinafter, also referred to as a child screen synchronization signal) from the image signal for the child screen and outputs them to the screen mode determination circuit 35. The child clock generation circuit 42 generates a child clock that is phase-synchronized with the horizontal and vertical synchronizing signals of the image signal for the child screen and outputs it to the clock changeover switch 38. The sub-signal processing circuit 40 separates the sub-screen video signal from the A / D converter 39 into a luminance signal and a color signal, performs a predetermined image quality improvement process, and outputs the sub-picture signal to the screen changeover switch 43. It is supposed to do.

The screen mode determination circuit 35 is an S1 signal detection circuit.
Based on the determination result of 32, it is determined whether the input video signals for the parent screen and the child screen are squeeze mode signals. In addition, the screen mode determination circuit 35, based on the video signal for the parent screen and the parent screen synchronization signal, for example, the number of scanning lines which is a signal level below a predetermined reference level or the scanning which is a signal level exceeding a predetermined reference level. Count the number of lines. Based on this counting result, the screen mode determination circuit 35 detects whether the input video signal is a letterbox format video signal, and also detects which of the letterbox format modes. In addition, when the input video signal is the signal of the second generation EDTV system, the screen mode determination circuit 35 detects the identification signals inserted in 22H and 285H, so that the signal of the second generation EDTV system is detected. The input is detected.

The screen mode determination circuit 35 determines the screen mode of the video signal for the main screen and outputs the screen mode signal to the clock switch 38, the screen switch 43 and the deflection circuit 37. The screen modes include squeeze mode, cinemascope mode, vista mode, letterbox mode, second generation EDTV mode and NTSC mode. Screen mode judgment circuit 35
Is also given a sub-screen video signal and a sub-sync signal, and also determines the screen mode of the sub-screen video signal and outputs the screen mode signal. The screen mode determination circuit 35 is controlled by the microcomputer 44 to determine the screen mode.

The screen changeover switch 43 is controlled by the screen mode signal and outputs one of the parent image signal from the parent signal processing circuit 33 or the child image signal from the child signal processing circuit 40 to the scanning line conversion circuit 45 and the other. Is output to the horizontal compression circuit 49. The clock changeover switch 38 is controlled by the screen mode signal so as to supply the parent clock when the parent image signal is input to the horizontal compression circuit 49 and supply the child clock when the child image signal is input. It has become.

The scanning line conversion circuit 45 is also supplied with a parent clock or a child clock via the clock changeover switch 38, and converts the number of effective scanning lines of either the input parent image signal or child image signal. The number of effective scanning lines on the other side. For example, the scanning line conversion circuit 45 increases the number of scanning lines of a signal having a small number of effective scanning lines among the parent image signal and the child image signal to match the number of effective scanning lines of the other signal. The output of the scanning line conversion circuit 45 is a horizontal compression circuit.
Supplied to 46.

A parent clock or a child clock is input to the horizontal compression circuits 46 and 49 via the clock changeover switch 38, and the time axis is reduced to 1 / H every 1H period of the input video signal.
The phase is adjusted so that one of the compressed video signals is arranged in the first half of the horizontal scanning period and the other video signal is arranged in the latter half of the horizontal scanning period. Horizontal compression circuit
The outputs of 46 and 49 are supplied to D / A converters 47 and 50, respectively.
The D / A converters 47 and 50 convert the input video signal into an analog signal and output it to the screen switching circuit 48.

The screen switching circuit 48 switches the outputs of the D / A converters 47 and 50 between the first half and the second half of the horizontal scanning period, and
D / A converter 47, 50 output luminance signal and chrominance signal to R,
The G and B signals are converted and output to the monitor 51. A parent synchronizing signal and a screen mode signal are input to the deflection circuit 37. The deflection circuit 37 controls horizontal and vertical deflection based on the parent synchronization signal, and controls vertical deflection based on the screen mode signal. In the monitor 51, the deflection is controlled by the deflection circuit 37, and the input R,
An image based on the G and B signals is displayed.

Next, the operation of the embodiment thus constructed will be described with reference to the explanatory views of FIGS. FIG. 2 is for explaining the operation of the horizontal compression circuits 46 and 49 in FIG.

A video signal for the main screen is input to the input terminal 1, and a video signal for the sub screen is input to the input terminal 2. Various screen sizes are conceivable as the video signals for the parent screen and the child screen. Table 1 below shows an example of combinations of video signals for the parent screen and the child screen.
The cinemascope has an aspect ratio of 1: 2.35, and the Vista has an aspect ratio of 1: 1.85.

[0043]

[Table 1] The video signals for the parent screen and the child screen are S1 signal detection circuit 32.
Is supplied to. When the video signals for the main screen and the sub screen are squeeze mode signals, the S1 signal detection circuit 32
Detected by. The S1 signal detection circuit 32 outputs to the screen mode determination circuit 35 a determination result indicating whether or not the parent-screen and child-screen video signals are squeeze mode signals.

The video signal for the parent screen is converted into a digital signal by the A / D converter 31, and then the parent signal processing circuit 33.
And are separated into a luminance signal and a chrominance signal. Furthermore,
The parent signal processing circuit 33 performs a predetermined image quality improvement process and outputs it as a parent image signal to the screen changeover switch 43.

On the other hand, the video signal for the child screen is an A / D converter.
Sub-signal processing circuit converted to digital signal by 39
Is given to 40. The sub-signal processing circuit 40 separates the video signal for the sub-screen into a luminance signal and a chrominance signal, and then performs a predetermined image quality improving process and supplies it to the screen changeover switch 43 as a sub-signal.

The parent sync signal of the video signal for the parent screen is separated by the parent sync separation circuit 34, and the parent clock generation circuit 36 generates the parent clock phase-synchronized with the parent sync signal. Further, the child synchronization separation circuit 34 separates the child synchronization signal from the image signal for the child screen, and the child clock generation circuit 42 generates the child clock phase-synchronized with the child synchronization signal.

In this embodiment, the screen mode determination circuit
35 is controlled by the microcomputer 44 to determine the screen mode of the video signal for the parent screen and the child screen. That is, the screen mode determination circuit 35 detects the number of scanning lines or the number of effective scanning lines in the non-image portion of the video signal for the parent screen using the parent synchronization signal and the parent clock, and the determination result of the S1 signal detection circuit 32. It is determined whether the parent image signal is a letterbox type signal or a squeeze mode signal, and the screen mode is determined in detail from the aspect ratio of the screen. Similarly,
The screen mode determination circuit 35 also determines the screen mode for the child image signal.

For example, as shown in the example (a) of Table 1, when the video signals of the cinemascope and the Vista are input as the video signals for the parent screen and the child screen, respectively, the screen mode determination circuit 35 Detects that the aspect ratio of the parent screen signal is 1: 2.35 and the aspect ratio of the child screen signal is 1: 1.85 from the non-image part or the number of effective scanning lines, and detects the cinema scope and the vista respectively. Then, a screen mode signal indicating that is output. Further, in the example of (c) in Table 1, the screen mode determination circuit 35
It is detected that it is a letterbox format signal from the non-image part or the number of effective scanning lines, and the child image signal is a letterbox format signal that has a non-image part and is a squeeze mode signal. Based on the determination output indicating that, it is determined that the MN converter output is a letterbox format signal. In this case, the number of effective scanning lines of the child image signal is 480.

The screen mode signal from the screen mode determination circuit 35 is supplied to the clock switch 38, the screen switch 43 and the deflection circuit 37. Now, similarly to the example (a) in Table 1 above, it is assumed that the video signal of the cinema scope and the video signal of the vista are respectively input as the video signals for the parent screen and the child screen. The screen mode determination circuit 35 outputs a screen mode signal indicating that the parent image signal is a cinemascope video signal and the child image signal is a Vista video signal. In this case, the screen changeover switch 43 is controlled by the screen mode signal to, for example, change the parent image signal to the scanning line conversion circuit.
And outputs the child image signal to the horizontal compression circuit 49.
The scanning line conversion circuit 45 converts the number of effective scanning lines of the input parent image signal, that is, the video signal of the cinema scope into 3/2 times and outputs it to the horizontal compression circuit 46. As a result, the numbers of effective scanning lines of the video signals input to the horizontal compression circuits 46 and 49 are substantially equal to each other.

The video signal of the cinema scope is input to the horizontal compression circuit 46. FIG. 2A shows a signal of the video signal of the cinemascope input to the horizontal compression circuit 46 in one horizontal period. As shown in FIG. 2B, the horizontal compression circuit 46 compresses the input video signal in the horizontal direction to 1/2 in each horizontal scanning period, and adjusts the phase of the compressed signal to obtain one horizontal signal. It is placed in the first half of the scanning period.

On the other hand, the video signal of the vista shown in FIG. 2C is input to the horizontal compression circuit 49. The horizontal compression circuit 49
As shown in FIG. 2D, the input video signal is horizontally compressed to 1/2 for each horizontal scanning period, and the phase of the compressed signal is adjusted to be arranged in the latter half of one horizontal scanning period. To do.

The outputs of the horizontal compression circuits 46 and 49 are converted into analog signals by the D / A converters 47 and 50, respectively, and then supplied to the screen switching circuit 48. The screen switching circuit 48 selects the output of the D / A converter 47 in the first half of the horizontal scanning period and selects the output of the D / A converter 50 in the second half. The screen switching circuit 48 sends the selected video signal (luminance signal and color signal) to R, G, B
It is converted into a signal and output to the monitor 51. Deflection of the monitor 51 is controlled by the deflection circuit 37, and the R,
An image based on the G and B signals is displayed on two screens.

FIG. 3 shows a screen display of the monitor 51.

On the display screen 18 of the monitor 51, the parent screen 61 based on the parent image signal from the D / A converter 47 is displayed in the left parent screen area, and the D / A converter is displayed in the right child screen area. A child screen 62 based on the child image signal from 50 is displayed. Main screen
61 is an image based on the video signal of the cinema scope, and the small screen 62 is an image based on the video signal of the Vista. Main screen
61 and the effective image portion of the child screen 62 are both displayed in the aspect ratio of Vista. The video signal of the cinema scope displayed as the parent screen 61 is wider than the video signal of Vista, but since the number of effective scanning lines is increased by the scanning line conversion circuit 45, the effective image portion on the display screen 18 is displayed. The vertical range of is substantially the same as that of the child screen 62. As a result, as shown in FIG. 3A, the non-image portion of the parent screen 61 and the child screen 62 are displayed.
The width is the same as that of the non-image portion, and a very easy-to-see two-screen display is obtained.

Incidentally, FIG. 3A shows a parent screen 61 and a child screen 62.
In this example, the aspect ratio of the effective image portion is displayed in conformity with the aspect ratio of the video signal of the Vista. That is, the deflection circuit 37 controls the vertical deflection of the monitor 51 based on the screen mode signal so that the vertical amplitude of the effective image portion corresponds to the aspect ratio of the vista.

Further, the deflection circuit 37 can display the parent screen and the child screen in the full mode in the entire area of the display screen 18 by controlling the vertical deflection. In this case,
The image is vertically long, but no image portion is not displayed.

Further, FIG. 3B shows the screen changeover switch 43.
Gives a video signal of Vista, which is a child image signal, to the scanning line conversion circuit 45, and the scanning line conversion circuit 45 reduces the number of scanning lines of the child image signal to 2/3 to obtain the scanning line number of the video signal of the cinemascope. This is an example of matching. In this case, the parent screen 64 is displayed on the right side of the display screen 18, and the child screen 63 is displayed on the left side. The parent screen 64 is an image based on the video signal of the cinema scope, and is displayed in the original aspect ratio. The sub screen 63 is an image based on the video signal of Vista,
It is displayed in the aspect ratio of the cinema scope. Since the number of scanning lines of the child image signal is reduced, the width of the non-image portion of the parent screen and the width of the non-image portion of the child screen become equal, and an easy-to-see screen display can be obtained. In this case, the clock changeover switch 38 controls the parent clock to the horizontal compression circuit 49 and the D / A converter.
50 to the horizontal compression circuit 46 and the D / A converter 47.

The phase of the video signal compressed by the horizontal compression circuit 46 to 1/2 is arranged in the latter half of one horizontal scanning period, and the video signal compressed by the horizontal compression circuit 49 is reduced to 1 horizontal. It is obvious that the display positions of the parent screen and the child screen can be reversed left and right by adjusting the phase so that they are arranged in the first half of the scanning period.

As described above, in the present embodiment, the screen modes of the input parent-screen video signal and child-screen video signal are determined, and the parent image signal or the child image signal is determined based on the determination result. By converting the number of effective scanning lines of, both effective scanning lines are made to substantially match. Accordingly, it is possible to display two screens of the parent screen and the child screen having the same vertical amplitude on the display screen, and it is possible to improve the screen quality.

FIG. 4 is a block diagram showing a two-screen television receiver showing another embodiment of the present invention. 4, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted.

The present embodiment is different from the embodiment of FIG. 1 in that a television signal conversion circuit 74 is provided and video signals for a main screen and a sub screen are input via an input switching circuit 71. The input switching circuit 71 is composed of switches SW1 and SW2. The switch SW1 has the terminal a connected to the external input terminal 72 and the terminal b connected to the terminal 73, and one of the video signals input to the terminals a and b is A / D converted as a video signal for the parent screen. 31 and S1 signal detection circuit
It is designed to supply 32. Also, switch SW2
Terminal a is connected to terminal 73 and terminal b is an external input terminal
It is connected to 72 and supplies one of the video signals input to the terminals a and b to the A / D converter 39 and the S1 signal detection circuit 32 as a video signal for the child screen. Switches SW1 and SW2 are switched in tandem, and at the same time terminal a
Alternatively, the terminal b is selected.

Signals of various screen modes are input to the external input terminal 72, as in the embodiment of FIG. Meanwhile, the terminal
The signal from the television signal conversion circuit 74 is input to the terminal 73.
It is designed to be input via.

The television signal conversion circuit 74 is composed of an MN converter 75 and a screen mode control circuit 78. The MN converter 75 converts a high-definition television broadcast MUSE signal input through the terminal 76 into a current NTSC video signal and outputs the video signal to the terminal 77. In this embodiment, the MN converter 75 has a screen mode control circuit 78.
When the MUSE signal is converted into an NTSC video signal under the control of, the screen mode can be forcibly set. For example, MN converter
The 75 can output a squeeze mode signal as an NTSC video signal, and can also output it after converting it into a letterbox format signal.

A screen mode signal is also input to the screen mode control circuit 78 from the microcomputer 44 via the terminal 79. The screen mode control circuit 78 controls the MN converter 75 so that the screen mode signal indicated by the screen mode signal is output from the MN converter 75.

Next, the operation of the embodiment thus constructed will be described.

Now, by the input switching circuit 71, the video signal input to the external input terminal 72 is supplied to the A / D converter 31 and the S1 signal detection circuit 32 as the video signal for the main screen,
It is assumed that the video signal input to the terminal 73 is supplied to the A / D converter 39 and the S1 signal detection circuit 32 as a video signal for the child screen.

The video signal for the parent screen is converted into a digital signal by the A / D converter 31 and then the post-screen mode determination circuit
Supplied to 35. Further, the discrimination result from the parent synchronization signal and the S1 signal detection circuit 32 is also input to the screen mode determination circuit 35. Accordingly, the screen mode determination circuit 35 determines the screen mode of the parent image signal.

Here, it is assumed that the parent image signal is a letterbox type video signal such as a cinemascope or a vista. When the screen mode determination circuit 35 is controlled by the microcomputer 44 to determine the screen mode, the screen mode determination circuit 35 supplies a screen mode signal indicating a letterbox format signal to the terminal 79 of the television signal conversion circuit 74 via the microcomputer 44. .

This screen mode signal is a screen mode control circuit.
Then, the screen mode control circuit 78 controls the MN converter 75 so that the output of the MN converter 75 is forced to be a letterbox type signal. The MUSE signal of high-definition television broadcasting input via the terminal 76 is M
It is given to the N converter 75 and down-converted.
In this case, the MN converter 75 converts the MUSE signal into a letterbox format signal and outputs it.

In this way, the terminal 73 receives the high-definition television signal after being converted into a letterbox format signal. That is, both the parent screen image signal and the child screen image signal from the terminals 72 and 73 are letterbox format signals.

The video signals for the parent screen and the child screen are A, respectively.
After being converted into digital signals by the / D converters 31 and 39, they are supplied to the parent signal processing circuit 33 and the child signal processing circuit 40, and separated into a luminance signal and a chrominance signal. Master signal processing circuit 33
The parent image signal from is supplied to the scanning line conversion circuit 45 via the screen changeover switch 43, and the child image signal from the child signal processing circuit 40 is supplied to the horizontal compression circuit 49 via the screen changeover switch 43.

In this case, since the video signals for the parent screen and the child screen are both signals in the letterbox format, the scanning line conversion circuit 45 does not perform the scanning line conversion process and inputs the input parent image. The signal is output to the horizontal compression circuit 46 as it is.

The subsequent operation is similar to that of the embodiment shown in FIG.

In the present embodiment, the number of scanning lines may be converted according to the output of the television signal conversion circuit 74.

That is, for example, a television signal conversion circuit
It is assumed that a squeeze mode signal is output from 74 and a letterbox format video signal is input via the external input terminal 72. That is, it corresponds to the combination of the example (b) of Table 1 above.

The squeeze mode signal from the television signal conversion circuit 74 is supplied to the S1 signal detection circuit 32 via the input switching circuit 71. The S1 signal detection circuit 32 determines that it is a squeeze mode signal by the DC voltage superimposed on the color signal, and determines the determination result as a screen mode determination circuit.
Output to 35.

On the other hand, the screen mode determination circuit 35 is supplied with the video signal and the parent synchronization signal for the parent screen and determines that the screen mode of the parent image signal is the letterbox format. The screen mode determination circuit 35 gives a screen mode signal to the screen changeover switch 43 and sends the parent image signal to the scanning line conversion circuit 45.
Output to.

The scanning line conversion circuit 45 increases the number of scanning lines of the parent image signal and converts it into a vertically long signal having the same ratio as the squeeze mode signal. In addition, the screen mode determination circuit 35,
The screen mode signal is given to the deflection circuit 37 to reduce the vertical deflection of the monitor 51. As a result, on the display screen of the monitor 51, the parent screen based on the letterbox format video signal and the child screen based on the squeeze mode signal are displayed with the same screen size and correct roundness.

Other actions and effects are similar to those of the embodiment shown in FIG.

FIG. 5 is a block diagram showing another embodiment of the present invention. 5, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. This embodiment is the second generation ED
This is an example applied to a television receiver capable of receiving a TV system signal.

The output of the A / D converter 31 is supplied to the Y / C separation and horizontal reinforcement signal reproduction circuit 81. The Y / C separation / horizontal reinforcement signal reproduction circuit 81 separates the main screen video signal from the A / D converter 31 into a luminance signal and a chrominance signal and outputs the luminance signal and the chrominance signal to the main image signal processing circuit 83. When the signal of the second generation EDTV system is input, the horizontal reinforcement signal multiplexed in the main picture portion is reproduced and output to the reinforcement signal processing circuit 84. The main image section signal processing circuit 83 performs a predetermined image quality improvement process on the input video signal and outputs it to the adder 89. The reinforcement signal processing circuit 84 performs a predetermined signal processing on the horizontal reinforcement signal and outputs it to the AND gate 87.

The output of the A / D converter 31 is the EDTV identification circuit.
82 and the vertical reinforcement signal reproducing circuit 85. EDT
The V identification circuit 82 detects the identification signal from the output of the A / D converter 31 so that the video signal for the parent screen is the second generation E signal.
Whether the signal is a DTV system signal is discriminated, and the discrimination result is output to the screen mode determination circuit 35. When the signal of the second generation EDTV system is input, the vertical reinforcement signal reproduction circuit 85 reproduces the vertical reinforcement signal multiplexed in the non-picture part, and the horizontal compression circuit 88 and the AND gate 86.
It is designed to output to. In addition, EDTV identification circuit
82 is also given the output of the A / D converter 39, and identifies whether the video signal for the child screen is an EDTV system signal and outputs the identification result to the screen mode determination circuit 35. Has become.

AND gates 86 and 87 are screen mode determination circuits.
Controlled by 35. The screen mode determination circuit 35 is a second-generation EDTV via the input terminal 1 in the dual-screen display mode.
When it is determined that the system signal is input, the AND gates 86 and 87 output the “L” gate signal. When the second-generation EDTV system signal is input as the video signal for the main screen, the adder 89 receives the main image section signal processing circuit 83.
The horizontal reinforcement signal from the AND gate 87 is added to the output of the above to improve the horizontal resolution, and then output to the adder 90. Adder
90 is a screen selector switch after adding the vertical reinforcement signal from the AND gate 86 to the output of the adder 89 to improve the vertical resolution.
Output to 43. That is, the vertical reinforcement signal and the horizontal reinforcement signal from the AND gates 86 and 87 are used only in the single screen display mode.

The vertical reinforcement signal from the vertical reinforcement signal reproduction circuit 85 is also given to the horizontal compression circuit 88. Horizontal compression circuit 88
In the same way as the horizontal compression circuit 46, the vertical reinforcement signal is horizontally compressed to 1/2 every 1H period, and the compressed vertical reinforcement signal is arranged in the first half or the second half of the horizontal scanning period. The output of the horizontal compression circuit 88 is given to the adder 92 via the AND gate 91. The AND gate 91 is controlled by the determination result of the screen mode determination circuit 35, and when an NTSC system signal is input as a child image signal, the AND gate 91 passes the output of the horizontal compression circuit 88 and outputs it to the adder 92. It is like this. The adder 92 adds the vertical reinforcement signal from the AND gate 91 to the output of the horizontal compression circuit 46 and outputs it to the screen switching circuit 48. The output of the screen switching circuit 48 is D / A
The D / A converter 93, which is supplied to the converter 93, converts the input signal into an analog signal and supplies it to the monitor 51.

Next, the operation of the embodiment thus constructed will be described.

The present embodiment is intended to prevent the image quality of the main screen and the child screen from being unbalanced in the two-screen mode.

Now, it is assumed that an EDTV system signal is input through the input terminal 1 in the single screen mode. In this case, the video signal from the A / D converter 31 is Y
The / C separation / horizontal reinforcement signal reproduction circuit 81 provides the luminance signal and the chrominance signal, and the main image portion signal is processed by the main image portion signal processing circuit 83 and supplied to the adder 89.
The Y / C separation / horizontal reinforcement signal reproduction circuit 81 reproduces the horizontal reinforcement signal multiplexed in the main picture portion to generate a reinforcement signal processing circuit.
Give to 84. Further, the vertical reinforcement signal multiplexed in the non-picture portion is reproduced by the vertical reinforcement signal reproduction circuit 85.

The reproduced horizontal and vertical reinforcement signals are supplied to adders 89 and 90 via AND gates 87 and 86, respectively.
In this case, the AND gates 87 and 86 allow the horizontal or vertical reinforcement signal to pass. Thus, the adder 89 adds the horizontal reinforcement signal to the main image portion signal, and the adder 90 adds the vertical reinforcement signal to the main image portion signal. The output of the adder 90 is supplied to the scanning line conversion circuit 45 via the screen changeover switch 43, scanning line converted into a signal of 480 effective scanning lines, and then output. In this way, on the display screen of the monitor 51, the image of the second generation EDTV system with improved horizontal and vertical resolutions is displayed.

Here, it is assumed that a video signal for a small screen is given through the input terminal 2 to set the dual screen mode. Now, it is assumed that a second-generation EDTV system signal is input as a parent screen image signal and a letterbox format signal is input as a child screen image signal. In this case, the EDTV identification circuit 82 detects the identification signal from the output of the A / D converter 31, and the identification result indicating that the signal of the second generation EDTV system is input as the video signal for the parent screen. Is output to the screen mode determination circuit 35. As a result, the screen mode determination circuit 35 outputs an "L" gate signal to the AND gates 86 and 87.

As a result, the horizontal and vertical reinforcement signals are not supplied to the adders 89 and 90, and the main image portion signal is supplied to the screen changeover switch 43 without improving the horizontal and vertical resolutions. Further, in this case, the gate signal supplied to the AND gate 91 is also “L”, and the vertical reinforcement signal is not supplied to the adder 92. Other functions are similar to those of the embodiment shown in FIG.

As described above, since the horizontal and vertical resolution improving processes are not performed on the main image signal, the image quality of the parent screen and the child screen can be made substantially uniform. The vertical amplitude amplification processing is performed by the deflection circuit 37.

Next, it is assumed that the second generation EDTV system signal is input as the main screen video signal and the NTSC system signal is input as the sub screen video signal. In this case, the AND gates 86 and 87 are provided with a gate signal of "L" and the AND gate 91 is provided with a gate signal of "H" based on the result of the screen mode determination circuit 35 and the determination of the screen mode.

As a result, the main image portion signal is supplied to the scanning line conversion circuit 45 via the screen changeover switch 43 without being subjected to resolution improvement processing. The scanning line conversion circuit 45 matches the number of scanning lines of the parent image signal with the number of scanning lines of the child image signal, that is, 480 lines, and outputs it to the horizontal compression circuit 46. Horizontal compression circuit 46
Compresses the parent image signal to 1/2 in the horizontal direction, arranges it in the first half of horizontal scanning, and outputs it to the adder 92.

On the other hand, the vertical reinforcement signal multiplexed in the non-picture part of the video signal for the main screen is reproduced by the vertical reinforcement signal reproduction circuit 85, and then the time axis is set to 1 by the horizontal compression circuit 88.
It is compressed to / 2 and placed in the first half of horizontal scanning. The AND gate 91 passes this vertical reinforcement signal and gives it to the adder 92. Thus, in the adder 92, the vertical reinforcement signal is added to the parent image signal to improve the vertical resolution. That is, the vertical resolution of the parent image signal is 48 as in the child image signal.
0 lines / screen height.

Other functions are similar to those of the embodiment shown in FIG.

The EDTV discriminating circuit 82 discriminates whether not only the video signal for the main screen but also the video signal for the sub screen is the signal of the second generation EDTV system. By using this identification result, it is possible to always process the signal of the second generation EDTV system as the video signal for the parent screen. This allows the second
The processing circuit corresponding to the generation EDTV may be configured only in the video signal processing system for the parent screen, and the increase in circuit scale can be suppressed.

As described above, in this embodiment, the resolution improving process using the horizontal and vertical reinforcement signals is stopped in accordance with the screen mode of the input video signal.
This has an advantage that the image quality of the parent screen and the child screen can be made uniform.

In the present embodiment, in the two-screen mode, both the horizontal and vertical resolution improving processes for the main picture portion signal are stopped in order to make the image quality of the parent screen and the child screen uniform. However, if the difference in image quality is not significant, the AND gate 87 may be given a gate signal of "H" to perform the horizontal resolution improving process.

FIG. 6 is a block diagram showing another embodiment of the present invention. 6, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. The present embodiment is an example in which the vertical amplitude adjustment of the parent screen and the child screen is performed by signal processing instead of deflection processing.

The video signal for the parent screen from the A / D converter 31 is given to the parent signal processing circuit 107, and the video signal for the child screen from the A / D converter 39 is given to the child signal processing circuit 108. . The parent signal processing circuit 107 separates the video signal for the parent screen into a luminance signal and a chrominance signal, performs a predetermined image quality improving process, and outputs the result to the horizontal compression circuit 46 and the multiplexing circuit 102. In the present embodiment, the master signal processing circuit 107 is the determination circuit 106 described later.
It is possible to compress or decompress the video signal in the vertical direction based on the judgment output of (1) and output. Also,
The child signal processing circuit 108 separates the image signal for the child screen into a luminance signal and a chrominance signal, performs a predetermined image quality improving process, and outputs it to the horizontal compression circuit 49 and the multiplexing circuit 102. In the present embodiment, the child signal processing circuit 108 is capable of compressing or expanding the video signal in the vertical direction based on the judgment output of the judgment circuit 106 described later and outputting it.

The parent sync signal from the parent sync separation circuit 34 and the child sync signal from the child sync separation circuit 41 are time-division signal generation circuits.
It will be supplied to 101. FIG. 7 is a timing chart for explaining the time division signal generation circuit 101.

The time division signal generation circuit 101 uses the parent vertical sync signal (FIG. 7A) and the child vertical sync signal (FIG. 7B) of the parent sync signal and the child sync signal,
The time division signals A and B shown in (c) and (d) are generated. The time division signal A shown in FIG. 7 (c) is a signal which becomes "H" in one field period in one cycle for three fields in synchronization with the parent vertical synchronizing signal and becomes "L" in the other two field periods. is there.

The multiplexing circuit 102 is shown in FIG.
Controlled by the time division signals A and B in (d), the parent image signal and the child image signal are time division multiplexed. For example, the multiplexing circuit 102 selects the parent image signal in the “H” period of the time division multiplexed signal shown in FIG. 7C and the child image signal in the “L” period to detect the video signal level and the vertical edge. Output to the circuit 103.

Video signal level and vertical edge detection circuit 10
The timing signal shown in FIG. 7E is also input to 3.
The timing signal is obtained by obtaining the logical sum of the time division signals A and B shown in FIGS. 7C and 7D, and the video signal level and vertical edge detection circuit 103 is at the "H" timing of this timing signal. In addition to detecting the luminance level of the input video signal, a vertical high pass filter is used to detect a vertical edge, and the vertical edge is detected and output to the line number counting circuit and the identification signal detecting circuit 104.

FIG. 8 is an explanatory diagram for explaining the line number counting circuit and the identification signal detecting circuit 104. Figure 8
8A shows an input video signal, and FIG. 8B shows a vertical edge detection output.

The line number counting circuit and identification signal detecting circuit 104 counts the number of scanning lines whose brightness level is higher than a predetermined reference value or the number of scanning lines whose level is below a predetermined reference value. It is assumed that the video signal shown in FIG. 8A has been input. In this case, the line number counting circuit and the identification signal detecting circuit 104 scan the number of scanning lines equal to or lower than the reference level, that is, the scanning in the period A of FIG. 8A corresponding to the non-image portion of the letterbox format video signal. Count the number of lines. Also, a line number counting circuit and an identification signal detecting circuit
A vertical edge detection signal (FIG. 8B) indicating the boundary between the non-image portion and the main screen portion is also supplied to 104, and the number of scanning lines of the main screen portion between the vertical edge detection signals is counted. The line number counting circuit and the identification signal detecting circuit 104 are shown in FIG.
For each "H" period of the timing signal, the number of scanning lines in the low luminance level region (non-image portion) or the number of scanning lines in the high luminance level region (main screen portion) is detected and held as a detection signal. Output to the circuit and the time integration circuit 105.

The line number counting circuit and identification signal detection circuit 104 also detects the identification signal inserted in the signal of the second generation EDTV system and outputs it to the detection signal holding circuit and time integration circuit 105. ing.

FIG. 9 is a block diagram showing a specific configuration of the detection signal holding circuit and the time integration circuit 105 in FIG.

The detection signal from the line number counting circuit and the identification signal detecting circuit 104 is input to the input terminal 111.
The time division signals A and B are input to the input terminals 112 and 113, respectively. The detection signal input to the input terminal 111 is latched by the latch 114 at the falling timing of the time division signal A and supplied to the adder 116. That is, the latch 114 latches the detection signal based on the parent image signal. Also, input terminal
The detection signal input to 111 is latched by the latch 115 at the falling timing of the time division signal B and supplied to the adder 117. As a result, the latch 115 latches the detection signal based on the child image signal.

The output of the adder 116 is latched and fed back by the latch 118 at the timing of the time division signal A, and the detection signal based on the parent image signal is integrated by the adder 116 and the latch 118. The output of the adder 117 is latched and fed back by the latch 119 at the timing of the time division signal B, and the detection signal based on the child image signal is integrated by the adder 117 and the latch 119.

The averaging circuit 120 averages the output of the latch 118 and outputs it through the output terminal 122. Further, the averaging circuit 121 averages the output of the latch 119 and outputs the averaged output through the output terminal 123. The outputs of the averaging circuits 120 and 121 are output to the judging circuit 106. The outputs of the averaging circuits 120 and 121 correspond to the number of scanning lines in the non-image portion or the main screen portion of the parent image signal and the child image signal, respectively.

The output of the detection signal holding circuit and the time integration circuit 105, the identification signal, and the determination result of the S1 signal detection circuit are input to the determination circuit 106. The determination circuit 106 determines the screen mode of the parent image signal and the child image signal based on these inputs. That is, the determination circuit 106 determines whether the parent image signal and the child image signal are squeeze signals (wide aspect signals), EDTV signals, NTSC signals, cinemascope size signals, or vista size signals. Then, the determination signal is output via the output terminal 109. The determination signal is, for example, 6
The signal is expressed by a bit NRZ format signal, and the screen modes of the parent image signal and the child image signal are expressed by 3 bits each.

Next, the operation of the embodiment thus constructed will be described.

A video signal for the parent screen and a video signal for the child screen are input to the input terminals 1 and 2, respectively. The parent sync separation circuit 34 separates the parent sync signal from the video signal for the parent screen and supplies it to the time division signal generation circuit 101, and the child sync separation circuit 41 separates the child sync signal from the video signal for the child screen to It is given to the divided signal generation circuit 101. In the time division signal generation circuit 101, a time division signal for determining the screen mode of the parent image signal and the child image signal is created. The multiplexing circuit 102 time-division-multiplexes the parent image signal and the child image signal on the basis of the time-division signal, and the video signal level and vertical edge detection circuit 10
Output to 3.

Video signal level and vertical edge detection circuit 10
In 3, the scanning lines of the non-image part or the main screen part of the parent image signal and the child image signal are detected, and the number of detected scanning lines is detected by the line number counting circuit and the identification signal detection circuit 104. Detection signal holding circuit and time integration circuit 105
Outputs the detection signal from the line number counting circuit and the identification signal detection circuit 104 after integrating and averaging the detection signals.

The determination circuit 106 is the output of the detection signal holding circuit and time integration circuit 105, the identification signal and S1 signal detection circuit 32.
The screen mode of the parent image signal and the child image signal is detected on the basis of the discrimination result from, and output as a determination output.

Parent signal processing circuit 107 and child signal processing circuit 10
8 compresses or expands the vertical amplitude based on the judgment output and outputs it. For example, when a cinemascope-size video signal is input as the main-screen video signal and a Vista-size video signal is input as the sub-screen video signal, the main-signal processing circuit 107 sets the vertical amplitude to 3 for example. The signal is decompressed to / 2 and output, and the child signal processing circuit 108 outputs without changing the vertical amplitude. As a result, the same display as in FIG. 3A is displayed on the display screen of the monitor 51.

Other operations and effects are the same as those of the embodiment shown in FIG.

FIG. 10 is a block diagram showing another embodiment of the present invention. 10, the same components as those of FIG. 6 are designated by the same reference numerals and the description thereof will be omitted. This embodiment is applied to a television receiver incorporating a magnetic recording / reproducing device.

In this embodiment, the multiplexing circuit 131 and the signal recording device are used.
The point that 132 is added is different from the embodiment of FIG. Multiplex circuit 13
1 is the R, G, B signals from the screen switching circuit 48 and the judging circuit 10
The determination output from 9 is multiplexed and output to the signal recording device 132. The signal recording device 132 records the input signal on, for example, a magnetic tape.

In the embodiment thus constructed,
The determination output indicating the screen mode of the parent screen and the child screen is multiplexed and recorded on the video signal for two-screen display. Thereby, the screen mode at the time of reproduction can be optimally controlled.

Other actions and effects are similar to those of the embodiment shown in FIG.

[0123]

As described above, according to the present invention, even if two video signals having different screen sizes are input, it is possible to display two screens without degrading the screen quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a dual-screen television receiver according to the present invention.

FIG. 2 is an explanatory diagram for explaining the operation of the embodiment.

FIG. 3 is an explanatory diagram for explaining the operation of the embodiment.

FIG. 4 is a block diagram showing another embodiment of the present invention.

FIG. 5 is a block diagram showing another embodiment of the present invention.

FIG. 6 is a block diagram showing another embodiment of the present invention.

FIG. 7 is a timing chart for explaining the embodiment of FIG.

FIG. 8 is an explanatory diagram for explaining the embodiment of FIG.

9 is a block diagram showing a specific configuration of a detection signal holding circuit and a time integration circuit in FIG.

FIG. 10 is a block diagram showing another embodiment of the present invention.

FIG. 11 is a block diagram showing a conventional two-screen television receiver.

FIG. 12 is a timing chart for explaining the operation of the conventional example.

FIG. 13 is an explanatory diagram for explaining the operation of the conventional example.

FIG. 14 is an explanatory diagram for explaining problems of the conventional example.

[Explanation of symbols]

35 ... Screen mode determination circuit, 45 ... Scan line conversion circuit, 46, 49
… Horizontal compression circuit, 48… Screen switching circuit, 51… Monitor

Continuation of front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display area H04N 9/74 A

Claims (10)

[Claims] 1. A screen mode determination means for determining a screen mode of input first and second video signals and outputting a screen mode signal, and the first and second video images based on the screen mode signal. Scanning line conversion means for converting the number of scanning lines in one of the signals to match the number of scanning lines in the other; and an image of the first and second video signals which has been subjected to scanning line conversion by the scanning line conversion means. First horizontal compression means for compressing the signal in the horizontal direction, and second horizontal compression means for compressing in the horizontal direction the video signal of the first and second video signals which has not been scan line converted by the scan line conversion means. Compression means, switching means for switching and outputting the outputs of the first and second horizontal compression means based on screen scanning, display means for displaying the output of the switching means, and vertical amplitude control of the display means Vertical amplitude A two-screen television receiver including a control means. 2. The first and second horizontal compression means compresses the first and second video signals in the horizontal direction to 1/2 in each horizontal scanning period, and the phase of one of the video signals. Is arranged in the first half of the horizontal scanning period, and the phase of the other video signal is adjusted so as to be arranged in the latter half of the horizontal scanning period. 3. The screen mode determination means, the number of scanning lines of the non-image portion or the main image portion of the first and second video signals,
2. The dual screen television according to claim 1, wherein the screen mode is determined by detecting at least one of a DC voltage superimposed on a squeeze mode signal or an identification signal multiplexed on a second generation EDTV signal. John receiver. 4. A television signal converting means for converting an input high definition television signal into a current television signal, and an output of the television signal converting means based on the screen mode signal for the first video signal. 2. A two-screen television receiver according to claim 1, further comprising a screen mode control means for converting the signal into a letterbox format signal and outputting it as the second video signal. 5. The first video signal is a second generation EDTV.
Horizontal and vertical reinforcement signal reproducing means for reproducing the horizontal reinforcement signal multiplexed in the main picture portion and the vertical reinforcement signal multiplexed in the non-picture area when the signal is a system signal, and the horizontal and vertical reinforcement signal reproduction means First and second gate means for respectively passing a horizontal reinforcement signal and a vertical reinforcement signal from the means, and horizontal and vertical reinforcements from the first and second gate means in the main picture portion of the first video signal. First to add signals respectively
And a second adder, a third horizontal compression means for horizontally compressing the vertical reinforcement signal from the horizontal and vertical reinforcement signal reproducing means, and a vertical reinforcement signal from the third horizontal compression means. Third gating means, a third adder for adding the output of the first horizontal compressing means and the output of the third gating means, and the first to third parts based on the screen mode signal. 2. The dual-screen television receiver according to claim 1, further comprising control means for controlling the gate means of. 6. The control means, when the first video signal is a signal of the second generation EDTV system, the second video signal.
6. The dual screen television receiver according to claim 5, wherein passage of the signals of the first and second gate means is prohibited based on the screen mode signal for the video signal. 7. The control means, when the first video signal is a second generation EDTV system signal and the second video signal is a current NTSC system signal, 6. The dual screen television receiver according to claim 5, wherein the passage of the signal of the second gate means is prohibited and the passage of the signal of the third gate means is permitted. 8. A screen mode determination means for determining a screen mode of the input first and second video signals and outputting a screen mode signal, and a vertical direction of the first video signal based on the screen mode signal. First vertical amplitude converting means for compressing or expanding in the vertical direction; second vertical amplitude converting means for compressing or expanding the second video signal in the vertical direction based on the screen mode signal; and the first vertical amplitude converting means. First horizontal compression means for compressing the output of the amplitude conversion means in the horizontal direction, second horizontal compression means for compressing the output of the second vertical amplitude conversion means in the horizontal direction, and the first and second A two-screen television receiver comprising: switching means for switching and outputting the output of the horizontal compression means based on screen scanning; and display means for displaying the output of the switching means. 9. The screen mode determination means includes a timing generation means for generating a timing signal based on a synchronization signal of the first and second video signals, and the first and second timing generation means based on the timing signal. Multiplexing means for time-division-multiplexing video signals, detection means for detecting the luminance levels and vertical edges of the first and second video signals from the output of the multiplexing means based on the timing signal, and the first detection Counting means for counting the number of scanning lines in a region where the brightness levels of the first and second video signals are higher than a predetermined value or the number of scanning lines in a region where the brightness level is lower than a predetermined value based on the detection result of the means; Integrating means for time-integrating the count value of the counting means, and judging means for judging the screen mode of the first and second video signals based on the integration result of the integrating means. 2-screen television receiver according to claim 8, characterized by comprising a. 10. The dual-screen television receiver according to claim 9, further comprising a multiplex recording means for multiplexing and recording the output of said switching means and the output of said determination means.