JPH07283364A - Electronic device and its manufacture - Google Patents

Electronic device and its manufacture

Info

Publication number
JPH07283364A
JPH07283364A JP6074593A JP7459394A JPH07283364A JP H07283364 A JPH07283364 A JP H07283364A JP 6074593 A JP6074593 A JP 6074593A JP 7459394 A JP7459394 A JP 7459394A JP H07283364 A JPH07283364 A JP H07283364A
Authority
JP
Japan
Prior art keywords
chip
image sensor
semiconductor
semiconductor image
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6074593A
Other languages
Japanese (ja)
Inventor
Masaaki Bandai
雅昭 万代
Hitoshi Takeuchi
均 竹内
Yutaka Saito
豊 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP6074593A priority Critical patent/JPH07283364A/en
Publication of JPH07283364A publication Critical patent/JPH07283364A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

Abstract

PURPOSE:To realize a structure in which chips can be connected electrically and mechanically at the same time. CONSTITUTION:A semiconductor image sensor device is provided with a drive substrate 3 on which a plurality of semiconductor image sensor chips 1 and semiconductor drive chips 2 are mounted and with connection chips 4 by which the semiconductor image sensor chips 1 are connected to each other and by which the semiconductor image sensor chips 1 are connected to the drive substrate 3.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、コンピュータ、半導体
イメージセンサ装置等の複数の半導体チップで構成され
る電子装置に関する。その一例として取り上げる半導体
イメージセンサ装置は、可視領域や赤外また紫外の光は
もとより、特にはX線や放射線および荷電粒子の測定に
用いられるものに適用され、フォトダイオード、フォト
ダイオードアレイ、フォトセンサ、マイクロストリップ
センサ、両面マイクロストリップセンサ、放射線セン
サ、半導体フォトセンサ、半導体撮像装置等と称される
半導体集積回路装置をさす。ここで、このような光や放
射線を受けて信号を出すことを、検出すると称し、検出
する部位を受光面領域もしくはフォトセンサと称する。
さらにその配列されたもので検出した信号を2次元的な
情報(イメージ)として取り出す装置をイメージセンサ
装置と称する。これらの装置は、1個のセンサチップだ
けでその機能を果たす場合もあるが、本発明でとりあげ
るのは、複数個のセンサチップを機械的・電気的に一体
のものにして、この一体になったもの全体で半導体イメ
ージセンサ装置として機能させるような構造のものにつ
いてである。(以降、上述のような装置を複数チップ実
装型半導体イメージセンサ装置と略記する。)
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device including a plurality of semiconductor chips such as a computer and a semiconductor image sensor device. A semiconductor image sensor device taken as an example thereof is applied to not only visible light, infrared light, and ultraviolet light, but especially to those used for measurement of X-rays, radiation, and charged particles, such as photodiodes, photodiode arrays, and photosensors. , A microstrip sensor, a double-sided microstrip sensor, a radiation sensor, a semiconductor photosensor, a semiconductor imaging device, and the like. Here, outputting a signal by receiving such light or radiation is referred to as detecting, and a portion to be detected is referred to as a light receiving surface area or a photo sensor.
Further, a device for taking out a signal detected by the arranged ones as two-dimensional information (image) is called an image sensor device. Although these devices may fulfill their functions with only one sensor chip, the present invention deals with the case where a plurality of sensor chips are mechanically and electrically integrated into one body. The present invention relates to a structure in which all the components function as a semiconductor image sensor device. (Hereinafter, the above-mentioned device is abbreviated as a multi-chip mounting type semiconductor image sensor device.)

【0002】[0002]

【従来の技術】従来、このような分野の技術としては、
図13から図14に示したような構造が知られている。
ここで、図14は図13に示した従来例を裏側からみた
斜視図である。ここに示した例では、半導体イメージセ
ンサチップ1を4個と、これらの半導体イメージセンサ
チップ1を制御して信号を取り出すための駆動基板3を
2個、補強材28によって一体のものとし、電気的に
は、半導体イメージセンサチップ1間及び半導体イメー
ジセンサチップ1と駆動基板3の間及び図示していない
が、半導体駆動チップ2と駆動基板3上の対応する電極
間はワイヤ25でつないで接続を取るような構造が知ら
れている。
2. Description of the Related Art Conventionally, as a technique in such a field,
The structures shown in FIGS. 13 to 14 are known.
Here, FIG. 14 is a perspective view of the conventional example shown in FIG. 13 viewed from the back side. In the example shown here, four semiconductor image sensor chips 1 and two drive substrates 3 for controlling these semiconductor image sensor chips 1 to take out signals are integrated by a reinforcing member 28, and are electrically connected. Specifically, the semiconductor image sensor chip 1 and the semiconductor image sensor chip 1 and the drive substrate 3 and the corresponding electrodes on the semiconductor drive chip 2 and the drive substrate 3 are connected by wires 25, which are not shown. A structure is known that takes

【0003】なお、図13に示した絵は理解を容易にす
るために簡略化して描いてある。実際には、半導体イメ
ージセンサチップ1はセンスライン方向が5cmから7
cm位、その直角方向は3cm位のサイズの一般的な半
導体よりはかなり大きな半導体であり、その中に600
本位の本数のセンスライン5が(図13ではセンスライ
ン5は6本しか描いてないが)、50ミクロン位のピッ
チで整然と並んでいるような構造のものである。したが
って、図13に描いた装置全体では、長さ30cm、幅
3cm位のサイズのものである。
The drawing shown in FIG. 13 is simplified for easy understanding. In practice, the semiconductor image sensor chip 1 has a sense line direction of 5 cm to 7 cm.
It is a semiconductor that is significantly larger than a general semiconductor with a size of about 3 cm in the right angle direction of about 300 cm.
The structure is such that the number of sense lines 5 of the standard number (only six sense lines 5 are drawn in FIG. 13) are arranged regularly at a pitch of about 50 microns. Therefore, the entire device illustrated in FIG. 13 has a length of about 30 cm and a width of about 3 cm.

【0004】[0004]

【発明が解決しようとする課題】このように、従来の複
数チップ実装型半導体イメージセンサ装置では、複数個
のチップあるいは回路基板を機械的に固定して一体の物
にする事と、電気的につないで1つのシステムにする事
が、別々の手段により行われていたので、次に掲げるよ
うな問題点があった。
As described above, in the conventional multi-chip mounting type semiconductor image sensor device, a plurality of chips or circuit boards are mechanically fixed to be an integrated one, and electrically. Since connecting them into one system was performed by different means, there were the following problems.

【0005】機械的な支持機構の存在を前提とした構
造である。 機械的な支持構造部分が、受光面領域に影響を与え検
出能力に悪い影響を及ぼす。 機械的な固定と電気的な接続の両方の作業が必要で加
工時間が長くなる。
The structure is based on the existence of a mechanical support mechanism. The mechanical support structure portion affects the light receiving surface area and adversely affects the detection capability. Both mechanical fixing and electrical connection work are required, resulting in a long processing time.

【0006】ワイヤによる電気的接続は、ワイヤボン
ドする電極間のピッチがあまり狭いとうまく作業が出来
ない。(ワイヤボンド作業時に、既に接続の終わった隣
の配線にさわってワイヤを切ってしまう心配がある。) ワイヤボンド作業が無事終了しても、そのワイヤにさ
わってしまうなどの外力が加わると、ワイヤが切れた
り、隣同士のワイヤが接触してショートしてしまう心配
がある。
[0006] Electrical connection by wires cannot be performed well if the pitch between electrodes for wire bonding is too narrow. (At the time of wire bond work, there is a concern that the wire may be cut by touching the adjacent wiring that has already been connected.) Even if the wire bond work is completed successfully, if an external force such as touching the wire is applied, There is a concern that the wires may break or the wires next to each other may come into contact and cause a short circuit.

【0007】機械的な剛性を機械的な支持機構のみに
おわせるため支持部材の形状や配置に制約が多い。そこ
で、この発明の目的は、従来のこのような課題を解決す
るために、受光面領域に影響を及ぼさないようにしつ
つ、機械的な固定構造が電気的な接続の機能も合わせ持
つため構造が単純で、機械的な剛性も十分備わり、なお
かつ狭ピッチのセンスラインでも安定した電気的接続が
とれ、かつ電気的な特性も優れ、一旦電気的な接続がと
れた後は、その接続品質が安定しているような複数チッ
プ実装型半導体イメージセンサ装置を得ようとする事で
ある。
Since the mechanical rigidity is provided only by the mechanical support mechanism, there are many restrictions on the shape and arrangement of the support member. Therefore, an object of the present invention is, in order to solve such a conventional problem, not to affect the light-receiving surface area, while the mechanical fixing structure also has a function of electrical connection. It is simple, has sufficient mechanical rigidity, and has stable electrical connection even in a narrow-pitch sense line, and has excellent electrical characteristics. Once the electrical connection is made, the connection quality is stable. It is to obtain a multi-chip mounting type semiconductor image sensor device as described above.

【0008】[0008]

【課題を解決するための手段】図13に記載した従来例
の課題を解決するために、図1に示した改善例では、複
数チップ実装型半導体イメージセンサ装置において、隣
接する半導体イメージセンサチップ間および隣接する半
導体イメージセンサチップと駆動基板との接続を、シリ
コンチップやガラスチップ等の固体表面に電気的接続用
の配線パターンと電気的接続用の電極端子を有する部品
(接続チップ)を、その配線及び電極端子を有する面を
半導体イメージセンサチップの電極端子と対向させる向
きに実装する(以降、フェイスダウン実装と略記する)
ような構成とした。
In order to solve the problem of the conventional example shown in FIG. 13, in the improvement example shown in FIG. 1, in a multi-chip mounting type semiconductor image sensor device, a space between adjacent semiconductor image sensor chips is increased. And a component having a wiring pattern for electrical connection and an electrode terminal for electrical connection on a solid surface, such as a silicon chip or a glass chip, for connecting the adjacent semiconductor image sensor chip and the drive substrate to each other. Mounting is performed with the surface having the wiring and the electrode terminal facing the electrode terminal of the semiconductor image sensor chip (hereinafter abbreviated as face-down mounting).
It was configured like this.

【0009】[0009]

【作用】上記のように構成された複数チップ実装型半導
体イメージセンサ装置においては、以下のような作用が
得られる。 機械的な支持機構が不要になるので機械的な支持構造
部分が、受光面領域に影響を与え検出に悪い影響を及ぼ
すことがない。
In the multi-chip mounting type semiconductor image sensor device configured as described above, the following actions are obtained. Since the mechanical support mechanism is not required, the mechanical support structure portion does not affect the light receiving surface area and adversely affect the detection.

【0010】機械的な固定と電気的接続の作業が同時
に行え、しかも接続は隣接する半導体イメージセンサチ
ップ間もしくは半導体イメージセンサチップと駆動基板
の間について一括して行うので加工時間が短くできる。 接続チップに形成された配線は半導体プロセス等によ
り表面に形成された物なので、接続時及びに接続後に配
線が断線したり接触したりすることはなくなる。また配
線密度も高くできるのでより狭ピッチの接続が可能とな
り、ひいては半導体イメージセンサチップの受光面領域
のセンスラインをより高密度にでき、検出能力(検出す
る位置座標の分解能)を向上することができる。
The work of mechanical fixing and electrical connection can be performed at the same time, and the connection can be performed collectively between the adjacent semiconductor image sensor chips or between the semiconductor image sensor chip and the driving substrate, so that the processing time can be shortened. Since the wiring formed on the connection chip is formed on the surface by a semiconductor process or the like, the wiring will not be broken or come into contact during and after the connection. In addition, since the wiring density can be increased, it is possible to connect at a narrower pitch. Consequently, the sense lines in the light receiving surface area of the semiconductor image sensor chip can be made higher in density, and the detection capability (resolution of position coordinates to be detected) can be improved. it can.

【0011】接続後は接続チップの配線及び電極端子
と、相手側の電極端子は、チップ間に挟まれる状態にな
るので接続部位が直接外部にさらされることがなく接続
品質を高く保てる、すなわち信頼性を向上できる。
After the connection, the wiring and electrode terminal of the connection chip and the electrode terminal of the other side are in a state of being sandwiched between the chips, so that the connection site is not directly exposed to the outside and the connection quality can be kept high, that is, reliability. You can improve the property.

【0012】[0012]

【実施例】以下に、この発明の実施例を図面に基づいて
説明する。図1は本発明にかかる半導体イメージセンサ
装置の実施例の基本的な構成を示す上面図である。半導
体イメージセンサチップ1が4個正確な位置関係で並ん
で、お互いの間を接続チップ4を用いて機械的に固定す
るとともに電気的に接続し、さらに、これら4個の半導
体イメージセンサチップ1の両脇に、これらの4個のセ
ンサチップの制御や情報の取り出しを行うための半導体
駆動チップ2がフェイスダウン実装された駆動基板3が
2枚レイアウトさており、これも接続チップ4で半導体
イメージセンサチップ1と機械的に固定するとともに電
気的に接続されている。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a top view showing a basic configuration of an embodiment of a semiconductor image sensor device according to the present invention. The four semiconductor image sensor chips 1 are aligned in an accurate positional relationship, and the semiconductor chips are mechanically fixed and electrically connected to each other by using the connection chip 4. On both sides, there are laid out two drive substrates 3 on which semiconductor drive chips 2 for controlling these four sensor chips and extracting information are mounted facedown, and these are also connection chips 4 for the semiconductor image sensor. The chip 1 is mechanically fixed and electrically connected.

【0013】この半導体イメージセンサ装置の主要構成
要素である半導体イメージセンサチップ1は、図1の左
右方向の両端接続部の表裏両面に接続用電極端子(図示
されていない)を持ち、接続部以外は両面ともイメージ
センサとなっている。さらに、図12は図1に示した実
施例の中の駆動基板3の一例として単結晶シリコン製駆
動基板3aを詳細に示した平面図である。単結晶シリコ
ン製駆動基板3aは、シリコン基板でできた両面基板で
あり、金バンプ等でできた半導体駆動チップ用電極端子
18と電気的な接合をとれるように、半導体駆動チップ
2の電極端子が向き合うような向きで(フェイスダウン
で)表裏面各2個づつ実装されている。この半導体駆動
チップ2は、半導体イメージセンサチップ1の駆動や前
記半導体イメージセンサチップ1から得られた信号を処
理して半導体イメージセンサ装置外部のシステム(図示
されていない)にセンサチップからの情報を伝達すると
いう機能を担っている。この外部のシステムと信号のや
りとりをするために単結晶シリコン製駆動基板3aに
は、外部接続用電極端子19が設けられている。また、
単結晶シリコン製駆動基板3aは、半導体イメージセン
サチップ1と隣接する方の辺の表裏両面に半導体イメー
ジセンサチップ1との電気的な接続をとるためのセンス
ライン用電極端子16がある。さらに、単結晶シリコン
製駆動基板3aは、半導体イメージセンサチップ1、接
続チップ4、半導体駆動チップ2などと同じ材質のシリ
コン基板でできているため、実装時の温度上昇があって
も、どの部品も同じ熱膨張率であり、熱膨張率の違いに
よる機械的位置精度の低下という問題点の発生もない。
A semiconductor image sensor chip 1, which is a main component of this semiconductor image sensor device, has connection electrode terminals (not shown) on both front and back surfaces of the connection portion at both ends in the left-right direction of FIG. Is an image sensor on both sides. Further, FIG. 12 is a plan view showing in detail a drive substrate 3a made of single crystal silicon as an example of the drive substrate 3 in the embodiment shown in FIG. The drive substrate 3a made of single-crystal silicon is a double-sided substrate made of a silicon substrate, and the electrode terminals of the semiconductor drive chip 2 are electrically connected to the semiconductor drive chip electrode terminals 18 made of gold bumps or the like. Two front and back surfaces are mounted so that they face each other (face down). The semiconductor driving chip 2 drives the semiconductor image sensor chip 1 and processes signals obtained from the semiconductor image sensor chip 1 to transmit information from the sensor chip to a system (not shown) external to the semiconductor image sensor device. Has the function of transmitting. An external connection electrode terminal 19 is provided on the drive substrate 3a made of single crystal silicon for exchanging signals with the external system. Also,
The drive substrate 3a made of single crystal silicon has sense line electrode terminals 16 for electrical connection with the semiconductor image sensor chip 1 on both the front and back sides of the side adjacent to the semiconductor image sensor chip 1. Further, since the single crystal silicon drive substrate 3a is made of the same silicon substrate as the semiconductor image sensor chip 1, the connection chip 4, the semiconductor drive chip 2, etc., even if the temperature rises during mounting, any component Also has the same coefficient of thermal expansion, and there is no problem of deterioration in mechanical position accuracy due to the difference in coefficient of thermal expansion.

【0014】次に、半導体イメージセンサチップ1相互
間や半導体イメージセンサチップ1と駆動基板3間の機
械的・電気的接続について説明する。図2は本発明にか
かる図1に示した実施例における隣接する半導体イメー
ジセンサチップ1間の接続部分を拡大して示した上面図
であり、図3はその側面の拡大図である。また、図4
は、これらの図中に示された接続チップ4の一例として
単結晶シリコン製接続チップ7を示した斜視図である。
Next, the mechanical and electrical connection between the semiconductor image sensor chips 1 and between the semiconductor image sensor chip 1 and the drive substrate 3 will be described. 2 is an enlarged top view showing a connection portion between adjacent semiconductor image sensor chips 1 in the embodiment shown in FIG. 1 according to the present invention, and FIG. 3 is an enlarged side view thereof. Also, FIG.
FIG. 4 is a perspective view showing a single crystal silicon connection chip 7 as an example of the connection chip 4 shown in these drawings.

【0015】図2及び図3に示した状態は、半導体イメ
ージセンサチップ1と接続チップ4を両者の電極端子部
が重なりあうようにして、電気的な接続をとった状態を
示している。半導体イメージセンサチップ1の表裏両面
には、図2に示したようなセンスライン5が、一定間隔
で形成されている。各センスライン5のチップ両端部に
は外部との電気的接続をとるための金バンプ等でできた
電極端子6が設けられている。(図2には、図示されて
いない。なお、図2ではセンスライン5は11本しか描
いていないが、これは図を見易くするためで、50μm
ピッチで約600本のセンスライン5がある事は従来例
で述べたのと同じである。)さらに、接続チップ4の一
例である単結晶シリコン製接続チップ7には図4に示し
たように半導体イメージセンサチップ1と向き合う方の
面に半導体イメージセンサチップ1と同じピッチで配線
9と電極端子8がある。電極端子8は対向する半導体イ
メージセンサチップ1の電極端子6との電気的接続をと
るために金バンプ等で構成されている。
The states shown in FIGS. 2 and 3 show a state in which the semiconductor image sensor chip 1 and the connection chip 4 are electrically connected so that their electrode terminal portions are overlapped with each other. Sense lines 5 as shown in FIG. 2 are formed at regular intervals on both front and back surfaces of the semiconductor image sensor chip 1. Electrode terminals 6 made of gold bumps or the like for electrical connection to the outside are provided at both ends of the chip of each sense line 5. (Not shown in FIG. 2. Only 11 sense lines 5 are drawn in FIG. 2, but this is for the sake of clarity of the drawing.
As in the conventional example, there are about 600 sense lines 5 at a pitch. ) Furthermore, as shown in FIG. 4, the connection chip 7 made of single crystal silicon, which is an example of the connection chip 4, has wiring 9 and electrodes at the same pitch as the semiconductor image sensor chip 1 on the surface facing the semiconductor image sensor chip 1. There is a terminal 8. The electrode terminal 8 is composed of a gold bump or the like for electrical connection with the electrode terminal 6 of the semiconductor image sensor chip 1 facing the electrode terminal 8.

【0016】図5は、単結晶シリコン製接続チップ7
を、どのような方法で半導体イメージセンサチップ1の
電極端子6と正確に位置合わせして実装するかについて
説明した図である。すなわち、単結晶シリコン製接続チ
ップ7を半導体イメージセンサチップ1の電極端子6の
上に載せてしまうと両者の接続すべき電極同士は隠れて
しまって見えなくなる。そこで本実施例では、単結晶シ
リコン製接続チップ7の裏面(接続に寄与しない方の
面、つまり図5では上方の面)にX方向位置合わせライ
ン10aとY方向位置合わせライン10bを設け、X方
向についてはX方向位置合わせライン10aと半導体イ
メージセンサチップ1上のX方向合わせマーク11が一
直線になるように合わせ、またY方向についてはY方向
位置合わせライン10bと半導体イメージセンサチップ
1上の対応するセンスライン5が一直線になる様に合わ
せる事で、隠れて見えない電極端子同士の位置合わせを
行う事ができるような構成になっている。位置合わせ後
は、この後詳述する方法により、機械的・電気的結合を
行い、2つの半導体イメージセンサチップ1を機械的・
電気的に一体なものにする。
FIG. 5 shows a connecting chip 7 made of single crystal silicon.
FIG. 7 is a diagram for explaining how to mount the device by accurately aligning it with the electrode terminal 6 of the semiconductor image sensor chip 1. That is, when the connecting chip 7 made of single crystal silicon is placed on the electrode terminal 6 of the semiconductor image sensor chip 1, the electrodes to be connected are hidden and invisible. Therefore, in the present embodiment, the X-direction alignment line 10a and the Y-direction alignment line 10b are provided on the back surface of the single crystal silicon connection chip 7 (the surface that does not contribute to the connection, that is, the upper surface in FIG. 5). Regarding the direction, the X-direction alignment line 10a and the X-direction alignment mark 11 on the semiconductor image sensor chip 1 are aligned so as to form a straight line, and regarding the Y-direction, the Y-direction alignment line 10b and the semiconductor image sensor chip 1 correspond. By aligning the sense lines 5 so as to form a straight line, the hidden and invisible electrode terminals can be aligned with each other. After alignment, the two semiconductor image sensor chips 1 are mechanically and electrically coupled by the method described in detail below.
Electrically integrated.

【0017】次に、電気的な接続をとりかつ両者を機械
的に固定する方法について述べる。図6は本発明の実施
例を示す半導体イメージセンサチップ1、2個の間を絶
縁性接着剤12による接着力により接続チップ4を介し
て電気的に接続かつ機械的に固定した状態を接合部近傍
だけを拡大して示す断面図である。この絶縁性接着剤1
2の硬化時の収縮力により両者の電極端子(電極端子6
と電極端子8)間に押しつけ力がかかり電気的導通がと
れる。硬化方法としては接着剤の種類により光硬化型接
着剤なら紫外線照射等、加熱硬化型なら加熱硬化等それ
ぞれの接着剤に適した方法で硬化させれば良い事は言う
までもない。
Next, a method for establishing electrical connection and mechanically fixing the two will be described. FIG. 6 shows a state in which the semiconductor image sensor chips 1 and 2 according to the embodiment of the present invention are electrically connected and mechanically fixed via the connection chip 4 by the adhesive force of the insulating adhesive 12. It is sectional drawing which expands and shows only a vicinity. This insulating adhesive 1
Due to the shrinkage force of the second curing, both electrode terminals (electrode terminal 6
A pressing force is applied between the electrode and the electrode terminal 8) to establish electrical continuity. Needless to say, the curing method may be a method suitable for each adhesive, such as UV irradiation for a photo-curing adhesive or a heat curing for a heat-curing adhesive, depending on the type of adhesive.

【0018】なお、本実施例では電極端子6、電極端子
8とも金バンプ製を想定して描いてあるが、少なくとも
一方が金バンプ製であれば、もう一つの電極端子はアル
ミニウムパッドでもかまわない。図7と図8は、図6で
説明した実施例についてその切断部を90度回転させ、
即ち接続チップ4と半導体イメージセンサチップ1の幅
方向に切断した電極端子2個分だけを拡大して示した部
分拡大した断面図である。図7、図8はともに上側の電
極端子8a、8b、8c、8dが金バンプでできている
接続チップ4、下側の電極端子6aがアルミニウムパッ
ドのままの半導体イメージセンサチップ1である。とこ
ろで、金バンプのバンプ高さは、製造プロセス等をきび
しく管理しても、高さの狙い値の±10%位のバラツキ
が有る事は避けられない。例えば、バンプ高さの狙い値
10μmの時には、±1μm位のバンプ高さバラツキを
許容する必要がある(一つ一つのバンプ高さを見ると、
9μmから11μm位の幅の間でバラツキがある事は許
容する必要がある。)。
In this embodiment, the electrode terminals 6 and 8 are drawn on the assumption that they are made of gold bumps, but if at least one of them is made of gold bumps, the other electrode terminal may be an aluminum pad. . FIGS. 7 and 8 show that the cutting portion of the embodiment described in FIG. 6 is rotated 90 degrees,
That is, it is a partially enlarged sectional view in which only two electrode terminals cut in the width direction of the connection chip 4 and the semiconductor image sensor chip 1 are enlarged. 7 and 8 show a connection chip 4 in which the upper electrode terminals 8a, 8b, 8c, 8d are made of gold bumps, and the lower electrode terminal 6a is a semiconductor image sensor chip 1 which is an aluminum pad. By the way, it is inevitable that the bump height of the gold bump has a variation of about ± 10% of the target value of the height even if the manufacturing process is strictly controlled. For example, when the target bump height value is 10 μm, it is necessary to allow a bump height variation of about ± 1 μm (seeing each bump height,
It is necessary to allow variations in the width of 9 μm to 11 μm. ).

【0019】図7、図8に示した例はいずれも左側の金
バンプ製電極端子8a及び表面凹凸付金バンプ製電極端
子8cの方が右側の金バンプ製電極端子8b及び表面凹
凸付金バンプ製電極端子8dより少し元々実装前から高
さが高い場合を示している。このため、図7では右側の
電極端子間の接続がとれていないのに対し、図8では左
右とも正常に電極端子間の電気的接合がとれている。こ
の差の理由は、図8のように金バンプ表面に細かい凹凸
があると、小さな力でも表面部分の細かい凹凸の凸部が
変形して接続が取れるのに対し、図7に示したように金
バンプ表面があまり滑らかだと絶縁性接着剤12の硬化
時の収縮力等の実装により得られる圧縮力だけではバン
プ全体を必要量だけ圧縮できないため結果的に右側の電
極端子間に隙間が残ってしまうという状態を示してい
る。
In both of the examples shown in FIGS. 7 and 8, the left gold bump electrode terminal 8a and the surface bumpy gold bump electrode terminal 8c are the right gold bump electrode terminal 8b and the surface bumpy gold bump. The case where the height is slightly higher than that of the electrode terminal 8d before mounting is shown. Therefore, in FIG. 7, the connection between the electrode terminals on the right side is not made, whereas in FIG. 8, the electrical connection between the electrode terminals is normally made on the left and right sides. The reason for this difference is that if there are fine irregularities on the surface of the gold bump as shown in FIG. 8, even if a small force is applied, the convex portions of the fine irregularities on the surface can be deformed and connection can be made, while as shown in FIG. If the surface of the gold bump is too smooth, the entire bump cannot be compressed by the required amount only by the compressive force obtained by mounting such as the contracting force when the insulating adhesive 12 is cured, so that a gap remains between the right electrode terminals. It shows the state of being lost.

【0020】なお、ここで本実施例で仮に接続チップ4
側の電極端子8a、8b、8c、8dが金バンプ製でな
くアルミニウムパッドだったとすると、図7、図8に示
した絶縁性保護膜13(半導体素子表面のパッシベーシ
ョン膜や窒化シリコン膜などの表面を湿度等の環境から
保護するための物)が、アルミニウムパッドよりわずか
に高さが高いため、接続チップ4と半導体イメージセン
サチップ1の電極端子部の絶縁性保護膜同士がぶつかり
あってしまって、両者のアルミニウムパッド間の接触が
得られない。このためいずれか一方の電極端子は金バン
プ等の絶縁性保護膜より導体部分が高くなる構造である
必要がある。
Here, in this embodiment, the connection chip 4 is temporarily assumed.
If the electrode terminals 8a, 8b, 8c, 8d on the side are not made of gold bumps but aluminum pads, the insulating protective film 13 shown in FIGS. 7 and 8 (the surface of the semiconductor element surface such as a passivation film or a silicon nitride film) is formed. (For protecting the environment from humidity and the like) is slightly higher than the aluminum pad, the insulating protective films of the electrode chip of the connection chip 4 and the semiconductor image sensor chip 1 collide with each other. However, contact cannot be obtained between the two aluminum pads. Therefore, either one of the electrode terminals needs to have a structure in which the conductor portion is higher than the insulating protective film such as a gold bump.

【0021】このようにして、半導体イメージセンサ装
置の電気的導通と機械的結合が同時に行われる。また、
電気的導通についてだけ考えれば、ワイヤボンド法とは
違って、全部の電極端子間の接続が一括して行われるの
で、大幅な工数低減が図られるだけでなく、さらに、接
続後は接続部の電極端子および配線は接続チップ4の下
に隠れ外界から保護されるので電気的な接続品質の信頼
性が高くなる。
In this way, electrical conduction and mechanical coupling of the semiconductor image sensor device are performed simultaneously. Also,
Considering only electrical conduction, unlike the wire bond method, all the electrode terminals are connected at once, so not only is the man-hour drastically reduced, but also after the connection, Since the electrode terminal and the wiring are hidden under the connection chip 4 and protected from the external environment, the reliability of the electrical connection quality is improved.

【0022】なお、本実施例では、両面がセンシング素
子で構成された両面集積回路について述べたが、片面の
みが集積回路になっているような一般的な素子の場合、
集積回路になっていない方の面を電気的な機能を持たな
い接続チップで位置決め連結後、集積回路側の面の電気
的導通をとるというようなやり方も可能である。
In this embodiment, the double-sided integrated circuit whose both sides are composed of sensing elements has been described. However, in the case of a general element in which only one side is an integrated circuit,
It is also possible to employ a method in which the surface not formed as an integrated circuit is positioned and connected by a connection chip having no electrical function, and then the surface on the integrated circuit side is electrically connected.

【0023】次に、絶縁性接着剤12を用いた場合の接
続チップ4の接続方法について、その一例を図を用いて
説明する。図9は本発明にかかる半導体イメージセンサ
装置の実施例の単結晶シリコン製接続チップ7の電極上
に絶縁性接着剤の一種であるフィルム状の絶縁性接着剤
シート15を仮圧着した状態を示す斜視図である。(図
9では、単結晶シリコン製接続チップ7を例にとって説
明したが、接続チップ4としてガラス製接続チップ等を
用いる場合でも同様である事は言うまでもない。)あら
かじめ配線9のある側の電極8上に絶縁性接着剤シート
15を適当な形状にして若干の加圧と加熱を行い仮圧着
する。図10は、図9の時と同様な要領で半導体イメー
ジセンサチップ1の接続部に絶縁性接着剤シート15を
仮圧着した状態を示す斜視図である。この様に、接続の
準備作業としての絶縁性接着剤シート15の供給は、単
結晶製接続チップ7側と半導体イメージセンサチップ
1、駆動基板3側のどちらか一方、もしくは両方に行
う。
Next, an example of a method of connecting the connection chip 4 when the insulating adhesive 12 is used will be described with reference to the drawings. FIG. 9 shows a state in which a film-like insulating adhesive sheet 15, which is a kind of insulating adhesive, is temporarily pressure-bonded onto the electrodes of the connection chip 7 made of single crystal silicon of the embodiment of the semiconductor image sensor device according to the present invention. It is a perspective view. (In FIG. 9, the single crystal silicon connection chip 7 has been described as an example, but it goes without saying that the same applies when a glass connection chip or the like is used as the connection chip 4.) The electrode 8 on the side where the wiring 9 is provided in advance. The insulative adhesive sheet 15 is formed into an appropriate shape on the upper side, and is slightly pressured and heated to temporarily press-bond it. FIG. 10 is a perspective view showing a state in which the insulating adhesive sheet 15 is temporarily pressure-bonded to the connection portion of the semiconductor image sensor chip 1 in the same manner as in FIG. In this way, the supply of the insulating adhesive sheet 15 as the preparatory work for connection is performed on either one of the single crystal connection chip 7 side, the semiconductor image sensor chip 1 and the drive substrate 3 side, or both.

【0024】図11は本発明にかかる半導体イメージセ
ンサ装置の実施例の2枚の半導体イメージセンサチップ
1を単結晶シリコン製接続チップ7で絶縁性接着剤シー
ト15を用い熱圧着するときの斜視図である。2枚の半
導体イメージセンサチップ1と単結晶シリコン製接続チ
ップ7は、電極端子の位置が合うような位置関係になっ
ている。対向している電極端子の間には絶縁性接着剤シ
ート15が介在している。ここで、加熱された熱圧着ヘ
ッド20が接続部に下降し圧力を加えることにより半導
体イメージセンサチップ1同士2枚の電気的導通と機械
的接続が図られる。これは、半導体イメージセンサチッ
プ1と駆動基板3との接続や、裏面の接続でも同様であ
る。なお、接続に絶縁性接着剤シート15を用いること
により、接続時の温度が金・金共晶結合法を用いるとき
に比べ非常に低くできる。(金・金共晶結合時400〜
500゜C、絶縁性接着剤シート圧着時200゜C以
下)このために接続工程での作業性、安全性が向上し、
さらに半導体イメージセンサ装置の各構成部品の品質の
劣化も防げる。
FIG. 11 is a perspective view when two semiconductor image sensor chips 1 of the embodiment of the semiconductor image sensor device according to the present invention are thermocompression-bonded with a connecting chip 7 made of single crystal silicon using an insulating adhesive sheet 15. Is. The two semiconductor image sensor chips 1 and the connecting chip 7 made of single crystal silicon are in a positional relationship such that the positions of the electrode terminals are aligned with each other. The insulating adhesive sheet 15 is interposed between the opposing electrode terminals. Here, the heated thermocompression bonding head 20 descends to the connection portion and applies pressure, whereby electrical connection and mechanical connection between the two semiconductor image sensor chips 1 are achieved. The same applies to the connection between the semiconductor image sensor chip 1 and the drive substrate 3 and the connection on the back surface. By using the insulating adhesive sheet 15 for connection, the temperature at the time of connection can be made much lower than when the gold-gold eutectic bonding method is used. (At the time of gold-gold eutectic bond 400-
(500 ° C, 200 ° C or less when crimping the insulating adhesive sheet) Therefore, workability and safety in the connection process are improved,
Further, it is possible to prevent deterioration of the quality of each component of the semiconductor image sensor device.

【0025】本発明は、複数の半導体チップを組み合わ
せて機能を発揮するような電子装置の構造について、半
導体イメージセンサ装置を例にとって内容を詳述した
が、この構造は高密度実装を必要とする各種電子装置に
も使える事は言うまでもない。
The present invention has described the details of the structure of an electronic device which exhibits a function by combining a plurality of semiconductor chips by taking a semiconductor image sensor device as an example. However, this structure requires high-density mounting. It goes without saying that it can be used for various electronic devices.

【0026】[0026]

【発明の効果】この発明は以上説明したように、今回一
例として取りあげた半導体イメージセンサ装置の場合、
半導体イメージセンサチップと駆動基板の接続に接続チ
ップを用いることにより電気的導通と機械的強度が同時
に得られ、簡単な構造で強度と信頼性を両立した高性能
の複数チップ実装型半導体イメージセンサ装置が得られ
るという効果がある。
As described above, according to the present invention, in the case of the semiconductor image sensor device taken as an example this time,
High-performance multi-chip mounting type semiconductor image sensor device that achieves electrical conductivity and mechanical strength at the same time by using a connection chip to connect the semiconductor image sensor chip and the drive substrate, and has both strength and reliability with a simple structure. Is obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明にかかる半導体イメージセンサ装置の実
施例の上面図である。
FIG. 1 is a top view of an embodiment of a semiconductor image sensor device according to the present invention.

【図2】本発明にかかる半導体イメージセンサ装置の実
施例の接続部拡大上面図である。
FIG. 2 is an enlarged top view of a connecting portion of the embodiment of the semiconductor image sensor device according to the present invention.

【図3】本発明にかかる半導体イメージセンサ装置の実
施例の接続部拡大側面図である。
FIG. 3 is an enlarged side view of a connecting portion of the embodiment of the semiconductor image sensor device according to the present invention.

【図4】本発明にかかる半導体イメージセンサ装置の実
施例の単結晶シリコン板製接続チップの下方斜視図であ
る。
FIG. 4 is a lower perspective view of a connection chip made of a single crystal silicon plate of an embodiment of a semiconductor image sensor device according to the present invention.

【図5】本発明にかかる半導体イメージセンサ装置の実
施例の単結晶シリコン板製接続チップを位置合わせする
状態を示す斜視図である。
FIG. 5 is a perspective view showing a state in which the connection chips of the single crystal silicon plate of the embodiment of the semiconductor image sensor device according to the present invention are aligned.

【図6】本発明にかかる半導体イメージセンサ装置の実
施例の接続チップを介して半導体イメージセンサチップ
間を絶縁性接着剤で両面を接続した状態を示す接続部部
分拡大図である。
FIG. 6 is a partially enlarged view of a connecting portion showing a state in which both sides of the semiconductor image sensor chip are connected with an insulating adhesive via the connection chip of the embodiment of the semiconductor image sensor device according to the present invention.

【図7】本発明にかかる半導体イメージセンサ装置の実
施例の電極端子高さ不揃いの場合の接続チップと半導体
イメージセンサチップ間を絶縁性接着剤で接続した状態
を示す接続部部分拡大図である。
FIG. 7 is a partially enlarged view of a connecting portion showing a state in which the connecting chip and the semiconductor image sensor chip are connected by an insulating adhesive when the electrode terminal heights are not uniform in the embodiment of the semiconductor image sensor device according to the present invention. .

【図8】図7に示した実施例に対して、電極端子の表面
状態に細かい凹凸がある事だけが異なる実施例を示す図
である。
8 is a diagram showing an example different from the example shown in FIG. 7 only in that the surface condition of the electrode terminals has fine irregularities.

【図9】本発明にかかる半導体イメージセンサ装置の実
施例の接続チップと電極端子表面に絶縁性接着剤シート
と仮圧着した状態を示す斜視図である。
FIG. 9 is a perspective view showing a state in which an insulating adhesive sheet is temporarily pressure-bonded to the surfaces of the connection chip and the electrode terminal of the embodiment of the semiconductor image sensor device according to the present invention.

【図10】本発明にかかる半導体イメージセンサ装置の
実施例の隣接する2つの半導体イメージセンサチップの
電極端子部表面に絶縁性接着剤シートを仮圧着した状態
を示す斜視図である。
FIG. 10 is a perspective view showing a state in which an insulating adhesive sheet is temporarily pressure-bonded to the surfaces of the electrode terminal portions of two adjacent semiconductor image sensor chips in the embodiment of the semiconductor image sensor device according to the present invention.

【図11】本発明にかかる半導体イメージセンサ装置の
実施例の隣接する2つの半導体イメージセンサチップ間
を接続チップで絶縁性接着剤シートを用いて熱圧着する
状態を示す斜視図である。
FIG. 11 is a perspective view showing a state in which two adjacent semiconductor image sensor chips of the embodiment of the semiconductor image sensor device according to the present invention are thermocompression bonded with a connecting chip using an insulating adhesive sheet.

【図12】本発明にかかる半導体イメージセンサ装置の
実施例の単結晶シリコン板製駆動基板の平面図である。
FIG. 12 is a plan view of a drive substrate made of a single crystal silicon plate of a semiconductor image sensor device according to an embodiment of the present invention.

【図13】従来の半導体イメージセンサ装置の例を示す
斜視図である。
FIG. 13 is a perspective view showing an example of a conventional semiconductor image sensor device.

【図14】図13に示した従来例を下方より見た斜視図
である。
FIG. 14 is a perspective view of the conventional example shown in FIG. 13 seen from below.

【符号の説明】[Explanation of symbols]

1 半導体イメージセンサチップ 2 半導体駆動チップ 3 駆動基板 3a 単結晶シリコン製駆動基板 4 接続チップ 5 センスライン 6 電極 6a アルミニウムパッド 7 単結晶シリコン製接続チップ 8 電極端子 8a 金バンプ製電極端子 8b 金バンプ製電極端子 8c 表面凹凸付金バンプ製電極端子 8d 表面凹凸付金バンプ製電極端子 9 配線 10a X方向位置合わせライン 10b Y方向位置合わせライン 11 X方向合わせマーク 12 絶縁性接着剤 13 絶縁性保護膜 15 絶縁性接着剤シート 16 センスライン用電極端子 17a 配線 17b 配線 18 半導体駆動チップ用電極端子 19 外部接続用電極端子 20 熱圧着ヘッド 25 ワイヤ 26 基板側ワイヤ電極 27 センサ側ワイヤ電極 28 補強材 1 Semiconductor Image Sensor Chip 2 Semiconductor Driving Chip 3 Driving Substrate 3a Single Crystal Silicon Driving Substrate 4 Connection Chip 5 Sense Line 6 Electrode 6a Aluminum Pad 7 Single Crystal Silicon Connection Chip 8 Electrode Terminal 8a Gold Bump Electrode Terminal 8b Gold Bump Electrode terminal 8c Gold bump electrode electrode terminal with surface irregularities 8d Gold bump electrode electrode terminal with surface irregularities 9 Wiring 10a X-direction alignment line 10b Y-direction alignment line 11 X-direction alignment mark 12 Insulating adhesive 13 Insulating protective film 15 Insulating adhesive sheet 16 Sense line electrode terminal 17a Wiring 17b Wiring 18 Semiconductor driving chip electrode terminal 19 External connection electrode terminal 20 Thermocompression bonding head 25 Wire 26 Board side wire electrode 27 Sensor side wire electrode 28 Reinforcement material

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 複数の半導体チップと、前記半導体チッ
プを駆動するための半導体駆動チップと、前記半導体駆
動チップを載置し前記半導体駆動チップを電気的・機械
的に接続する駆動基板と、前記半導体チップ相互間、ま
たは前記半導体チップと前記半導体駆動チップが実装さ
れた前記駆動基板との間を機械的・電気的に接続する接
続チップからなる電子装置において、前記半導体駆動チ
ップと前記駆動基板または前記半導体チップと前記接続
チップ間、あるいは前記駆動基板と前記接続チップ間に
電気絶縁性接着剤を有する事を特徴とする電子装置。
1. A plurality of semiconductor chips, a semiconductor drive chip for driving the semiconductor chips, a drive substrate on which the semiconductor drive chips are mounted, and which electrically and mechanically connects the semiconductor drive chips, In an electronic device comprising a connection chip for mechanically and electrically connecting between semiconductor chips or between the semiconductor chip and the drive substrate on which the semiconductor drive chip is mounted, the semiconductor drive chip and the drive substrate or An electronic device comprising an electrically insulating adhesive between the semiconductor chip and the connection chip or between the drive substrate and the connection chip.
【請求項2】 前記電気絶縁性接着剤が両面テープのエ
ポキシ樹脂系接着剤であることを特徴とする請求項1記
載の電子装置。
2. The electronic device according to claim 1, wherein the electrically insulating adhesive is an epoxy resin adhesive for double-sided tape.
【請求項3】 前記半導体チップと前記接続チップの電
極端子と前記半導体駆動チップと駆動基板の電極端子と
前記駆動基板と接続チップの電極端子から選ばれる少な
くとも1つの電極端子が金バンプであることを特徴とす
る請求項1記載の電子装置。
3. At least one electrode terminal selected from the semiconductor chip, the electrode terminal of the connection chip, the electrode terminal of the semiconductor drive chip, the drive substrate, and the electrode terminal of the drive substrate and the connection chip is a gold bump. The electronic device according to claim 1, wherein:
【請求項4】 前記金バンプは表面に高低差2μm以下
の凹凸がある事を特徴とする請求項3記載の電子装置。
4. The electronic device according to claim 3, wherein the gold bumps have irregularities with a height difference of 2 μm or less on the surface.
JP6074593A 1994-04-13 1994-04-13 Electronic device and its manufacture Pending JPH07283364A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6074593A JPH07283364A (en) 1994-04-13 1994-04-13 Electronic device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6074593A JPH07283364A (en) 1994-04-13 1994-04-13 Electronic device and its manufacture

Publications (1)

Publication Number Publication Date
JPH07283364A true JPH07283364A (en) 1995-10-27

Family

ID=13551615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6074593A Pending JPH07283364A (en) 1994-04-13 1994-04-13 Electronic device and its manufacture

Country Status (1)

Country Link
JP (1) JPH07283364A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011527113A (en) * 2008-06-30 2011-10-20 クゥアルコム・インコーポレイテッド Bridged interconnection of through-silicon vias
WO2016117123A1 (en) * 2015-01-23 2016-07-28 オリンパス株式会社 Image-capturing device and endoscope

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011527113A (en) * 2008-06-30 2011-10-20 クゥアルコム・インコーポレイテッド Bridged interconnection of through-silicon vias
WO2016117123A1 (en) * 2015-01-23 2016-07-28 オリンパス株式会社 Image-capturing device and endoscope
JPWO2016117123A1 (en) * 2015-01-23 2017-11-02 オリンパス株式会社 Imaging device and endoscope
US10085627B2 (en) 2015-01-23 2018-10-02 Olympus Corporation Image pickup apparatus and endoscope

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