JPH07283224A - Bump forming method for semiconductor chip and device thereof - Google Patents

Bump forming method for semiconductor chip and device thereof

Info

Publication number
JPH07283224A
JPH07283224A JP6880994A JP6880994A JPH07283224A JP H07283224 A JPH07283224 A JP H07283224A JP 6880994 A JP6880994 A JP 6880994A JP 6880994 A JP6880994 A JP 6880994A JP H07283224 A JPH07283224 A JP H07283224A
Authority
JP
Japan
Prior art keywords
semiconductor chip
reference plate
array substrate
hole
transparent reference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6880994A
Other languages
Japanese (ja)
Other versions
JP3086125B2 (en
Inventor
Kohei Tatsumi
宏平 巽
Masafumi Imada
雅史 今田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP06068809A priority Critical patent/JP3086125B2/en
Publication of JPH07283224A publication Critical patent/JPH07283224A/en
Application granted granted Critical
Publication of JP3086125B2 publication Critical patent/JP3086125B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To form bonding bumps of uniform height by a method wherein metal balls are arranged around the through hole on an arrangement substrate whereon a transparent reference plate is fitted to the through hole, and the metal balls are arranged in a highly precise manner on a number of narrow-pitched electrodes by positioning them through the transparent reference plate. CONSTITUTION:A bonding bump is formed on the electrode 5 of a semiconductor chip 4. In that case, metal balls 1 are arranged around the through hole 3 of an arrangement substrate 2 where a transparent reference plate 7, having a marker 8 in the through hole in the same manner as the arrangement of the electrode 5, and the arrangement substrate and the semiconductor chip 4 are opposed. The semiconductor chip 4 is observed through the transparent reference plate 7, the relative position of the semiconductor chip 4 and the arrangement substrate 2 is adjusted, and after the electrode 5 and the metal balls 1 have been aligned, pressure is applied to the arrangement substrate 2 and the chip 4. For example, plate glass, on which cross stripes are marked by photoresist treatment, is used as the transparent reference plate 7.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造に際
して、半導体チップの電極にボンディング用バンプを形
成するための方法および装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for forming a bonding bump on an electrode of a semiconductor chip in manufacturing a semiconductor device.

【0002】[0002]

【従来の技術】半導体装置の製造に際して、半導体チッ
プの電極と外部のリード部とをバンプを介してボンディ
ングすることが行われる。例えばTAB(Tape Automate
d Bonding)方式においては、図5に示すように、半導体
チップ4上の電極5の位置に合わせたインナーリード1
8を、テープ状の絶縁フィルム19上に形成したもの
を、Au等のバンプ20を介在させて、熱圧着により一
括接合する。
2. Description of the Related Art In manufacturing a semiconductor device, electrodes of a semiconductor chip and external lead portions are bonded via bumps. For example, TAB (Tape Automate)
In the d-bonding method, as shown in FIG. 5, the inner lead 1 aligned with the position of the electrode 5 on the semiconductor chip 4 is used.
8 is formed on a tape-shaped insulating film 19 and bonded together by thermocompression bonding with a bump 20 made of Au or the like interposed.

【0003】このようなバンプは、半導体チップの電極
あるいはTABのインナーリード等のリード部にあらか
じめ形成しておき、バンプを有する半導体チップとTA
Bテープ等とを重ね、あるいは半導体チップとバンプを
有するTABテープ等とを重ねて、一括接合によりボン
ディングする。ボンディングに際しては、上記Auバン
プの場合は、熱圧着により自身が圧縮されて両者を接合
する。また、半田等の低融点金属のバンプを形成したも
のを使用して、リフロー(再溶融)により接合する方式
もある。バンプの形成手段としては、蒸着法、メッキ
法、金属ボール法等があり、所要の厚さを有するバンプ
を比較的簡易な手段で形成できる金属ボール法が注目さ
れている。
Such a bump is formed in advance on a lead portion such as an electrode of a semiconductor chip or an inner lead of a TAB, and the semiconductor chip having the bump and the TA
B tape or the like is overlapped, or a semiconductor chip and a TAB tape or the like having bumps are overlapped and bonded by collective bonding. At the time of bonding, in the case of the Au bump, the Au bump is compressed by thermocompression to bond the both. There is also a method of joining by reflow (re-melting) using a bump formed of low melting point metal such as solder. As the bump forming means, there are a vapor deposition method, a plating method, a metal ball method, and the like, and a metal ball method capable of forming a bump having a required thickness by a relatively simple means is drawing attention.

【0004】金属ボール法によるバンプの形成方法とし
て、特開昭62−25435号公報に、透明板上の所定
箇所に形成した半球状の凹部に金属ボールを据込み、そ
の上にチップを載置して、リフローにより金属ボールを
チップの所定箇所に融着することが開示されている。
As a method of forming bumps by the metal ball method, Japanese Patent Laid-Open No. 62-25435 discloses that a metal ball is set in a hemispherical recess formed at a predetermined position on a transparent plate, and a chip is placed on the metal ball. Then, it is disclosed that the metal ball is fused to a predetermined portion of the chip by reflow.

【0005】[0005]

【発明が解決しようとする課題】LSI、超LSIのよ
うな集積回路の大規模化、高密度化により半導体チップ
の電極数が飛躍的に増大し、かつ電極間のピッチが狭隘
化している。したがってこのような半導体チップの全て
の電極、あるいは該電極と接続すべきTABやリードフ
レームあるいはプリント基板等の全てのリード部にバン
プを形成するに際して、つぎのような課題がある。
The number of electrodes of a semiconductor chip has dramatically increased and the pitch between electrodes has been narrowed due to the increase in the scale and density of integrated circuits such as LSI and VLSI. Therefore, when forming bumps on all the electrodes of such a semiconductor chip, or all the lead portions of the TAB, the lead frame, the printed circuit board or the like to be connected to the electrodes, there are the following problems.

【0006】まず、上記のように一括接合する半導体チ
ップの多数の電極について、バンプが所定の高さを有
し、かつその高さが均一でなければならない。バンプ高
さが不足すると必要な接合強度が得られず、高さが不均
一だと、バンプが低い箇所では接合不良が発生し、バン
プが高い箇所ではチップが損傷を受ける危険性があるか
らである。この点に関して金属ボール法は、所要径の均
一サイズの金属ボールを選別して使用することで、均一
な所定高さのバンプを形成することができ、蒸着法やメ
ッキ法より優れている。
First, the bumps must have a predetermined height and the heights must be uniform with respect to a large number of electrodes of the semiconductor chips that are collectively bonded as described above. If the bump height is insufficient, the required bonding strength will not be obtained, and if the height is uneven, there will be a risk of defective bonding at low bump locations and damage to the chip at high bump locations. is there. In this respect, the metal ball method is superior to the vapor deposition method and the plating method in that bumps having a uniform predetermined height can be formed by selecting and using metal balls of a uniform size having a required diameter.

【0007】つぎに、金属ボールを上記のような多数の
狭隘化したピッチの電極やリード部に、精度よく配列し
て接合しなければならない。具体的には、配列の位置ず
れ精度5μm以下が要求される場合が多くなっている。
上記特開昭62−25435号公報には、透明板上に金
属ボールを配列し、その上に半導体チップを重ねて、チ
ップ上にバンプを形成する方法が開示されているが、半
導体チップ上の接合箇所と金属ボールの位置合わせにつ
いては記載されていない。
Next, the metal balls must be accurately arranged and joined to the large number of electrodes or leads having a narrow pitch as described above. Specifically, in many cases, the positional displacement accuracy of the array is required to be 5 μm or less.
Japanese Patent Laid-Open No. 62-25435 discloses a method of arranging metal balls on a transparent plate, stacking a semiconductor chip on the metal balls, and forming bumps on the chip. There is no mention of the alignment of the joints and the metal balls.

【0008】本発明は、LSI、超LSIのような集積
回路が大規模化、高密度化した半導体チップであって
も、狭隘化したピッチの多数の電極に、金属ボールを高
精度に配列して、均一な所定高さのボンディング用バン
プを接合不良なく一括接合により形成するための方法お
よび装置を提供することを目的とする。
According to the present invention, metal balls are arranged with high precision on a large number of electrodes with a narrowed pitch even in a semiconductor chip in which integrated circuits such as LSI and VLSI have become large-scale and high-density. Therefore, it is an object of the present invention to provide a method and apparatus for forming bonding bumps of uniform predetermined height by collective bonding without defective bonding.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
の本発明法は、半導体チップの電極にボンディング用バ
ンプを形成する方法であって、貫通穴を有し該貫通穴に
はマーカーを有する透明基準板が嵌合された配列基板の
該貫通穴の周囲に、前記電極の配列と同配列に金属ボー
ルを配列し、該配列基板と前記半導体チップを対向さ
せ、前記透明基準板を通して前記半導体チップを観察
し、前記半導体チップと前記配列基板の相対位置を調整
して、前記電極と前記金属ボールの位置を合わせた後、
前記配列基板と前記半導体チップを加圧することを特徴
とする半導体チップへのバンプ形成方法である。
The method of the present invention for achieving the above object is a method for forming a bonding bump on an electrode of a semiconductor chip, wherein a through hole is provided and a marker is provided in the through hole. Around the through holes of the array substrate fitted with the transparent reference plate, metal balls are arrayed in the same array as the array of the electrodes, the array substrate and the semiconductor chip are opposed to each other, and the semiconductor is passed through the transparent reference plate. After observing the chip, adjusting the relative position of the semiconductor chip and the array substrate, after aligning the position of the electrode and the metal ball,
A method of forming bumps on a semiconductor chip is characterized by pressing the array substrate and the semiconductor chip.

【0010】また、上記目的を達成するための本発明装
置は2発明からなり、第1発明装置は、半導体チップの
電極にボンディング用バンプを形成する装置であって、
貫通穴を有し、該貫通穴にはマーカーを有する透明基準
板が嵌合され、該貫通穴の周囲には金属ボールを配列す
る配列基板、該配列基板を保持し位置調整するゴニオメ
ーター、該配列基板に対向させて前記半導体チップを保
持する固定用ヘッド、前記透明基準板を通して前記半導
体チップを観察する顕微鏡、前記半導体チップと前記配
列基板を加圧する加圧機構からなることを特徴とする半
導体チップへのバンプ形成装置である。
The device of the present invention for achieving the above object comprises two inventions, and the device of the first invention is a device for forming a bonding bump on an electrode of a semiconductor chip.
A transparent reference plate having a through hole, in which a transparent reference plate having a marker is fitted, and an array substrate around which the metal balls are arrayed, a goniometer for holding and aligning the array substrate, A semiconductor comprising: a fixing head that faces the array substrate to hold the semiconductor chips, a microscope that observes the semiconductor chips through the transparent reference plate, and a pressing mechanism that presses the semiconductor chips and the array substrate. This is a bump forming device for a chip.

【0011】本発明の第2発明装置は、半導体チップの
電極にボンディング用バンプを形成する装置であって、
貫通穴を有し、該貫通穴にはマーカーを有する透明基準
板が嵌合され、該貫通穴の周囲には金属ボールを配列す
る配列基板、該配列基板に対向させて前記半導体チップ
を保持する固定用ヘッド、該固定用ヘッドを保持し位置
調整するゴニオメーター、前記透明基準板を通して前記
半導体チップを観察する顕微鏡、前記半導体チップと前
記配列基板を加圧する加圧機構からなることを特徴とす
る半導体チップへのバンプ形成装置である。
A second invention device of the present invention is a device for forming a bonding bump on an electrode of a semiconductor chip,
A transparent reference plate having a through hole, in which a transparent reference plate having a marker is fitted, an array substrate around which the metal balls are arrayed, and the semiconductor chip is held by facing the array substrate. It is characterized by comprising a fixing head, a goniometer for holding and adjusting the fixing head, a microscope for observing the semiconductor chip through the transparent reference plate, and a pressing mechanism for pressing the semiconductor chip and the array substrate. It is a bump forming device for a semiconductor chip.

【0012】[0012]

【作用】まず、本発明法を図面に示す本発明装置例によ
り説明する。図1は第1発明装置例の側面図、図2は図
1のA−A矢視断面図、図3は図2の部分拡大図、図4
は第2発明装置例の側面図である。本発明法は、図1お
よび図2に示すように、まず金属ボール1を配列基板2
の上に、半導体チップ4の電極5の配列と同配列に配列
する。すなわち、配列基板2と半導体チップ4を対向さ
せて位置調整したとき、金属ボール1と電極5が重なる
ように配列する。配列基板2には貫通穴3があり、貫通
穴3にはマーカー8を有する透明基準板7が嵌合されて
おり、貫通穴3の周囲に金属ボールを前記のように配列
する。ついで、配列基板2と半導体チップ4を対向さ
せ、透明基準板7を通して半導体チップ4を観察し、半
導体チップ4と配列基板2の相対位置を調整して、電極
5と金属ボール1の位置を合わせた後、配列基板2と半
導体チップ4を加圧し、電極5に金属ボール1を一括接
合してバンプを形成する。
First, the method of the present invention will be described with reference to an example of the apparatus of the present invention shown in the drawings. 1 is a side view of an example of the first invention device, FIG. 2 is a sectional view taken along the line AA of FIG. 1, FIG. 3 is a partially enlarged view of FIG. 2, and FIG.
FIG. 4 is a side view of an example of a second invention device. In the method of the present invention, as shown in FIG. 1 and FIG.
And the electrodes 5 of the semiconductor chip 4 are arranged in the same arrangement. That is, when the array substrate 2 and the semiconductor chip 4 are opposed to each other and the position is adjusted, the metal balls 1 and the electrodes 5 are arrayed so as to overlap each other. The array substrate 2 has the through holes 3, the transparent reference plate 7 having the markers 8 is fitted in the through holes 3, and the metal balls are arrayed around the through holes 3 as described above. Next, the array substrate 2 and the semiconductor chip 4 are opposed to each other, the semiconductor chip 4 is observed through the transparent reference plate 7, the relative positions of the semiconductor chip 4 and the array substrate 2 are adjusted, and the positions of the electrodes 5 and the metal balls 1 are aligned. After that, the array substrate 2 and the semiconductor chip 4 are pressed to collectively bond the metal balls 1 to the electrodes 5 to form bumps.

【0013】本発明法において、配列基板2への金属ボ
ール1の配列は、配列すべき基板2の位置に吸引口13
を設けて金属ボール1を吸着する等の方法により行うこ
とができ、位置調整のための観察は顕微鏡11で行うこ
とができる。また位置合わせは、金属ボール1が電極5
と重なるときの、透明基準板7のマーカー8たとえば図
2および図3のような碁盤目と、半導体チップ4上の位
置たとえば回路パターン6の特定位置との関係をあらか
じめ定めておき、その位置関係となるように、配列基板
2または半導体チップ4を移動させ位置調整する。
In the method of the present invention, the metal balls 1 are arranged on the array substrate 2 at the suction port 13 at the position of the substrate 2 to be arrayed.
Can be performed by adsorbing the metal ball 1 and the like, and observation for position adjustment can be performed by the microscope 11. In addition, the metal ball 1 and the electrode 5
The relationship between the marker 8 of the transparent reference plate 7 such as the cross-cut shown in FIGS. 2 and 3 and the position on the semiconductor chip 4, for example, the specific position of the circuit pattern 6 when they overlap with each other is determined in advance, and the positional relationship is determined. The array substrate 2 or the semiconductor chip 4 is moved and the position is adjusted so that

【0014】図1および図2において、金属ボール1お
よび電極5は、他の部位よりも大幅に拡大して示してお
り、図2の状態では実際には回路パターン6を観察する
ことは出来ない。そこで顕微鏡11にて、例えば図2の
○印部をさらに拡大し、図3のように、破線で示す回路
パターン6を観察し、碁盤目状のマーカー8と回路パタ
ーン6との微細な位置合わせを行う。図2の○印のよう
な拡大位置は、2箇所(対角位置)〜4箇所とする。図
1の第1発明装置では配列基板2をゴニオメーター9に
載置し、調整ネジ10により例えば5軸調整(x方向、
y方向、z方向、xy面内のθ回転、xy面のα傾斜)
を行う。また図4の第2発明装置では半導体チップ4を
ゴニオメーター9で保持して調整する。
In FIG. 1 and FIG. 2, the metal ball 1 and the electrode 5 are shown in a much larger scale than the other parts, and in the state of FIG. 2, the circuit pattern 6 cannot be actually observed. . Then, for example, by enlarging the circled part in FIG. 2 with the microscope 11, and observing the circuit pattern 6 shown by the broken line as in FIG. 3, fine alignment between the cross-shaped marker 8 and the circuit pattern 6 is performed. I do. The enlarged positions such as the circles in FIG. 2 are from 2 positions (diagonal positions) to 4 positions. In the apparatus of the first invention of FIG. 1, the array substrate 2 is placed on the goniometer 9 and, for example, 5-axis adjustment (x direction,
(y direction, z direction, θ rotation in xy plane, α inclination of xy plane)
I do. In the second invention device of FIG. 4, the semiconductor chip 4 is held by the goniometer 9 for adjustment.

【0015】なお本発明法において、金属ボール1を電
極5に加圧してバンプを形成する際、制御装置17によ
り加圧力を制御して圧着することができる。また固定用
ヘッド12にヒーターを内蔵させ、その温度を制御装置
17により制御して熱圧着あるいは溶融接合することも
できる。溶融接合時には、吸引口13の吸引は解除し、
金属ボール1が接触する部分の配列基板2を、融着しな
い材質のものにしておく。このようにしてバンプを形成
した後は、配列基板2の吸引口13の吸引を解除して、
つぎのバンプ形成に移行する。また透明基準板7のマー
カー8としては、図2および図3のような碁盤目のほ
か、適宜位置に+,×等のマークを配置したもの等を採
用することができる。マーカー8は、例えばガラス板に
フォトレジスト法等により形成することができる。さら
に、このマーカー8と位置合わせする半導体チップ4の
表面に、回路パターン6とは別のマークを形成してもよ
い。
In the method of the present invention, when the metal balls 1 are pressed against the electrodes 5 to form bumps, the pressure can be controlled by the control device 17 to perform pressure bonding. Further, it is also possible to incorporate a heater in the fixing head 12 and control the temperature thereof by the controller 17 to perform thermocompression bonding or melt bonding. At the time of fusion joining, the suction of the suction port 13 is released,
The portion of the array substrate 2 that is in contact with the metal balls 1 is made of a material that will not be fused. After forming the bumps in this way, the suction of the suction port 13 of the array substrate 2 is released,
The process proceeds to the next bump formation. As the marker 8 of the transparent reference plate 7, in addition to the grid pattern as shown in FIGS. 2 and 3, it is possible to employ a marker having +, × marks, etc. arranged at appropriate positions. The marker 8 can be formed, for example, on a glass plate by a photoresist method or the like. Further, a mark different from the circuit pattern 6 may be formed on the surface of the semiconductor chip 4 aligned with the marker 8.

【0016】つぎに、本発明の第1発明装置は、図1の
例に示すように、貫通穴3を有し、貫通穴3にはマーカ
ー8を有する透明基準板7が嵌合され、貫通穴3の周囲
には金属ボール1を配列する配列基板2、配列基板2を
保持し位置調整するゴニオメーター9、配列基板2に対
向させて半導体チップ4を保持する固定用ヘッド12、
透明基準板7を通して半導体チップ4を観察する顕微鏡
11、半導体チップ4と配列基板2を加圧する加圧機構
からなる。加圧機構としては、固定用ヘッド12に固設
した加圧治具15、その上下移動ガイド16および制御
装置17を採用することができる。
Next, the first invention device of the present invention has a through hole 3, and a transparent reference plate 7 having a marker 8 is fitted into the through hole 3 as shown in the example of FIG. An array substrate 2 for arranging the metal balls 1 around the holes 3, a goniometer 9 for holding and adjusting the position of the array substrate 2, a fixing head 12 for holding the semiconductor chips 4 facing the array substrate 2,
It comprises a microscope 11 for observing the semiconductor chip 4 through the transparent reference plate 7, and a pressing mechanism for pressing the semiconductor chip 4 and the array substrate 2. As the pressurizing mechanism, a pressurizing jig 15 fixed to the fixing head 12, a vertical movement guide 16 thereof, and a controller 17 can be adopted.

【0017】第1発明装置においては、ゴニオメーター
9に、配列基板2の貫通穴3と連通する貫通穴が設けて
あり、下方から透明基準板7を通して半導体チップ4を
観察できるようになっている。またバンプを形成した
後、つぎのバンプ形成に移行するとき、固定用ヘッド1
2の吸引口14の吸引を解除して、半導体チップ4をつ
ぎのものに換えるとともに、配列基板2に金属ボール1
を配列する。その際、配列基板2をゴニオメーター9か
ら外し、あるいはゴニオメーター9と共に、例えばガイ
ドレール(図示せず)により移動させることもできる。
その他の作用については、上記本発明法で説明したとお
りである。
In the first invention device, the goniometer 9 is provided with a through hole communicating with the through hole 3 of the array substrate 2, so that the semiconductor chip 4 can be observed from below through the transparent reference plate 7. . After forming bumps, when moving to the next bump formation, the fixing head 1
The suction of the suction port 14 of 2 is released, the semiconductor chip 4 is replaced with the next one, and the metal balls 1 are attached to the array substrate 2.
Array. At that time, the array substrate 2 can be removed from the goniometer 9 or moved together with the goniometer 9 by, for example, a guide rail (not shown).
Other functions are as described in the method of the present invention.

【0018】第2発明装置は、図4の例のように、半導
体チップ4の位置を調整するようにしたものであり、ゴ
ニオメーター9が、半導体チップ4を保持する固定用ヘ
ッド12を保持して、加圧治具15に固設されており、
配列基板にはゴニオメーターを設けていない。したがっ
て、半導体チップ4の観察はゴニオメーター9を通さず
に行えるので、第2発明装置におけるゴニオメーター9
には貫通穴は設けられていない。その他の構成および作
用は第1発明装置と同様である。
The device of the second invention is such that the position of the semiconductor chip 4 is adjusted as in the example of FIG. 4, and the goniometer 9 holds the fixing head 12 for holding the semiconductor chip 4. Is fixed to the pressure jig 15,
No goniometer is provided on the array substrate. Therefore, since the semiconductor chip 4 can be observed without passing through the goniometer 9, the goniometer 9 in the second invention device can be observed.
Has no through hole. Other configurations and operations are similar to those of the first invention device.

【0019】本発明法および本発明装置において、金属
ボールとしてはAuを採用することができ、また半田等
の低融点金属を採用することもできる。金属ボールの形
状は、球の他、楕円あるいは角形など、対象となる半導
体チップ等の状況に応じて選択する。一括接合する半導
体チップ内においては、金属ボールの材質、形状および
寸法を同一のものとする。Auを採用した場合は熱圧着
により接合してバンプを形成し、半田等の低融点金属を
採用した場合は、熱圧着あるいは溶融により接合するこ
とができる。
In the method of the present invention and the apparatus of the present invention, Au can be used as the metal balls, and a low melting point metal such as solder can also be used. The shape of the metal ball is selected according to the situation of the target semiconductor chip, such as an ellipse or a square, in addition to the sphere. In the semiconductor chips to be collectively bonded, the metal balls have the same material, shape and size. When Au is adopted, the bumps can be formed by thermocompression bonding, and when a low melting point metal such as solder is adopted, the bumps can be bonded by thermocompression bonding or melting.

【0020】このような本発明法および本発明装置によ
り、半導体チップに狭隘化したピッチで設けられた多数
の電極に対し、金属ボールを配列し一括接合してバンプ
を形成することができ、その位置ずれ精度、バンプ高さ
の均一性、および接合性が優れている。
By the method and the apparatus of the present invention, bumps can be formed by arranging metal balls on a large number of electrodes provided on a semiconductor chip at a narrow pitch and bonding them together. Excellent positional deviation accuracy, bump height uniformity, and bondability.

【0021】[0021]

【実施例】図1のような本発明装置により、半導体チッ
プの電極にボンディング用バンプを形成した。金属ボー
ル1としては、ワイヤボンディング用のAu細線(純度
99.9重量%以上)を定寸に切断し、溶融して直径7
0μmの球状にしたものを使用し、これを、150μm
ピッチで配置された合計200個の電極に熱圧着で接合
した。透明基準板7としては、ガラス板にフォトレジス
ト処理により碁盤目をマーキングしたものを使用し、図
2および図3のように半導体チップ4の回路パターン6
と位置合わせを行った。形成されたバンプは、いずれも
接合不良の発生がなく、位置ずれ精度が5μm以下の高
精度に配列され、バンプ高さは均一であった。
EXAMPLE A bonding bump was formed on an electrode of a semiconductor chip by the device of the present invention as shown in FIG. As the metal ball 1, an Au thin wire for wire bonding (purity of 99.9% by weight or more) is cut into a certain size and melted to have a diameter of 7
Use a spherical shape of 0 μm,
A total of 200 electrodes arranged at a pitch were joined by thermocompression bonding. As the transparent reference plate 7, a glass plate having a grid pattern marked by photoresist treatment is used. As shown in FIGS. 2 and 3, the circuit pattern 6 of the semiconductor chip 4 is used.
Was aligned with. The formed bumps did not cause any bonding failure, were highly accurately arranged with a positional deviation accuracy of 5 μm or less, and had a uniform bump height.

【0022】[0022]

【発明の効果】本発明法および本発明装置によれば、半
導体チップ上に狭隘化したピッチの高密度で設けられた
多数の電極に、5μm以下の位置ずれ精度で金属ボール
を配列し、一括接合で接合不良なく均一な高さのボンデ
ィング用バンプを形成することができる。したがって、
本発明によりバンプが形成された半導体チップを、TA
B、リードフレーム、プリント基板等にボンディングす
ることにより、信頼性の高い半導体装置を歩留まりよく
製造することができる。
According to the method of the present invention and the device of the present invention, metal balls are arrayed on a large number of electrodes provided on a semiconductor chip at a high density with a narrowed pitch with a positional deviation accuracy of 5 μm or less, and are collectively used. Bonding makes it possible to form bonding bumps having a uniform height without defective bonding. Therefore,
A semiconductor chip having bumps formed according to the present invention is
By bonding to B, a lead frame, a printed circuit board, etc., a highly reliable semiconductor device can be manufactured with high yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1発明装置の例を示す側面図であ
る。
FIG. 1 is a side view showing an example of a first invention device of the present invention.

【図2】本発明の第1発明装置の例を示し、図1のA−
A矢視断面図である。
FIG. 2 shows an example of a first invention device of the present invention, which is represented by A- in FIG.
FIG.

【図3】本発明の第1発明装置の例を示し、図2の部分
拡大図である。
FIG. 3 is a partially enlarged view of FIG. 2, showing an example of a first invention device of the present invention.

【図4】本発明の第2発明装置の例を示す側面図であ
る。
FIG. 4 is a side view showing an example of a second invention device of the present invention.

【図5】従来のTAB方式による半導体装置の例を示す
断面図である。
FIG. 5 is a cross-sectional view showing an example of a conventional TAB semiconductor device.

【符号の説明】[Explanation of symbols]

1:金属ボール 2:配列基板 3:貫通穴 4:半導体チップ 5:電極 6:回路パターン 7:透明基準板 8:マーカー 9:ゴニオメーター 10:調整ネジ 11:顕微鏡 12:固定用ヘッド 13,14:吸引口 15:加圧治具 16:上下移動ガイド 17:制御装置 18:インナーリード 19:絶縁フィルム 20:バンプ 1: Metal ball 2: Array substrate 3: Through hole 4: Semiconductor chip 5: Electrode 6: Circuit pattern 7: Transparent reference plate 8: Marker 9: Goniometer 10: Adjusting screw 11: Microscope 12: Fixing head 13,14 : Suction port 15: Pressurizing jig 16: Vertical movement guide 17: Control device 18: Inner lead 19: Insulating film 20: Bump

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体チップの電極にボンディング用バ
ンプを形成する方法であって、貫通穴を有し該貫通穴に
はマーカーを有する透明基準板が嵌合された配列基板の
該貫通穴の周囲に、前記電極の配列と同配列に金属ボー
ルを配列し、該配列基板と前記半導体チップを対向さ
せ、前記透明基準板を通して前記半導体チップを観察
し、前記半導体チップと前記配列基板の相対位置を調整
して、前記電極と前記金属ボールの位置を合わせた後、
前記配列基板と前記半導体チップを加圧することを特徴
とする半導体チップへのバンプ形成方法。
1. A method of forming a bonding bump on an electrode of a semiconductor chip, comprising a through hole, and a transparent reference plate having a marker fitted in the through hole, around the through hole of an array substrate. The metal balls are arranged in the same arrangement as the arrangement of the electrodes, the arrangement substrate and the semiconductor chip are opposed to each other, the semiconductor chip is observed through the transparent reference plate, and the relative position of the semiconductor chip and the arrangement substrate is determined. After adjusting and aligning the positions of the electrodes and the metal balls,
A method of forming bumps on a semiconductor chip, comprising pressing the array substrate and the semiconductor chip.
【請求項2】 半導体チップの電極にボンディング用バ
ンプを形成する装置であって、貫通穴を有し、該貫通穴
にはマーカーを有する透明基準板が嵌合され、該貫通穴
の周囲には金属ボールを配列する配列基板、該配列基板
を保持し位置調整するゴニオメーター、該配列基板に対
向させて前記半導体チップを保持する固定用ヘッド、前
記透明基準板を通して前記半導体チップを観察する顕微
鏡、前記半導体チップと前記配列基板を加圧する加圧機
構からなることを特徴とする半導体チップへのバンプ形
成装置。
2. A device for forming a bonding bump on an electrode of a semiconductor chip, which has a through hole, and a transparent reference plate having a marker is fitted in the through hole, and the transparent reference plate is provided around the through hole. An array substrate for arranging the metal balls, a goniometer for holding and adjusting the position of the array substrate, a fixing head for holding the semiconductor chip facing the array substrate, a microscope for observing the semiconductor chip through the transparent reference plate, A bump forming device for a semiconductor chip, comprising a pressing mechanism for pressing the semiconductor chip and the array substrate.
【請求項3】 半導体チップの電極にボンディング用バ
ンプを形成する装置であって、貫通穴を有し、該貫通穴
にはマーカーを有する透明基準板が嵌合され、該貫通穴
の周囲には金属ボールを配列する配列基板、該配列基板
に対向させて前記半導体チップを保持する固定用ヘッ
ド、該固定用ヘッドを保持し位置調整するゴニオメータ
ー、前記透明基準板を通して前記半導体チップを観察す
る顕微鏡、前記半導体チップと前記配列基板を加圧する
加圧機構からなることを特徴とする半導体チップへのバ
ンプ形成装置。
3. A device for forming a bonding bump on an electrode of a semiconductor chip, which has a through hole, a transparent reference plate having a marker is fitted in the through hole, and the transparent reference plate is provided around the through hole. An array substrate on which metal balls are arrayed, a fixing head for holding the semiconductor chips facing the array substrate, a goniometer for holding and adjusting the position of the fixing head, and a microscope for observing the semiconductor chips through the transparent reference plate. An apparatus for forming bumps on a semiconductor chip, comprising: a pressing mechanism for pressing the semiconductor chip and the array substrate.
JP06068809A 1994-04-06 1994-04-06 Method and apparatus for forming bump on semiconductor chip Expired - Fee Related JP3086125B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP06068809A JP3086125B2 (en) 1994-04-06 1994-04-06 Method and apparatus for forming bump on semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06068809A JP3086125B2 (en) 1994-04-06 1994-04-06 Method and apparatus for forming bump on semiconductor chip

Publications (2)

Publication Number Publication Date
JPH07283224A true JPH07283224A (en) 1995-10-27
JP3086125B2 JP3086125B2 (en) 2000-09-11

Family

ID=13384419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP06068809A Expired - Fee Related JP3086125B2 (en) 1994-04-06 1994-04-06 Method and apparatus for forming bump on semiconductor chip

Country Status (1)

Country Link
JP (1) JP3086125B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6095398A (en) * 1997-06-02 2000-08-01 Nec Corporation Solder ball arrangement device
CN109177179A (en) * 2018-09-30 2019-01-11 中煤航测遥感集团有限公司 Mash welder and spot welding system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6095398A (en) * 1997-06-02 2000-08-01 Nec Corporation Solder ball arrangement device
US6378756B1 (en) 1997-06-02 2002-04-30 Nec Corporation Solder ball arrangement device
CN109177179A (en) * 2018-09-30 2019-01-11 中煤航测遥感集团有限公司 Mash welder and spot welding system
CN109177179B (en) * 2018-09-30 2024-03-01 中煤航测遥感集团有限公司 Spot welding machine and spot welding system

Also Published As

Publication number Publication date
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