JPH07273553A - Digital sweep signal generating circuit - Google Patents

Abstract

PURPOSE:To obtain the sweep signal generating circuit by which a desired sweep signal is generated with simple configuration. CONSTITUTION:Control data (a) whose value is increased for a horizontal period and initialized for a vertical period are accumulated by an accumulator 2, and sawtooth wave data (b) with a frequency corresponding to the control data are generated by resetting the control data to have a minimum value when the accumulated sum reaches a maximum value. A sine wave (c) whose frequency is increased for each horizontal period is generated by generating a sine wave having the same frequency as that of the sawtooth wave data (b). A desired sweep signal is easily generated by setting properly the valve of control data and the way of change of it.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to generation of a sweep signal whose output frequency changes with time, and more particularly to a sweep signal generation circuit for digitally generating a sweep signal.

[0002]

2. Description of the Related Art Test signal generators used for testing television equipment have changed from analog technology to digital technology with the digitalization of television broadcasting equipment. A sweep signal generation circuit using digital technology has also been proposed.

FIG. 7 is a block diagram showing an example of a conventional digital sweep signal generating circuit. In the figure,
Upon receiving the address data output from the horizontal (H) counter 701, the memory 702 outputs an H sweep signal whose frequency gradually changes within one horizontal period. The video process circuit 703 adds a synchronizing signal, a color burst signal, etc. to the H sweep signal and outputs it as a video signal. D
It is also output as an analog video signal by the / A converter 704. The H pulse, vertical (V) pulse, clock pulse, etc. are output from the synchronization signal generator 705.

Further, Japanese Patent Application Laid-Open No. 2-149107 discloses a sine wave signal generator which uses a cumulative adder and a sine wave memory to generate a sweep signal by a hardware configuration.

[0005]

However, in the circuit configuration shown in FIG. 7, the H sweep signal can be easily generated by a memory having a horizontal period of about 1, but the V sweep signal requires a memory capacity corresponding to the number of scanning lines. Therefore, there is a problem that both the circuit scale and the required power increase.

Further, in order to generate a sweep signal by the sine wave signal generator disclosed in the above publication, as shown in the equations (1) to (3) in the lower column of page 2 of the publication,
Since two adders 24 and 27 are required, there is a problem that the circuit configuration becomes complicated and the required power also increases.

An object of the present invention is to provide a sweep signal generation circuit capable of generating a desired sweep signal with a simple structure.

[0008]

A digital sweep signal generating circuit according to the present invention comprises a frequency control means for generating control data whose output frequency determining value changes at predetermined time intervals, and a cumulative addition of the control data values. Then, when the cumulative addition value reaches the maximum value, the cumulative addition means returns to the minimum value,
And a sine wave generating means for generating a sine wave of one cycle with one cycle of the cumulative addition value.

Further, the digital sweep signal generating circuit according to the present invention is a circuit whose output frequency changes with time and digitally generates a sweep signal used for testing television equipment. Frequency control means for generating control data whose determined value changes in the horizontal cycle and initialized in the vertical cycle, and the value of the control data are cumulatively added in the clock cycle, and when the cumulative addition value reaches the maximum value, the minimum value And a video signal based on the sine wave output from the sine wave generation means. And a video processing means for forming

[0010]

Operation: The cumulative addition means cumulatively adds the values of the control data,
When the value reaches the maximum value, the sawtooth wave data is generated by returning to the minimum value. Since the frequency of the sawtooth wave data is determined by the value of the control data, the frequency of the sawtooth wave data changes with time as the value of the control data changes at predetermined time intervals. Therefore, the frequency of the sine wave generated by the sine wave generation means according to the sawtooth wave data also changes with time.

[0011]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a schematic block diagram showing an embodiment of a sweep signal generating circuit according to the present invention. The frequency control signal generator 1 outputs control data a which changes stepwise according to a horizontal (H) pulse and returns to an initial value by a vertical (V) pulse. The accumulator 2 accumulatively adds the control data a to form sawtooth wave data (cumulative adder output)
b is output, and the sine wave converter 3 outputs sine wave data c whose frequency changes according to the H pulse, using this data b as an address. The video processing circuit 4 forms a video signal by adding a synchronization signal, a color burst signal, etc. to the sine wave data c and outputs the video signal as a digital signal and also as an analog signal through the D / A converter 5.

The synchronizing signal generator 6 supplies the frequency control signal generator 1 with V pulses, H pulses and clocks, the cumulative adder 2 with H pulses and clocks, the sine wave converter 3 with clocks, and the video processing circuit. To 4 the composite blanking signal BLK, the black burst signal BB and the clock,
Supply each.

FIG. 2 is a block diagram showing an example of the frequency control signal generator 1 in this embodiment. V counter 10
1 increments the count according to the H pulse,
It is reset by V pulse. The 16-bit count value output from the V counter 101 is stored in the latch 102, and the count value is stored in a ROM (read only memory).
The table is converted into control data a by 103. Therefore, the value of the control data a changes stepwise for each H pulse, and returns to the initial value for each V pulse. This control data a
Can be set to a desired function by the ROM 103, and the control data a determines how to change the frequency of the sweep signal.

FIG. 3 is a block diagram showing an example of the cumulative adder 2 in this embodiment. 16-bit adder 201
Inputs the control data a from the frequency control signal generator 1 to one side and the output of the 16-bit latch 202 to the other side. The output of the adder 201 is stored in the latch 202, and the upper 10-bit data of the latch 202 is output to the sine wave converter 3 as the cumulative adder output b. Latch 2
02 latches the output of the adder 201 every clock CLK and is reset every H pulse.

FIG. 4 is a waveform diagram showing the cumulative addition operation of the cumulative adder 2. The adder 201 cumulatively adds the control data a for each clock CLK, and when the added value exceeds the 16-bit maximum value (2 ¹⁶ = 65536), it increases again from a value less than a close to the initial value and the sawtooth waveform. To generate the data. Therefore, there is no problem with the overflow of the adder 201.

As can be seen from FIG. 4, the frequency of the sawtooth wave b is controlled by the value of the control data a. That is, as the value of the control data a increases with each H pulse, the slope of the sawtooth wave b also increases, and the frequency rises to reach the maximum value at an early point.

FIG. 5 is a waveform diagram for explaining the operation of the sine wave converter 3. The sine wave converter 3 is a ROM with 10-bit input and 10-bit output, receives the sawtooth wave data b that is the output of the cumulative adder as an address, and receives one cycle of sine wave data c for one sawtooth wave change. Is output. Therefore, the frequency of the sine wave data c is controlled by the control data and increases according to the frequency of the sawtooth wave b.

FIG. 6 is a waveform diagram for explaining the operation of this embodiment. V counter 1 of frequency control signal generator 1
With 01, the control data a increases every H pulse.
Accordingly, the frequency of the sawtooth wave output b of the cumulative adder 2 gradually increases, and the frequency of the sine wave output (sweep signal) c of the sine wave converter 3 also increases. That is, if the value of the control data a doubles, the frequency of the sine wave output c also doubles. Therefore, the method of changing the frequency of the sweep signal c can be arbitrarily set by the value of the control data a.

In this embodiment, since the V counter 101 is reset by the V pulse, the sine wave output c becomes a V sweep signal whose frequency changes every H period over the V period. For example, if the clock frequency from the synchronization signal generation circuit 6 is 14.3 MHz, the frequency of the V sweep signal can be changed from 100 KHz to 6 MHz in a horizontal cycle, but substantially linearly with time. . The maximum frequency is less than 1/2 of the clock frequency.

The number of bits of the cumulative adder 2 may be selected according to the minimum frequency interval and accuracy of the sweep signal. For example, when the clock frequency is 14.3 MHz and the adder 201 is selected to have 16 bits, the lowest frequency is 14.
It becomes 3 MHz / 2 ¹⁶ (about 218 Hz), and a sine wave that is an integral multiple of this can be generated.

The digital signal output from the video processing circuit 4 of this embodiment is a signal whose amplitude frequency characteristic does not change up to a frequency near 1/2 of the clock frequency which is the theoretical limit. As a result, the D /
The amplitude frequency characteristic of the A converter can be accurately measured. On the other hand, the analog output is affected by the low pass filter included in the D / A converter 5.

Further, since the cumulative adder 2 is reset every H pulse, the level at each scanning line start point becomes constant during monitor display, and a video signal with little flicker can be obtained.

[0024]

As described in detail above, the sweep signal generating circuit according to the present invention cumulatively adds the values of the control data which change at a predetermined time interval, and the cumulative addition means generates a frequency corresponding to the value of the control data. Sawtooth wave data having is generated, and a sine wave whose frequency changes with time is generated according to the sawtooth wave data. Therefore, it is possible to obtain a sweep signal generation circuit having a small circuit scale and low power consumption.

Further, if the time interval at which the value of the control data changes is set to the horizontal cycle and the changing method of returning to the initial value in the vertical cycle is adopted, the digital vertical sweep signal can be easily generated. it can.

[Brief description of drawings]

FIG. 1 is a schematic block diagram showing an embodiment of a sweep signal generating circuit according to the present invention.

FIG. 2 is a block diagram showing an example of a frequency control signal generator 1 in this embodiment.

FIG. 3 is a block diagram showing an example of a cumulative adder 2 in this embodiment.

FIG. 4 is a waveform diagram showing a cumulative addition operation of a cumulative adder 2.

FIG. 5 is a waveform diagram for explaining the operation of the sine wave converter 3.

FIG. 6 is a waveform diagram for explaining the operation of the present embodiment.

FIG. 7 is a block diagram showing an example of a conventional digital sweep signal generation circuit.

[Explanation of symbols]

 1 Frequency Control Signal Generator 2 Cumulative Adder 3 Sine Wave Converter 4 Video Process Circuit 5 D / A Converter 6 Sync Signal Generator 101 V Counter 102 Latch 103 ROM 201 Adder 202 Latch

Claims (8)

[Claims] 1. A circuit for digitally generating a sweep signal whose output frequency changes with time; frequency control means for generating control data whose value for determining the output frequency increases at a predetermined time interval; and the control data. Cumulatively adding the values of, and returning to the minimum value when the cumulatively added value reaches the maximum value; and a sine wave generating means for generating a sine wave of one cycle at one cycle of the cumulatively added value. A digital sweep signal generation circuit characterized by: 2. The value of the control data is increased by a constant amount at the predetermined time interval.
The described digital sweep signal generation circuit. 3. The frequency control means includes a counter that counts at the predetermined time interval, and a conversion means that converts the count value of the counter into the control data. The described digital sweep signal generation circuit. 4. The digital sweep signal generation circuit according to claim 1, wherein the cumulative addition means is initialized at the predetermined time interval. 5. The digital sweep signal generator according to claim 1, wherein the sine wave generating means outputs the sine wave data according to the address with the cumulative addition value as an address. circuit. 6. A circuit for digitally generating a sweep signal used for testing television equipment, wherein an output frequency changes with time, and a value for determining the output frequency changes in a horizontal cycle and a vertical cycle. Frequency control means for generating control data initialized by, cumulatively adding the values of the control data in a clock cycle, and cumulatively generating sawtooth wave data that returns to the minimum value when the cumulative addition value reaches the maximum value. Summing means, sine wave generating means for generating one sine wave in one cycle of the sawtooth wave data, and video processing means for forming a video signal based on the sine wave output from the sine wave generating means, A digital sweep signal generation circuit comprising: 7. The digital sweep signal generation circuit according to claim 6, wherein the cumulative addition means is initialized at the horizontal period. 8. The frequency control means comprises: a counter that counts in the horizontal cycle and resets in the vertical cycle; and a conversion means that converts a count value of the counter into the control data. The digital sweep signal generation circuit according to claim 6 or 7.