JPH07211915A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To reduce the number of removing processes of natural oxide films formed on the surface of a semiconductor layer composed of amorphous silicon, etc. CONSTITUTION:After forming an impurity injection mask 15a on the upper surface of a semiconductor layer 14, a natural oxide film formed on the surface of the layer 14 in an area which is not coated with the mask 15a is removed by using the aqueous solution of 1% diluted hydrofluoric acid. The removal of the natural oxide film is performed to improve the ohmic contact between source and drain electrodes formed in the succeeding process and the semiconductor layer 14. After removal, a layer 16 for forming the source and drain electrodes composed of chromium is formed on the entire upper surface of the layer 14. Then ions of such an impurity as phosphor, etc., are implanted into the layer 14 through the layer 16 by using the mask 15a as a mask. When the ions are implanted, no natural oxide film is formed on the surface of the layer 14 after the layer 16 is formed. Therefore, the number of natural oxide film removing processes can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor.

[0002]

2. Description of the Related Art An example of a conventional method of manufacturing a thin film transistor will be described with reference to FIG. First, FIG.
As shown in (A), a gate electrode 2 made of chromium is formed on the upper surface of a glass substrate 1, a gate insulating film 3 made of silicon nitride is formed on the entire upper surface thereof, and an amorphous silicon or polysilicon film is formed on the upper surface thereof. A semiconductor layer 4 made of a non-single crystal semiconductor is formed, and an impurity implantation mask 5 made of silicon nitride is formed at a predetermined portion on the upper surface thereof. next,
The natural oxide film (not shown) formed on the surface of the semiconductor layer 4 in the region not covered by the impurity implantation mask 5 is removed using a 1% dilute hydrofluoric acid aqueous solution. This is performed in order to maintain the uniformity and reproducibility of the impurity implantation in the next process. Next, as shown in FIG. 2B, impurities such as phosphorus ions and boron ions are implanted using the impurity implantation mask 5 as a mask to form source / drain regions in the semiconductor layer 4 in regions other than under the impurity implantation mask 5. The impurity implantation region 4a is formed. Next, the impurity implantation region 4
The natural oxide film (not shown) formed on the surface of a is similarly removed using a 1% dilute hydrofluoric acid aqueous solution. This is because the source / drain electrodes and the semiconductor layer 4 which will be formed in the next step.
This is performed to improve the ohmic contact with the impurity-implanted region 4a which will be the source / drain region. Less than,
Although not shown, after a predetermined process such as element isolation,
An inverted staggered thin film transistor is completed.

[0003]

However, the conventional method of manufacturing a thin film transistor as described above has a problem in that there are two natural oxide film removing steps using a dilute hydrofluoric acid aqueous solution, which is a large number of steps. An object of the present invention is to provide a method of manufacturing a thin film transistor that can reduce the number of steps.

[0004]

According to the present invention, a non-single crystal semiconductor layer is formed, a natural oxide film on the surface of the semiconductor layer is removed, and immediately thereafter, a conductive layer is formed on the semiconductor layer. ,
Impurities are implanted into the regions which will be the source / drain regions of the semiconductor layer through the conductive layer.

[0005]

According to the present invention, the conductive layer is formed on the semiconductor layer immediately after the natural oxide film on the surface of the semiconductor layer is removed, and the conductive layer is formed through the conductive layer to form the source / drain regions of the semiconductor layer. Since the impurities are injected, a natural oxide film is not formed on the surface of the semiconductor layer after the conductive layer is formed. Therefore, if the natural oxide film is removed once before the conductive layer is formed. Well, the number of steps can be reduced.

[0006]

1 (A) to 1 (E) show respective steps of manufacturing a thin film transistor according to an embodiment of the present invention. So, referring to these figures in order,
A method of manufacturing the thin film transistor of this example will be described.

First, as shown in FIG. 1A, a gate electrode 12 made of a conductive material such as chromium or aluminum is formed and patterned on the upper surface of a glass substrate 11 by sputtering or the like. Next, a gate insulating film 13 made of silicon oxide or nitride is formed on the entire upper surface of the glass substrate 11 including the gate electrode 12 by sputtering, plasma CVD or the like. Next, a semiconductor layer 14 made of a non-single crystal semiconductor such as amorphous silicon or polysilicon is formed on the upper surface of the gate insulating film 13 by plasma CVD or the like. Next, an impurity implantation mask forming layer 15 made of silicon oxide or nitride, a metal material, or the like is formed on the upper surface of the semiconductor layer 14 by plasma C.
A film is formed by VD or the like. Gate insulating film 13, semiconductor layer 1
4. The film formation of the impurity implantation mask forming layer 15 is efficient if continuously performed without being exposed to the atmosphere. Next, the impurity implantation mask forming layer 15 is patterned, and the pattern shown in FIG.
As shown in (B), an impurity implantation mask 15a is formed on the upper surface of the semiconductor layer 14 in the portion corresponding to the gate electrode 12. Next, the natural oxide film (not shown) formed on the surface of the semiconductor layer 14 in the region not covered by the impurity implantation mask 15a is removed using a 1% dilute hydrofluoric acid aqueous solution. This is performed in order to improve the ohmic contact between the source / drain electrodes formed in the next step and the semiconductor layer 14.

Immediately thereafter, as shown in FIG. 1C, a source / drain electrode forming layer (conductive layer) 16 is formed on the entire upper surface of the semiconductor layer 14 including the impurity implantation mask 15a by sputtering or plasma CVD. The film is formed to a film thickness of about 100 to 500Å. In this case, it is preferable to form the film within 2 hours after removing the natural oxide film, preferably within about 1 hour.
Next, as shown in FIG. 1D, the impurity implantation mask 15
Impurities such as phosphorus ions and boron ions are implanted through the source / drain electrode forming layer 16 using a as a mask,
Impurity implantation regions 14 to be source / drain regions are formed in the semiconductor layer 14 in regions other than under the impurity implantation mask 15a
a is formed.

A specific example of impurity implantation will be described here. The gate electrode 12 has a thickness of 1000 Å, the gate insulating film 13 has a thickness of 4000 Å, the semiconductor layer 14 has a thickness of 500 Å, and the impurity implantation mask 15a has a thickness of 2000 Å. -Drain electrode forming layer 16 has a film thickness of 250
Formed with Å chrome. In this case, if the implantation of phosphorus ions is carried out at an acceleration energy of ^{15 to} 50 kV and a dose amount of 10 ^{15 to 17} ions / cm ² , phosphorus ions are implanted into the impurity implantation region 14a in substantially the same manner as in the conventional example. In the conventional example shown in FIG. 2B, generally, phosphorus ions have an acceleration energy of 10
Since the injection is performed at kV and a dose of 10 ^{15 to 17} cells / cm ² ,
It can be seen that it is only necessary to make the acceleration energy higher than before.

Next, the source / drain electrode forming layer 16
When the semiconductor layer 14 is patterned, the pattern shown in FIG.
, The source / drain region 14 formed of the intrinsic region and the impurity-implanted region 14
The semiconductor layer 14 including c is formed in the device region, and the source / drain electrodes 16a are formed on the source / drain regions 14c. The activation of the implanted impurities is
Heat treatment is performed at a temperature of about 200 to 300 ° C. for 1 hour or more, or, though not shown, when an overcoat film made of silicon oxide or nitride is formed by plasma CVD in a subsequent step. Do at the same time. Thus, an inverted stagger type thin film transistor is completed.

As described above, in this method of manufacturing a thin film transistor, the source / drain electrode forming layer 16 is formed on the semiconductor layer 14 immediately after the natural oxide film on the surface of the semiconductor layer 14 is removed.・ Drain electrode 16
The ohmic contact between a and the source / drain region 14c of the semiconductor layer 14 can be improved. Also,
Since the source / drain electrode forming layer 16 is formed on the semiconductor layer 14, impurities are injected into the region to be the source / drain region 14c of the semiconductor layer 14 through the source / drain electrode forming layer 16. A natural oxide film is not formed on the surface of the semiconductor layer 14 after the source / drain electrode forming layer 16 is formed. Therefore, the natural oxide film is removed to form the source / drain electrode forming layer 16. It may be performed once before, and the number of steps can be reduced.

In the above embodiment, the source
Although the drain electrode 16a is formed thinly, the same material or a material to be an ohmic contact may be formed again to have a desired film thickness, if necessary. Further, the invention is not limited to the bottom gate type, and various modifications such as a top gate type thin film transistor can be applied.

[0013]

As described above, according to the present invention, a conductive layer is formed on the semiconductor layer immediately after the natural oxide film on the surface of the semiconductor layer is removed, and the conductive layer is formed through the conductive layer. Since the impurities are implanted into the source / drain regions, a natural oxide film is not formed on the surface of the semiconductor layer after the conductive layer is formed. The number of steps can be reduced by performing the process once before the film formation.

[Brief description of drawings]

1A to 1E are cross-sectional views showing respective manufacturing steps of a thin film transistor according to an embodiment of the present invention.

2A and 2B are cross-sectional views showing respective manufacturing steps of a conventional thin film transistor.

[Explanation of symbols]

 14 semiconductor layer 14c source / drain region 15a impurity implantation mask 16 source / drain electrode formation layer (conductive layer) 16a source / drain electrode

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Claims (2)

[Claims] 1. A non-single crystal semiconductor layer is formed, a natural oxide film on the surface of the semiconductor layer is removed, and immediately thereafter, a conductive layer is formed on the semiconductor layer, and the conductive layer is formed through the conductive layer. A method of manufacturing a thin film transistor, which comprises implanting an impurity into a region to be a source / drain region of a semiconductor layer. 2. The method of manufacturing a thin film transistor according to claim 1, wherein after the implantation of the impurities, the conductive layer is patterned to form source / drain electrodes.