JPH07183831A - Digital communication method and digital communication equipment - Google Patents

Abstract

PURPOSE:To provide a digital communication method and a digital communication equipment which are capable of performing communication which is equivalent to a multi-bit quantization by sampling a signal subjected to spread spectrum processing through a 1-bit quantization without requiring an A/D converter and an AGC. CONSTITUTION:In the demodulation part 20 of a digital communication device, an inputted signal 24 is separated into two signals which are different in a phase and are multiplied by a local signal in a separating part 213. Respective separated signals are converted into pseudo base band signals 25a and 25b in low-pass filters 214a and 214b and are outputted to a sampling part 21. The sampling part 21 includes comparators 22a and 22b sampling signals by performing a 1-bit quantization and correlators 23a and 23b. The output of the sampling part 21 is inputted to a phase calculator 216, the phase of the inputted signal 24 is calculated, further, the phase difference with the phase of the next timing is calculated in a demodulation circuit 217, a differential demodulation is performed to the phase difference and the result is outputted as a data output 26.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital communication method and a digital communication apparatus, and more particularly to a digital communication method and a digital communication apparatus using direct spread.

[0002]

2. Description of the Related Art Conventionally, various modulation methods are used for wireless digital communication. Among them, the phase modulation method is the most popular communication method. In particular, the differential PSK (Phase Shift) in the phase modulation method is used. Ke
Ying) system is often used as a communication system because it does not require synchronous demodulation.

FIG. 20 is a schematic block diagram showing a modulator of a conventional digital communication device, and FIG. 21 is a schematic block diagram showing a demodulator of a conventional digital communication device.

Referring to FIG. 20, modulator 201 includes a differential converter 202 and a modulator 203. Regarding the operation, first, the data 204 is converted by the differential converter 202. The output of the differential converter 202 is input to the modulator 203 and output as a modulated transmission signal 205.

With reference to FIG. 21, demodulation section 211 has an AG
A C (automatic gain control unit) 212, a separation unit 213, low-pass filters 214a and 214b, A / D converters 215a and 215b, a phase calculator 216, and a demodulation circuit 217 are included. The separating unit 213 includes a two-way divider 218 that divides the output of the AGC 212 into two, an oscillator 219 that oscillates a local signal, and a π / 2 phase rotator that rotates one phase of the local signal by π / 2. 220 and π
221 that multiplies the local signal having the phase difference generated by the 1/2 phase rotator 220 and the output of the two-way divider 218.
a and 221b are provided. The demodulation circuit 217 delays the output of the phase calculator 216 by 1 bit.
A bit delay unit 222 and a differential demodulator 223 that performs differential demodulation by calculating the phase difference between two bits from the output of the phase calculator 216 and the output of the 1-bit delay unit 222 are provided.

FIG. 22 is a diagram for explaining the operation of the demodulation unit of FIG. 21, and is a diagram for showing the phase of the input signal.

Referring to FIGS. 21 and 22, input signal 229 is maintained at a constant output level by AGC 212. The signal kept at a constant output level is 2
The divider 218 divides the signal into two, and the respective signals are input to the multipliers 221a and 221b.

On the other hand, the oscillator 219 receives the input signal 2
It oscillates a local signal having a frequency equal to 29 carrier waves. One of the local signals 224a oscillated by the oscillator 219 is input to the multiplier 221a. The other local signal 224b is rotated by π / 2 phase by the π / 2 phase rotator 220 and input to the multiplier 221b. The multiplier 221a multiplies the output of the two-way divider 218 and the local signal 224a to obtain the low-pass filter 21.
4a. The multiplier 221b multiplies the output of the two-way divider 218 and the local signal 224b and outputs the result to the low pass filter 214b. In this way, the separation unit 213
Separates the output of the AGC 212 into a plurality of signals that are multiplied by a local signal having a different phase and a frequency equal to that of the carrier of the input signal 229, and outputs a signal representing the result to the low-pass filters 214a and 214b. ing.

The low pass filters 214a and 214b are
The input signal is converted into pseudo baseband signals 225a and 225b equivalent to the baseband signal. The converted pseudo baseband signal 225a is converted into the A / D converter 21.
5a and the pseudo baseband signal 225b is A /
The data is input to the D converter 215b and subjected to sampling quantization. The outputs of the sampling-quantized A / D converters 215a and 215b are input to the phase calculator 216, and the phase of the input signal 229 is calculated.

Then, as shown in FIG. 22, unlike the synchronous demodulator, the asynchronous demodulator does not have a phase of 0 ° but has a certain angle θ. Therefore, the phase calculator 216 obtains the I-axis amplitude value 226 and the Q-axis amplitude value 227, and obtains the phase at θ = tan ⁻¹ . The phase θ calculated by the phase calculator 216 is the differential demodulator 2
23 and the 1-bit delay unit 22
Some are entered in 2. The phase θ delayed by the 1-bit delay unit 222 is input to the differential demodulator 223, the phase θ ′ of the next data is input by the phase calculator 216, and the differential demodulator 223 differentially demodulates. A signal representing the result of the differential demodulation is output as the data output 228.

As described above, in the differential PSK system, demodulation is performed while remaining asynchronous.

[0012]

However, since the phase angle is calculated from the amplitude values of the I-phase and Q-phase, it is necessary to obtain the amplitude values on the I-axis and the Q-axis.
A D converter is needed. If the resolution of the A / D converter and the output amplitude value are not suitable values, accurate demodulation cannot be performed, so the AGC controls so that the amplitude of the input signal is constant.
As described above, in the conventional differential PSK system, the A / D converter and the AGC are always required.

Nevertheless, in wireless communication, the amplitude may fluctuate rapidly and at high speed due to instability of the propagation path, fading, changes in the path path, and the like. Under such circumstances, there was a situation in which the AGC could not handle the situation.

Therefore, the present invention solves the above problems, does not require an A / D converter and AGC, and can achieve the same effect as multi-bit quantization with 1-bit quantization. And to provide a digital communication device.

[0015]

A digital communication method according to a first aspect of the present invention is a digital communication method for directly demodulating a received signal which is modulated by directly spreading by giving a code sequence to a differentially converted signal. The modulated received signal
A first step of separating into a plurality of signals multiplied by a local signal having a different phase and a frequency equal to that of a carrier wave, and converting each signal separated in the first step into a signal equivalent to a baseband signal Using the second step, the third step of quantizing and sampling each signal converted in the second step by 1 bit, and outputting as a correlation output, and the correlation output output in the third step A fourth step of calculating the phase of the modulated received signal,
The phase difference generated between the phase calculated in the fourth step and the phase of the modulated reception signal obtained 1 bit later is calculated, and whether the phase difference is within a predetermined discriminating phase point or not. It includes a fifth step of determining whether or not and demodulating.

A digital communication device according to a second aspect of the present invention is a digital communication device for demodulating a received signal which is directly spread by modulating a differentially converted signal by giving a code sequence to the modulated signal. Separation means for separating a received signal into a plurality of signals multiplied by a local signal having a different phase and a frequency equal to that of a carrier, and conversion for converting each signal separated by the separation means into a signal equivalent to a baseband. Means, a sampling means for quantizing each signal converted by the converting means by 1 bit and sampling, and further outputting as a correlation output, and a phase of the reception signal modulated using the correlation output which is the output of the sampling means. And a phase difference generated between the phase calculated by the phase calculating means and the phase of the modulated reception signal obtained 1 bit later, and the phase difference is calculated. And a demodulating means for demodulating whether to within predetermined determination phase point determined to.

In the third aspect, the sampling means of the second aspect is
It includes a comparator which quantizes and samples each signal converted by the conversion means by 1 bit, and a correlator for outputting the output of the comparator as a correlation output.

According to a fourth aspect of the present invention, the separating means according to the second or third aspect is a dividing means for dividing the modulated reception signal into a plurality of signals, an oscillating means for oscillating a local signal, and a local oscillator oscillated by the oscillating means. In order to change a signal into a plurality of local signals having different phases, a phase rotation means for giving a phase difference to one signal, each local signal having a phase difference in the phase rotation means and each signal distributed by the distribution means And multiplication means for multiplying by.

According to a fifth aspect of the present invention, the separating means according to the second or third aspect of the present invention is arranged such that the modulating means divides the received signal into a plurality of signals and a phase difference is generated between the signals distributed by the distributing means. A phase rotating means for giving a phase difference to the signal, an oscillating means for oscillating a local signal, and a multiplying means for multiplying each signal having a phase difference by the phase rotating means by the local signal oscillated by the oscillating means. I'm out.

According to a sixth aspect of the present invention, the separating means according to the second or third aspect is a dividing means for dividing the modulated reception signal into a plurality of signals having different phases, an oscillating means for oscillating a local signal, and a dividing means. And a multiplying unit that multiplies each signal distributed by the local signal oscillated by the oscillating unit.

In a seventh aspect, the phase calculating means according to any one of the second to sixth aspects estimates the value of the correlation output from the probability of the Gaussian noise distribution or Nakagami-Rice distribution corresponding to the communication state, and estimates it. The feature is that the phase is calculated based on the value of the correlation output.

In the eighth aspect, the phase calculating means of the seventh aspect includes the first storing means for storing in advance the relationship between the estimated value of the correlation output and the phase, and the phase is calculated by using the table pickup method. Is calculated.

According to a ninth aspect of the present invention, the demodulating means according to any one of the second to eighth aspects is a delay means for delaying the phase calculated by the phase calculating means by one bit, and a demodulated signal obtained after one bit by the phase calculating means. A differential that calculates a phase difference generated between the phase of the received signal and the phase delayed by 1 bit by the delay unit, determines whether the phase difference is within a predetermined determination phase point, and demodulates it. The differential demodulation means includes a demodulation means, and is characterized in that the predetermined discrimination phase point is changed according to the frequency difference of the carrier wave between transmission and reception.

According to a tenth aspect, the demodulating means of the ninth aspect is
The present invention is characterized in that the discriminating phase point is calculated by using a table pickup method, including second storage means for storing the discriminating phase point which changes according to the frequency difference of the carrier wave between transmission and reception.

In the eleventh aspect of the present invention, the demodulating means according to any one of the second to tenth aspects sets the discriminating phase point to a value shifted by a predetermined amount according to the C / N between transmission and reception. There is.

In a twelfth aspect, the digital communication device according to any one of the second to eleventh aspects further comprises third storage means for storing a phase difference in a carrier wave between transmission and reception, and a communication target is set in the next communication. It is characterized in that it is discriminated and switched to an optimum discriminating phase point according to the phase difference stored in the third storage means.

In the thirteenth aspect of the present invention, in the digital communication apparatus of the twelfth aspect, the third storage means is provided only in the master unit when a relation between the master unit and the slave unit with respect to the communication unit for transmitting and receiving. The master unit is characterized by communicating with the optimum phase amount for the slave unit.

According to claim 14, claim 9, 10 or 1.
In the digital communication device of No. 1, when the relationship between the master unit and the slave unit is generated with respect to the communication device that transmits and receives,
Only the master unit calculates the phase difference, and the demodulation means of the slave unit switches to the optimum discriminating phase point based on the phase difference calculated by the master unit and demodulates.

According to a fifteenth aspect, in the slave unit according to the fourteenth aspect,
A fourth storage unit capable of storing the phase difference calculated by the master unit is provided, and the demodulation unit of the slave unit demodulates using the phase difference stored in the fourth storage unit during the next communication. Is characterized by.

In claim 16, claim 9, 10 or 1.
In the digital communication device of No. 1, when the relationship between the master unit and the slave unit is generated with respect to the communication device that transmits and receives,
It is characterized in that only the base unit calculates the phase difference, demodulates it at the optimum discriminating phase point, and shifts the phase difference to be transmitted to the slave unit in reverse.

[0031]

The digital communication method and the digital communication apparatus according to the present invention are equivalent to multi-bit quantization in that the received signal, to which the code sequence is applied, is directly spread and modulated is quantized by 1 bit and sampled. Demodulation can be performed. Therefore, the A / D converter and the AGC are not required, and even if the amplitude due to fading or a change in the path route is intense and the amplitude fluctuates at a high speed, the received signal directly diffused and modulated becomes a multipath or a narrow band noise. The secondary advantage of being strong allows accurate demodulation.

[0032]

1 is a schematic block diagram showing a modulator of a digital communication apparatus according to a first embodiment of the present invention, and FIG. 2 is a demodulation of the digital communication apparatus according to the first embodiment of the present invention. 3 is a schematic block diagram showing a part, and FIG.
FIG. 3 is a schematic block diagram showing an internal configuration of the differential demodulator of FIG. 2. Only parts different from the schematic block diagram of the conventional digital communication device shown in FIGS. 20 and 21 will be described below.

Referring to FIG. 1, modulator 12 of modulator 11
Includes a primary modulator 13 and a secondary modulator 14 that performs spread spectrum. Therefore, the data 15 is data-converted by the differential converter 202, modulated by the modulator 12 including the secondary modulator 14 that performs spread spectrum, and output as the transmission signal 16. Generally, the primary modulator 1
In many cases, the third and second modulators 14 operate at the same time to modulate the data-converted signals of the differential converter 202.

Referring to FIG. 2, demodulation unit 20 includes AGC 212 shown in FIG. 21 and A / D converters 215a and 215a.
A sampling unit 21 is provided by removing 15b. The sampling unit 21 quantizes the outputs of the low-pass filters 214a and 214b by 1 bit and samples them by a comparator 22a,
22b and correlators 23a and 23b for outputting a correlation output.

Although not described in the conventional example shown in FIG. 21, the phase difference calculator 31 to which the output of the phase calculator 216 and the output of the 1-bit delay unit 222 are input to the differential demodulator 223. And a data determination unit 32 that determines whether the input signal 24 is 0 or 1 based on the phase difference calculated by the phase difference calculation unit 31.

FIG. 4 is a flow chart for explaining the operation of the phase calculator of FIG. In operation, the input signal 24 is separated by the separating unit 213 into a plurality of signals having different phases and multiplied by the local signal oscillated by the oscillator 219. One of them is the low-pass filter 21.
4a is converted into the pseudo baseband signal 25a, and the other is converted into the pseudo baseband signal 25a by the low pass filter 214b.
It is converted into b and output to the sampling unit 21. Sampling unit 2
In 1, first, the comparators 22a and 22b first quantize and sample the pseudo baseband signals 25a and 25b, respectively, and the correlators 23a and 23b output the correlation outputs to the phase calculator 216.

Referring to FIG. 4, phase calculator 216 first determines the quadrant in which the phase angle exists based on the outputs of correlators 23a and 23b. Then, the calculation of θ = tan ⁻¹ is performed, and the signal representing the phase is input to the demodulation circuit 217 after being corrected if necessary. In the demodulation circuit 217, the phase delayed by 1 bit by the 1-bit delay device 222 and the phase after 1 bit are input to the differential demodulator 223. The phase difference calculation unit 31 of the differential demodulator 223 calculates the phase difference between the two bits, and the data determination unit 32 determines whether the signal 24 input by the determination method described in detail later is 0 or 1. Data output that is differentially demodulated
6 is output.

FIG. 5 is a diagram showing the state of the output of the correlator shown in FIG. Hereinafter, it will be explained that performing 1-bit quantization with spread spectrum exhibits the same effect as multi-bit quantization.

For example, it is assumed that the number of chips when spectrum spreading is performed by the secondary modulator 14 of FIG. 1 is 127 chips. In general, the correlator compares the 127 chips with each other for coincidence and non-coincidence, and outputs the sum as a correlation output. Therefore, if the match is +1 and the mismatch is -1, the correlation output is from +127 to
It can take a value within the range of -127. Therefore, +127
When the correlation output takes a positive value from 0 to 0, the data input to the correlator is +1, and when the correlation output takes a negative value from 0 to -127, the data is input to the correlator. The obtained data can be judged as -1.

By the way, in an actual wireless system, each chip has an error rate due to white noise (also called white noise or Gaussian noise, which is characteristic of thermal noise generated in nature) superimposed on a line. Since this error rate varies depending on C / N (carrier / noise), as a result, the correlator outputs a correlation output according to C / N.

Next, the spread spectrum-correlated output is I
When viewed as an axis and a Q axis, if the C / N of the input signal is constant, the N component is the same for the I axis and the Q axis, but for the C component, the I axis is Acos θ and the Q axis is Asin θ. Represented. Where A is the voltage amplitude of the C component, and θ
Is the phase angle. Therefore, in general, the phase angle θ
Was tan ⁻¹ (Q output / I output). On the other hand, even when using spread spectrum, the I axis, Q
C / N of the axes are (Acos θ / N) and (Asin
θ / N). The correlation output is C as described above.
Since the error rate of the chip value according to / N is followed, the correlation output on the I axis is an output corresponding to Acos θ, and the correlation output on the Q axis is an output corresponding to Asin θ. Therefore, 1-bit quantized data is divided into 127 levels, and a resolution equivalent to 7-bit quantization is obtained. Therefore, even when the spread spectrum is used, the phase angle θ is similarly tan ⁻¹ (Q
Output / I output).

As described above, even in the case of 1-bit quantization, the phase demodulation similar to that in the case of multi-bit quantization can be performed by utilizing the characteristic of the spread spectrum. In spread spectrum, it is possible to transmit a wider band than the band used in conventional communication. For example, in the case of 127 chips, since a 127 times wider band can be obtained, an advantage that it is highly resistant to multipath fading and narrow band interference can be obtained.

FIG. 6 is a schematic block diagram showing a demodulation section of a digital communication apparatus according to the second embodiment of the present invention. Only parts different from those of the first embodiment shown in FIG. 2 will be described below.

The π / 2 phase rotator 220 of the separating unit 213 shown in FIG. 2 is removed, and the two-divider 218 of the separating unit 44 is removed.
And the multiplier 221b are provided with a π / 2 phase rotator 41. As a result, the input signal 42 is divided into two by the two-way divider 218, one of which is directly input to the multiplier 221a, and the other of which is π / 2 phase rotator 41 with respect to the carrier frequency. It is input to the multiplier 221b as a signal obtained by rotating the / 2 phase. Multipliers 221a and 221b
Since the local signal oscillated by the oscillator 219 is input to the multiplier 221a, the multiplier 221a multiplies the signal input from the two-way divider 218 and the local signal input from the oscillator 219 to the low-pass filter 214a. input. The multiplier 221b multiplies the signal whose phase is shifted by the π / 2 phase rotator 41 and the local signal oscillated by the oscillator 219, and inputs the result to the low-pass filter 214b.

The outputs of the low-pass filters 214a and 214b are quantized by 1 bit in the sampling section 21 and input to the phase calculator 216 as a correlation output. The output of the phase calculator 216 is differentially demodulated by the demodulation circuit 217 and the data output 43
Is output as.

That is, the difference between the second embodiment shown in FIG. 6 and the first embodiment shown in FIG. 2 is that the local oscillator oscillated by the oscillator 219 in the embodiment shown in FIG. While the phase of the signal is shifted, in the embodiment shown in FIG. 6, one of the outputs of the two-way divider 218 is shifted in phase.

FIG. 7 is a schematic block diagram showing a demodulation unit of a digital communication device according to the third embodiment of the present invention. Only parts different from those of the first embodiment shown in FIG. 2 will be described below.

The two distributor 21 in the separating unit 213 of FIG.
The 8 and π / 2 phase rotators 220 are removed, and instead, in the third embodiment shown in FIG. 7, the 90 ° distributor 51 is provided in the part of the two distributors 108 in the separating section 54.

Regarding the operation, one of the signals 52 input by the 90 ° distributor 51 of the separating unit 54 is shifted by 90 ° and distributed, and is input to each of the multipliers 221a and 221b. The local signal of the oscillator 219 is the multiplier 221.
a and 221b, the multipliers 221a and 221b multiply the signals input from the 90 ° distributor 51 and the oscillator 219, respectively. The output of the multiplier 221a is converted into a pseudo baseband signal by the low pass filter 214a and input to the sampling unit 21,
The output of the multiplier 221b is converted into a pseudo baseband signal by the low pass filter 214b and input to the sampling unit 21.

The sampling unit 21 includes comparators 22a and 2a.
1b is quantized by 2b and sampled, and the correlators 23a, 2
The correlation output output from 3b is input to the phase calculator 216. The phase calculator 216 calculates the phase from the outputs of the correlators 23a and 23b and inputs it to the demodulation circuit 217. The demodulation circuit 217 calculates the phase difference between the two bits output from the phase calculator 216 and outputs the difference. Dynamically demodulate and output as data output 53.

As described above, the difference between the first embodiment shown in FIG. 2 and the third embodiment shown in FIG.
In the first embodiment shown in FIG. 7, one of the local signals oscillated by the oscillator 219 is shifted, whereas in the embodiment shown in FIG. 7, the 90 ° distributor 51 distributes the input signal 52. And to shift the phase at the same time.

FIG. 8 is a flow chart for explaining the operation of the phase calculator in the demodulation section of the digital communication apparatus according to the fourth embodiment of the present invention.

In the first embodiment shown in FIG. 2, the second embodiment shown in FIG. 6 and the third embodiment shown in FIG. 7, the phase calculator 216 as the phase calculating means is shown in FIG. Similar to the conventional example shown, the operation was performed according to the flowchart shown in FIG. That is, the phase angle θ is determined by the correlators 23a, 23
θ = tan based on the I and Q outputs which are the outputs of b
^-1 (Q output / I output).

However, in the embodiments shown in FIGS. 2, 6 and 7, since the comparators 22a and 22b quantize the pseudo baseband signals output from the low pass filters 214a and 214b by 1 bit and sample them, It is possible to calculate the phase angle corresponding to the error characteristic of 1-bit quantization and sampling. As a result, the BER characteristic (Bit Error Rate) representing the characteristic of the error rate is obtained.
It is considered that more accurate differential demodulation is performed by improving

C on the I-axis when 1-bit quantization is performed
/ N is Acos ² θ / N, C / N on the Q axis is Asin
It has been found that obtained as ^{2 θ} / N. The error rate is the probability of error for one sample, C /
When the ratio of N is γ, the error rate P _e is expressed by the equation (1) by using the error function erfc.

P _e = (1/2) erfc (γ ^1/2 ) (1) Since this error rate P _e is an error rate of one chip unit,
For example, if the correct case is 1 and the incorrect case is 0, it can be said that the probability of becoming 0 when a certain sample is selected is the error rate P _e . In the case of spread spectrum, a sum of error rates of, for example, 127 chips is required.

By the way, when a nearly infinite n samples are obtained, n · P _e number becomes zero of all samples, since the n · (1-P _e) number is 1, the sum of the time The average is obtained as 1-P _{e which} can be called an expected value.
In spread spectrum, if the sum of a large number of chips, for example 127, is taken, although it is not an infinite number of sums, then the sum of the sum averages at that time is:
Since (1-P _e ) · 127, the correlation output of the I-axis and the Q-axis becomes an output proportional to (1-P _e ).

If θ = 45 °, I output and Q
Outputs have the same correlation output distribution, but θ = 30 °
In the case of, C ₁ = A cos ² θ = A · (1/2), C
₂ = Asin ² θ = A · (1/4), and each C /
N is C ₁ / N = (γ ₁ ) ^1/2 , C ₂ / N = (γ ₂ ) ^1/2
Therefore, each error rate P _e is (1/2) erfc
((Γ ₁ ) ^1/2 ), (1/2) erfc
It becomes according to ((γ ₂ ) ^1/2 ).

For example, (1/2) erfc ((γ ₁ )
^1/2 ) = 0.2, (1/2) erfc ((γ ₂ ) ^1/2 )
= 0.3, the phase calculator 216 of the embodiment shown in FIGS. 2, 6 and 7 is tan ⁻¹ (0.7 / 0.
8) = 41.2 ° was output. On the other hand, a phase angle close to θ = 30 ° can be calculated by calculating the error rate peculiar to the 1-bit quantization according to the fourth embodiment based on the error function erfc.

The error function is not a trigonometric function, but a Gaussian noise distribution or Nakagami-Rice distribution can be considered. The Gaussian noise distribution is the distribution of white noise when there is no signal, and the Nakagami-Rice distribution is the distribution when there is both signal and white noise. The reason for using the error function based on such a distribution is that the relationship between the C / N on the I axis and the Q axis and the error rate is not in a completely proportional relationship. Since the error function corrects the change in the error rate with respect to the change rate of C / N so as to have a proportional relationship, a more accurate phase calculation is performed by using the error function.

Due to the use of the error function, the phase calculator 216 is not the flow chart shown in FIG.
It operates according to the flowchart shown in. That is, the outputs of the correlators 23a and 23b are input, and first the ratio (γ ₁ , γ ₂ ) of the I output and the Q output is calculated. Then, the value is substituted into the error function to calculate the error function value. Further, the phase angle θ according to the error function value is output.

FIG. 9 is a diagram showing a main part in a demodulation section of a digital communication apparatus according to the fifth embodiment of the present invention.

The calculation of the error function for calculating the phase angle shown in the fourth embodiment requires time. Therefore, the error function values of the I output and the Q output are calculated in advance and stored in the ROM 61, which is an example of the storage means. The ROM 61 is provided in place of the phase calculator 216, and the stored error function value is selected by the table pickup method, whereby the phase can be calculated at high speed. This makes it possible to cope with the case where high-speed digital communication needs to be performed.

As shown in FIG. 10, the correlator 23
The outputs of the latch circuits 62 may be input to the ROM 61 instead of being directly input to the ROM 61.

By the way, the first embodiment shown in FIG. 2, the second embodiment shown in FIG. 6, the third embodiment shown in FIG.
In the fourth embodiment using the error function and the fifth embodiment shown in FIG. 9, the differential demodulator 223 shown in FIG. 3 is used.
Compares the phase information obtained at a certain time timing t with the phase information obtained at the previous timing t−Δt (Δt: time of one bit of data), and the base of the signal input from the phase difference. 0 or 1 of the data that has become is determined. As shown in FIG. 11, the differential demodulator 223 uses the phase θ ₂ obtained by the vector 71 obtained at the timing t and the phase θ ₁ obtained by the vector 72 obtained at the timing t−Δt to cause the phase difference between the two phase differences (θ ₂ −θ ₁ ) is calculated, and if this value is within the range of the discrimination phase point −90 ° to the discrimination phase point + 90 °, the data in that case is set to 0, and conversely, + 90 °
In the case of ~ + 180 ° and -180 ° to -90 °,
The data at that time was judged as 1.

When the frequency difference between transmission and reception is small, the discrimination phase points for discriminating the data are set to -90 and +90, and if the phase difference is within the range of -90 ° to + 90 °, 0 or 1 of the data is obtained. Can be accurately determined. On the other hand, when the frequency difference is large, the phase shifts for each data, which causes a problem that 0 or 1 of the data cannot be correctly determined.

For example, assuming that the data rate is 100 Kbps, 1 / 100K per bit = 10 ⁻⁵ se
Since the length is c, if there is a frequency error of 5 KHz, 5 × 10 ³ (Hz) × 360 ° × 10 ⁻⁵ = 18 °
Therefore, the frequency deviation per bit is 18 ° (= 0.
05 Hz). Therefore, if such phase difference is taken into consideration and the phase discrimination point is shifted from −72 ° to + 108 °, for example, even if the frequency difference between transmission and reception is large, the determination of 0 or 1 of the data is correct. Done. An embodiment based on the above principle will be described with reference to FIG.

FIG. 12 is a schematic block diagram of a differential demodulator which performs differential demodulation by shifting the discrimination phase point for discrimination when the frequency difference between transmission and reception is large, and is a sixth embodiment of the present invention. FIG. 6 is a schematic block diagram of a differential demodulator in a demodulation unit of a digital communication device according to an example. Hereinafter, parts different from the differential demodulator shown in FIG. 3 will be described.

The differential demodulator 81 receives the output of the phase calculating section 31 as an integral averaging calculating section 82 and the phase difference calculating section 31 and the discriminating phase point as receiving the output of the integrating averaging calculating section 82. And a discriminating phase point correcting section 8 are provided.
The output of 3 is input to the data determination unit 32, and 0 or 1 of the data is determined.

The integration / averaging arithmetic unit 82 integrates and averages the phase difference of each data. The discriminant phase point correction unit 83 determines and corrects the amount by which the discriminant phase points are shifted according to the averaged phase difference. Then, the data determination unit 32 determines 0 or 1 of the data based on the shifted determination phase point.

As a result, it is possible to remove the peculiar phase error that has occurred when the frequency difference is large, always detect the phase difference for the data modulation, and reduce the error rate and improve the accuracy.

If the data judging section 91 shown in FIG. 13 has a function of shifting the discriminating phase point, the data judging section 91 includes a phase difference calculating section 31 and an integral averaging calculating section 8.
The output of 2 may be input as it is.

FIG. 14 is a schematic block diagram of a differential demodulator in the demodulation unit of the data communication apparatus according to the seventh embodiment of the present invention, and FIG. 15 is a view showing the ROM of FIG.

The differential demodulator 101 is provided with a ROM 102 as shown in FIG. 15 and an integration / averaging calculator 103 for calculating the phase difference and integrating and averaging the phase difference. R
The output of the phase calculator and the output of the 1-bit delay unit are input to the OM 102, and the output of the phase calculator and the output of the 1-bit delay unit are also input to the integration / averaging calculation unit 103.

As shown in FIG. 15, in the ROM 102, the phase data at the timing t is input to the address terminals A _{0 to} A _7, and the phase data at the timing t-Δt is input to the address terminals A _{8 to} A _15. ing. ROM10
Since 2 has an 8-bit configuration, for example, the discrimination phase point for discriminating at the output terminal O ₀ is −90 ° to + 90 °, and the discrimination phase point for discriminating at the output terminal O ₁ is −90 ° to ++.
Discrimination phase points for discriminating the output terminals O ₂ to O ₇ such as 85 ° are stored while being slightly shifted.

In this way, the closest discriminating phase point for discriminating is selected according to the frequency difference between transmission and reception, and is selected by the data selector or the like to calculate the phase difference and rotate the discriminating phase. Since three operations of data discrimination are omitted, higher speed data communication can be supported. Here, the calculation of the phase difference means that the phase difference is calculated from the phase angle obtained from the I output and the Q output and the phase angle obtained at the next timing. The rotation of the discrimination phase means that the discrimination phase point for discrimination given as a specific example is shifted by 18 ° to be −72 ° to + 108 °. The determination of data means comparing the relationship between the phase difference and the determination phase point for determination, and determining whether the data becomes 1 or 0 depending on the size. In this way, the deviation of the discriminating phase point with respect to the phase difference between the transmission and reception is previously set to R
If it is stored in a storage means such as OM and the table pickup method is used, it is effective when high-speed transmission is required.

In FIG. 15, the storage means 512 is used.
Although the K type ROM is shown, the memory capacity may be determined according to the resolution of the phase data, and other storage means such as RAM may be used.

FIG. 16 is a diagram for explaining the reason why the digital communication device according to the eighth embodiment of the present invention is proposed.

The first embodiment shown in FIG. 2, the second embodiment shown in FIG. 6, the third embodiment shown in FIG. 7, the fourth embodiment using the error function, and the FIG. The illustrated fifth embodiment, FIG.
In the sixth embodiment shown in FIG. 2 and the seventh embodiment shown in FIG. 14, the timing t and the timing t−Δ are all
The phase difference between t was calculated and demodulated.

However, when C / N is extremely good,
For example, in mobile communication, when a terminal station moves close to the master station, C / N higher than normal C / N by several tens of dB is used.
The value of N may be obtained. At this time, since the error rates of both the I output and the Q output almost approach 0, the phase of the correlation output of 127 chips, for example, is completely quantized into four values as the vector shown in FIG.

That is, the 1-bit non-quantized phase is the vector 111, 112,
It changes like 113,114,115. On the other hand, when the C / N is good and the error rate is 0, when 1-bit quantization is performed, the vectors 111, 112 and 113 are quantized into the vector 116, and the vectors 114 and 115 are quantized into the vector 117. It After all, the quantized vectors 116, 117, 118, 119 become the vector 11
6 → vector 117 → vector 118 → vector 119
→ Vector 116 → ... Moves only among four points according to the frequency difference between transmission and reception. Therefore, the phase difference for each timing Δt is −90 °, and if the discrimination phase point for discrimination is −90 ° to + 90 °,
This −90 ° is just on the boundary of the discrimination, and it is detected as 1 or 0 with a half probability and is erroneous.

Therefore, when the C / N is extremely good and the error rate is close to 0, the discrimination phase point for discrimination is -95.
Misalignment can be reduced by slightly shifting the angle, such as ° and + 85 °. Further, when the phase rotates clockwise instead of counterclockwise, the phase difference 90 ° obtained for each Δt is −85 by setting the determination phase points for determination to −85 ° and + 95 °. The error rate becomes small within the range of ° to + 95 °.

Since the rotation direction of the phase for each timing Δt is determined by the frequency difference, it does not reverse in the middle, and it is -90 ° to +9 depending on the communication state.
It suffices to slightly shift 0 ° in the positive or negative direction.

Furthermore, when the discriminating phase point for discriminating according to the frequency difference in the sixth and seventh embodiments is shifted, when the C / N is extremely good as shown in the eighth embodiment. The error rate can be further reduced and the performance of this digital communication device can be improved by adding the discriminating phase point for discriminating also.

Further, as shown in the seventh embodiment, the discriminating phase point corresponding to the frequency difference is stored in the storage means, and the communication speed is increased by the table pickup method.
It is also possible to store the relationship with the discriminating phase point for discriminating between C / N as shown in the embodiment of FIG.

FIG. 17 is a schematic block diagram of an integral / averaging calculation unit in the demodulation unit of the digital communication apparatus according to the ninth embodiment of the present invention.

In all of the first to eighth embodiments, the frequency difference between transmission and reception is calculated during communication to change the discriminating phase point and select the data stored in the storage means. Was there. However, the frequency difference between transmission and reception originally depends largely on the reference oscillator used in each digital communication device. In general, a highly accurate crystal oscillator is used as the reference oscillator, and the frequency difference between transmission and reception largely changes due to variations in the initial setting frequency of the crystal and aging. Especially, it is considered that the temperatures are almost the same between the transmitting and receiving sides, and the changes due to the temperature difference of the crystal are considered to be equivalent.

Therefore, in order to utilize this variation in frequency, in this embodiment, FIG. 12 and FIG.
The integration / averaging calculation unit 82 shown in FIG. 14 and the integration / averaging calculation unit 103 shown in FIG.
Change to 21.

The integration / averaging calculator 121 receives the output of the phase calculator and inputs the outputs of the integration / averaging calculator 122 and the integration / averaging calculator 122 for calculating the averaging of the phase difference. The control unit 123 and the backup memory 125 to which the output of the control unit 123 is input
And a correction selection unit 124 to which the outputs of the integration / averaging calculation unit 122, the control unit 123, and the backup memory 125 are input.

The previous memory frequency difference Δf is stored in the backup memory 125. Control unit 123
Controls whether the correction value selection unit 124 directly uses the frequency difference calculated by the integration / averaging calculator 122 or uses the frequency difference stored in the backup memory 125. Further, the control unit 123 also controls whether to rewrite the frequency difference stored in the backup memory 125.

Therefore, it is assumed that a plurality of digital communication devices according to this embodiment are provided and each is determined as station A and station B, for example. In that case, station A can be considered to be ahead of station B in frequency by, for example, Δf. Therefore, if the frequency difference Δf, in other words, the phase difference is stored in the backup memory, which is an example of the storage unit, the frequency difference Δf does not have to be calculated each time, and the demodulation can be optimized at high speed.

Further, when the digital communication apparatus according to this embodiment is used for three stations, combinations such as C station and D station, C station and E station, D station and E station appear. If each station can identify a target station such as an identification number, each station can identify each station and perform differential demodulation with an optimum phase.

FIG. 18 is a diagram for explaining a digital communication device according to the tenth embodiment of the present invention.

In the ninth embodiment, the digital communication device is used for a plurality of stations and the phase difference between the stations is stored in the storage means such as the backup memory. By the way, there is a case where a relationship between the parent device 131 and the child device 132 occurs as shown in FIG. In that case, since the device of the parent device 131 may be large, the cost and power consumption may be increased to some extent. On the other hand, it is sometimes necessary to reduce the size and weight of the child device 132, which makes it difficult to incorporate a storage unit such as the backup memory 133. Therefore, the backup memory 133
If the storage means such as is provided only in the parent device 131 and transmission and reception are performed between the parent device 131 and the child device 132, the load of the circuit and power consumption of the child device 132 can be reduced.

Next explained is a digital communication device according to the eleventh embodiment of the invention.

Also in this embodiment, it is assumed that there is a relationship between the master unit and the slave unit with respect to the communication device used between the stations. In order to detect the phase difference, the phase calculator 216
Since a circuit for integrating and calculating the phase of data like the demodulation circuit 217 is required, a circuit for detecting this phase difference is provided only in the master unit. That is, the frequency difference Δf between the master unit and the slave unit is, for example, + Δf from the master unit to the slave unit, and −Δf from the slave unit to the master unit. If detected, the phase difference between the master unit and the slave unit will be detected.

Therefore, if the circuit for detecting the phase difference is provided only in the master unit which does not matter even if the device is large and not in the slave unit, the load of the slave unit circuit and the power consumption is reduced.
As a result, the circuit for detecting the phase difference is removed from the slave unit, so that it may be possible to provide a storage unit such as a backup memory in the slave unit. Therefore, by storing the frequency difference between the slave unit calculated by the master unit and the master unit in the storage unit such as a backup memory, the slave unit can communicate favorably from the start of connection.

FIG. 19 is a schematic block diagram of a digital communication device used as a master unit according to the twelfth embodiment of the present invention.

As shown in the eleventh embodiment, when the phase difference is detected only by the master unit and the communication between the master unit and the slave unit is performed, the slave unit sets a discriminating phase point for discriminating. Need to change in a way. However, if the base unit transmits in advance so as not to shift the discrimination phase point for discriminating the slave unit, the slave unit can discriminate at the discriminating phase point for the original discrimination. Therefore, the master unit 141 has a demodulation unit 143.
A correction phase control unit 144 is provided for controlling the phase output from the modulation unit 142 to the slave unit according to the output of.

Here, for example, the phase difference is Δ per bit.
If θ = 10 ° is deviated, the discriminating phase points for discriminating by the parent device 141 are 100 ° and −80 °, and when transmitting to the child device, if the data to be transmitted is 0, −10 °,
If the data to be transmitted is 1, it is necessary to transmit with a differential phase of 170 °. Therefore, the correction phase control unit 144
Controls the modulator 142 in this way,
The slave unit sets the discrimination phase points for discrimination to 90 ° and −90 °.
There is no need to shift it as it is.

As described above, if only the master unit is used to change the discrimination phase points for calculating and discriminating the phase difference between the transmission and reception, the circuit load on the slave unit is considerably reduced, and the cost of the slave unit is reduced. Can be suppressed.

In the embodiment, -90 ° to + 90 ° is basically used as the discriminating phase point of data, but this is because the BPSK system is explained, and the discriminating phase point is -45 ° to + 45 °. + 45 ° to + 135 °, +13
Q, like 5 ° to + 225 °, + 215 ° to + 315 °
The present invention can be applied even to the PSK method. That is,
The present invention can be applied to multi-phase PSK such as QPSK and 8PSK.

[0103]

As described above, according to the present invention, a code string is given, and the received signal which is directly spread and modulated is 1
Since bit quantization is performed and sampling is performed, demodulation equivalent to multi-bit quantization can be equivalently performed, and strong communication such as fading and multipath peculiar to direct diffusion can be performed.

[Brief description of drawings]

FIG. 1 is a schematic block diagram showing a modulator of a digital communication device according to a first embodiment of the present invention.

FIG. 2 is a schematic block diagram showing a demodulation unit of the digital communication device according to the first embodiment of the present invention.

3 is a schematic block diagram showing an internal configuration of the differential demodulator of FIG.

FIG. 4 is a flowchart for explaining the operation of the phase calculator of FIG.

5 is a diagram showing an example of an output state of the correlator in FIG.

FIG. 6 is a schematic block diagram showing a demodulation unit of a digital communication device according to a second embodiment of the present invention.

FIG. 7 is a schematic block diagram showing a demodulation unit of a digital communication device according to a third embodiment of the present invention.

FIG. 8 is a flow chart for explaining the operation of the phase calculator in the demodulation section of the digital communication device according to the fourth embodiment of the present invention.

FIG. 9 is a diagram showing a main part in a demodulation unit of a digital communication device according to a fifth embodiment of the present invention.

10 is a diagram showing another example of the main part of the demodulation unit of the digital communication device according to the fifth embodiment shown in FIG.

FIG. 11 is a diagram showing a relationship between a vector phase θ ₂ obtained at timing t and a vector phase θ ₁ obtained at timing t−Δt.

FIG. 12 is a schematic block diagram of a differential demodulator that performs differential demodulation by shifting a phase point for discrimination when a frequency difference between transmission and reception is large, and is a digital communication according to a sixth embodiment of the present invention. It is a schematic block diagram of the differential demodulator in the demodulation unit of the device.

FIG. 13 is a schematic block diagram showing another example of the differential demodulator in the demodulation unit of the digital communication device according to the sixth embodiment of the present invention shown in FIG.

FIG. 14 is a schematic block diagram of a differential demodulator in a demodulation unit of a digital communication device according to a seventh embodiment of the present invention.

FIG. 15 is a diagram showing the ROM of FIG. 14;

FIG. 16 is a diagram for explaining the reason why the digital communication device according to the eighth embodiment of the present invention is proposed.

FIG. 17 is a schematic block diagram of an integration / averaging calculation unit in the demodulation unit of the digital communication device according to the ninth embodiment of the present invention.

FIG. 18 is a diagram for explaining a digital communication device according to a tenth embodiment of the present invention.

FIG. 19 is a schematic block diagram of a digital communication device used as a master unit according to a twelfth embodiment of the present invention.

FIG. 20 is a schematic block diagram showing a modulator of a conventional digital communication device.

FIG. 21 is a schematic block diagram showing a demodulation unit of a conventional digital communication device.

22 is a diagram for explaining the operation of the demodulation unit in FIG. 21, and is a diagram for showing the phase of the input signal.

[Explanation of symbols]

 21 Sampling unit 22a, 22b Comparator 23a, 23b Correlator 24, 42, 52 Input signal 25a, 25b Pseudo baseband signal 41, 220 π / 2 phase rotator 44, 54, 213 Separation unit 51 90 ° distributor 61,102 ROM 81,101,223 Differential demodulator 131,141 Parent device 132 Slave device 133 Backup memory 214 Low-pass filter 216 Phase calculator 217 Demodulator circuit 219 Oscillator 221a, 221b Multiplier 222 1-bit delay device 224a, 224b Local signal

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location 9297-5K H04L 27/22 Z

Claims (16)

[Claims] 1. A digital communication method for demodulating a modulated received signal by directly spreading by applying a code sequence to a differentially converted signal, wherein the modulated received signal has a different phase and A first step of separating into a plurality of signals multiplied by a local signal having a frequency equal to that of a carrier wave, and a second step of converting each signal separated in the first step into a signal equivalent to a baseband signal And a third step of quantizing and sampling each signal converted in the second step by 1 bit, and further outputting as a correlation output; and the modulation using the correlation output output in the third step. Between the phase calculated in the fourth step and the phase of the modulated received signal obtained 1 bit later. Calculating a phase difference, and a fifth step of demodulating to determine whether or not the phase difference is within between a predetermined determination phase point, digital communication method. 2. A digital communication device for demodulating a modulated received signal by directly spreading by applying a code sequence to a differentially converted signal, wherein the modulated received signal has a different phase and Separation means for separating into a plurality of signals multiplied by a local signal having a frequency equal to the carrier wave, conversion means for converting each signal separated by the separation means into a signal equivalent to baseband, and conversion by the conversion means Sampling means for quantizing each sampled signal by 1 bit for sampling and further outputting as a correlation output, and phase calculation for calculating the phase of the modulated reception signal using the correlation output which is the output of the sampling means. Means and a phase difference generated between the phase calculated by the phase calculating means and the phase of the modulated reception signal obtained 1 bit later, and the phase difference is determined in advance. And a demodulating means for demodulating to determine whether in between phase point,
Digital communication device. 3. The sampling means includes a comparator that quantizes and samples each signal converted by the conversion means by 1 bit, and a correlator for outputting the output of the comparator as a correlation output. The digital communication device according to claim 2. 4. The separating means divides the modulated received signal into a plurality of signals, an oscillating means for oscillating the local signal, and a phase of the local signal oscillated by the oscillating means. In order to change into a plurality of local signals, a phase rotation means for giving a phase difference to one signal, each local signal having a phase difference in the phase rotation means and each signal distributed by the distribution means are multiplied. 4. The digital communication device according to claim 2, further comprising multiplication means. 5. The separating means distributes the modulated reception signal into a plurality of signals, and a phase difference between one of the signals so that a phase difference occurs between the signals distributed by the distributing means. A phase rotation means for giving, an oscillation means for oscillating the local signal, and a multiplication means for multiplying each signal having a phase difference generated by the phase rotation means and a local signal oscillated by the oscillation means. 2. The digital communication device described in 2 or 3. 6. The dividing means divides the modulated reception signal into a plurality of signals each having a different phase, an oscillating means for oscillating the local signal, and each of the dividing means. 4. The digital communication device according to claim 2, further comprising: a multiplication unit that multiplies a signal by the local signal oscillated by the oscillation unit. 7. The phase calculating means estimates the value of the correlation output from the probability of a Gaussian noise distribution or Nakagami-Rice distribution corresponding to a communication state, and calculates the phase based on the estimated value of the correlation output. 3. The calculation according to claim 2, wherein the calculation is performed.
7. The digital communication device according to any one of 6 to 6. 8. The phase calculating means includes first storing means for storing in advance the relationship between the estimated value of the correlation output and the phase, and calculates the phase using a table pickup method. The digital communication device according to claim 7, which is characterized in that: 9. The demodulating means includes a delay means for delaying the phase calculated by the phase calculating means by 1 bit, a phase of a modulated reception signal obtained 1 bit after the phase calculating means and the delay means. A differential demodulation means for calculating a phase difference generated between the phase delayed by 1 bit and determining whether the phase difference is within a predetermined determination phase point, and performing demodulation. 9. The digital communication device according to claim 2, wherein the dynamic demodulation means changes the predetermined discriminating phase point according to a frequency difference of a carrier wave between transmission and reception. 10. The demodulating means includes second storage means for storing a discriminating phase point that changes according to a frequency difference of a carrier wave between the transmitting and receiving, and calculates the discriminating phase point by using a table pickup method. 9. The digital communication device according to claim 2, wherein the digital communication device is a digital communication device. 11. The demodulation means is a C / N between transmission and reception.
11. The digital communication device according to claim 2, wherein the discriminant phase point is set to a value shifted by a predetermined amount in accordance with 12. Further comprising a third storage means for storing a phase difference in a carrier wave between transmission and reception, identifying a communication target at the time of the next communication, and using the phase difference stored in the third storage means. 12. The digital communication device according to claim 2, wherein the optimum discriminating phase point is switched according to the determination. 13. When a relationship between a master unit and a slave unit with respect to a communication device for transmission / reception occurs, the third storage means is provided only in the master unit, and the master unit is optimal for the slave unit. 13. The digital communication device according to claim 12, wherein communication is performed with different phase amounts. 14. When there is a relationship between a master unit and a slave unit with respect to a communication device that transmits and receives, only the master unit calculates the phase difference, and the demodulating means of the slave unit is the master unit. 12. The digital communication device according to claim 9, 10 or 11, wherein demodulation is performed by switching to an optimum discriminating phase point based on the calculated phase difference. 15. The slave unit is provided with a fourth storage unit capable of storing the phase difference calculated by the master unit, and the demodulation unit of the slave unit is configured to execute the fourth communication unit during the next communication.
15. The digital communication device according to claim 14, wherein the phase difference stored in the storage means is used for demodulation. 16. When there is a relationship between a master unit and a slave unit with respect to a communication device for transmission / reception, only the master unit calculates a phase difference, demodulates it at an optimum discriminating phase point, and transmits it. 12. The digital communication device according to claim 9, 10 or 11, wherein the phase difference is shifted in the opposite direction and transmitted to the slave unit.