JPH07162292A - Non-volatile counter circuit - Google Patents

Non-volatile counter circuit

Info

Publication number
JPH07162292A
JPH07162292A JP30447293A JP30447293A JPH07162292A JP H07162292 A JPH07162292 A JP H07162292A JP 30447293 A JP30447293 A JP 30447293A JP 30447293 A JP30447293 A JP 30447293A JP H07162292 A JPH07162292 A JP H07162292A
Authority
JP
Japan
Prior art keywords
counter
power supply
counter circuit
volatile
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30447293A
Other languages
Japanese (ja)
Inventor
Shunichi Nishimura
俊一 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP30447293A priority Critical patent/JPH07162292A/en
Publication of JPH07162292A publication Critical patent/JPH07162292A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a non-volatile counter circuit capable of storing a counter value even when a power supply is turned off. CONSTITUTION:The non-volatile counter circuit is constituted of a counter 3, a non-volatile memory 7, a delay part 4, a 5V detection part 2, and mono- stable multivibrators 5, 6. When the power supply 1 is off, output voltage from the power supply 1 is detected and counter data are written in the memory 7 by the multivibrator 6. When the power supply 1 is on, its output voltage is detected and the stored counter data are loaded from the memory 7 to the counter 3 by the multivibrator 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、カウンタ回路に関し、
特に不揮発性カウンタ回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a counter circuit,
In particular, it relates to a nonvolatile counter circuit.

【0002】[0002]

【従来の技術】従来、不揮発性カウンタの実現に当たっ
ては、電池を用いたバッテリーバックアップ方式等によ
って行っていた。
2. Description of the Related Art Conventionally, a non-volatile counter has been implemented by a battery backup system using a battery.

【0003】図2は、従来の不揮発性カウンタ回路の構
成図を示す。
FIG. 2 is a block diagram of a conventional nonvolatile counter circuit.

【0004】本図において、電源1はカウンタ3に供給
されておりその電源ラインにバッテリー2が接続されて
いる。電源1がOFFの場合にはバッテリー2によりカ
ウンタ3に電源が供給され、正常なカウント動作を維持
することができた。
In the figure, a power source 1 is supplied to a counter 3, and a battery 2 is connected to the power source line. When the power supply 1 is off, the battery 2 supplies the power to the counter 3 and the normal counting operation can be maintained.

【0005】[0005]

【発明が解決しようとする課題】図2に示した従来の方
法は、電池を用いたバッテリーバックアップ方式であっ
たため、電池のメンテナンスが必要であり、メンテナン
スフリーにはできないという欠点があった。
Since the conventional method shown in FIG. 2 is a battery backup method using a battery, it has a drawback that the battery needs maintenance and cannot be maintenance-free.

【0006】本発明はこの欠点を解決すべく、1方式を
提案しようとしたものである。
The present invention proposes one method to solve this drawback.

【0007】[0007]

【課題を解決するための手段】本発明の不揮発性カウン
タは、カウンタIC1、不揮発性メモリ2、遅延部3、
5V検知部4、ワンショットマルチ1及びワンショット
マルチ2を備えている。
A nonvolatile counter according to the present invention comprises a counter IC1, a nonvolatile memory 2, a delay unit 3,
A 5V detector 4, a one-shot multi 1 and a one-shot multi 2 are provided.

【0008】[0008]

【実施例】図1は本発明のカウンタ回路の構成図を示
す。
1 is a block diagram of a counter circuit according to the present invention.

【0009】本図において、電源1がON状態からOF
F状態となった場合には、電源1の出力電圧100を入
力する5V検出部2は+5Vから低下する電圧を単安定
マルチバイブレータ6に出力する。単安定マルチバイブ
レータ6は、入力電圧の立下がりを検出して所定のパル
スを出力する特性を有している。単安定マルチバイブレ
ータ6の出力のパルス信号104は、不揮発性メモリ7
のWRITE端子に入力される。その結果、不揮発性メ
モリ7は、カウンタ3の出力データ103−1〜Nを書
き込むこととなる。
In the figure, the power source 1 is turned on from the ON state to the OF state.
When in the F state, the 5V detection unit 2 that inputs the output voltage 100 of the power supply 1 outputs a voltage that drops from + 5V to the monostable multivibrator 6. The monostable multivibrator 6 has the characteristic of detecting the falling edge of the input voltage and outputting a predetermined pulse. The pulse signal 104 output from the monostable multivibrator 6 is stored in the nonvolatile memory 7
Input to the WRITE terminal. As a result, the non-volatile memory 7 writes the output data 103-1 to N of the counter 3.

【0010】逆に、電源1がOFF状態からON状態と
なった場合には、電源1の出力電圧100を入力する5
V検出部2は低電圧から+5Vへ上昇する電圧を単安定
マルチバイブレータ5に出力する。単安定マルチバイブ
レータ5は、入力電圧の立上がりを検出して所定のパル
スを出力する特性を有している。単安定マルチバイブレ
ータ5の出力のパルス信号105はカウンタ3のLOA
D端子に入力し、電源OFF時に不揮発性メモリ7が記
憶しているカウントデータ107−1〜Nをカウンタ3
に対してLOADすることとなる。
On the contrary, when the power source 1 is changed from the OFF state to the ON state, the output voltage 100 of the power source 1 is input 5
The V detection unit 2 outputs a voltage rising from a low voltage to + 5V to the monostable multivibrator 5. The monostable multivibrator 5 has the characteristic of detecting the rising of the input voltage and outputting a predetermined pulse. The pulse signal 105 output from the monostable multivibrator 5 is the LOA of the counter 3.
The count data 107-1 to N input to the D terminal and stored in the nonvolatile memory 7 when the power is turned off are stored in the counter 3.
Will be LOADed.

【0011】遅延部4は、電源電圧1の出力電圧100
を遅延した出力電圧106を発生させる。この遅延され
た出力電圧106は、5V検出部2、単安定マルチバイ
ブレータ5,6、カウンタ3、不揮発性メモリ7の電源
電圧端子に入力される。
The delay unit 4 has an output voltage 100 of the power supply voltage 1.
To produce an output voltage 106 delayed by. The delayed output voltage 106 is input to the 5V detection unit 2, the monostable multivibrators 5 and 6, the counter 3, and the power supply voltage terminal of the nonvolatile memory 7.

【0012】この結果、電源が断の状態においても、電
源が正常時のカウントデータを不揮発性メモリに蓄積
し、再度電源が投入された時に前記不揮発性メモリのデ
ータを利用することにより、不揮発性カウンタ回路を実
現できる。
As a result, even when the power is off, the count data when the power is normal is stored in the non-volatile memory, and when the power is turned on again, the data in the non-volatile memory is used to make the non-volatile A counter circuit can be realized.

【0013】[0013]

【発明の効果】以上説明したように、本発明はICを中
心とした簡単な回路で構成しており、電池等を使用しな
い方式としたので、メンテナンスフリーにできるという
効果がある。
As described above, according to the present invention, which is composed of a simple circuit centering on an IC and does not use a battery or the like, there is an effect that it can be maintenance-free.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のカウンタ回路の一実施例のブロック
図。
FIG. 1 is a block diagram of an embodiment of a counter circuit of the present invention.

【図2】従来の実施例のブロック図。FIG. 2 is a block diagram of a conventional embodiment.

【符号の説明】[Explanation of symbols]

1 電源 2 5V検出部 3 カウンタ回路 4 遅延部 5,6 単安定マルチバイブレータ 7 不揮発性メモリ 100 電源出力電圧 101 カウンタパルス入力信号 102 UP/DOWN制御入力信号 103 カウント出力信号 104 単安定マルチバイブレータ6の出力パルス 105 単安定マルチバイブレータ5の出力パルス 106 遅延部4の出力電圧 1 Power Supply 2 5V Detection Unit 3 Counter Circuit 4 Delay Unit 5, 6 Monostable Multivibrator 7 Nonvolatile Memory 100 Power Supply Output Voltage 101 Counter Pulse Input Signal 102 UP / DOWN Control Input Signal 103 Count Output Signal 104 Monostable Multivibrator 6 Output pulse 105 Output pulse of monostable multivibrator 5 Output voltage of delay unit 4

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 外部より入力されるパルスを計数するカ
ウンタ回路において、電源電圧の断を検出する手段と、
前記検出出力に基づきカウンタのカウントデータを不揮
発性メモリへ書き込む手段と、電源電圧の投入を検出す
る手段と、前記検出出力に基づき前記不揮発性メモリに
書き込まれたデータを前記カウンタに読み込む手段とを
有することを特徴とする不揮発性カウンタ回路。
1. A counter circuit that counts pulses input from the outside, and means for detecting disconnection of a power supply voltage,
Means for writing the count data of the counter to the non-volatile memory based on the detection output, means for detecting the turn-on of the power supply voltage, and means for reading the data written in the non-volatile memory on the basis of the detection output into the counter. A non-volatile counter circuit having.
【請求項2】 電源入力電圧を所定の時間遅延した電圧
を動作電圧とする請求項1記載の不揮発性カウンタ回
路。
2. The non-volatile counter circuit according to claim 1, wherein a voltage obtained by delaying a power supply input voltage for a predetermined time is used as an operating voltage.
JP30447293A 1993-12-06 1993-12-06 Non-volatile counter circuit Pending JPH07162292A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30447293A JPH07162292A (en) 1993-12-06 1993-12-06 Non-volatile counter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30447293A JPH07162292A (en) 1993-12-06 1993-12-06 Non-volatile counter circuit

Publications (1)

Publication Number Publication Date
JPH07162292A true JPH07162292A (en) 1995-06-23

Family

ID=17933437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30447293A Pending JPH07162292A (en) 1993-12-06 1993-12-06 Non-volatile counter circuit

Country Status (1)

Country Link
JP (1) JPH07162292A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7120220B2 (en) * 2004-12-23 2006-10-10 Ramtron International Corporation Non-volatile counter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5689009A (en) * 1979-12-20 1981-07-20 Nissan Motor Co Ltd Electronic running distance meter for vehicle

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5689009A (en) * 1979-12-20 1981-07-20 Nissan Motor Co Ltd Electronic running distance meter for vehicle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7120220B2 (en) * 2004-12-23 2006-10-10 Ramtron International Corporation Non-volatile counter

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