JPH0690239B2 - Amplitude detection circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplitude detection circuit for detecting the amplitude of a relatively periodic alternating current signal such as a video FM signal or an audio signal.

Prior Art FIG. 3 shows a circuit example of a conventional amplitude detection circuit. In FIG. 3, the emitters of the transistors 2 and 3 are commonly connected to the constant current source 4. The base of transistor 2 is resistor 1
The bias voltage of the DC voltage source V ₁ is applied via the resistor 3, the base of the transistor 3 is applied the bias voltage of the DC voltage source V ₂ via the resistor 7, and the AC input signal is applied to the external input terminal 13
From the capacitor C ₁ and the terminal 12 to the base of the transistor 2.

Then, the transistor 5 and the transistor 9 each having the resistor 6 and the resistor 8 connected to the power supply terminal 11 at the emitter
Forms a current mirror circuit, which mirror-inverts the collector current of the transistor 2. The collector of the transistor 9 is connected to the output terminal 10 and the capacitor C _2, and outputs a DC output voltage.

Regarding the conventional amplitude detection circuit configured as described above,
The operation when a sine wave input signal is input will be described below.

In FIG. 3, the voltage of the DC voltage source V ₂ is set higher than that of the DC voltage source V ₁ , and a sine wave signal is input from the external input terminal 13. Then, as shown in FIG. 4, a sine wave signal which is vertically symmetrical about the potential of the DC voltage source V ₁ is input to the base of the transistor 2.

Here, since the transistors 2 and 3 and the constant current source 4 are configured as a differential amplifier, when the maximum potential of the input signal is equal to or lower than the potential of the DC voltage source V ₂ , the transistor 3 becomes conductive and the transistor 3 is turned on. Since 2 is turned off, no current is supplied to the capacitor C ₂ and the output terminal 10 becomes the ground potential. Next, when the maximum potential of the input signal exceeds the potential of the DC voltage source V ₂ , the transistor 3 is turned off, the transistor 2 is turned on, and the current mirror circuit composed of the transistors 5 and 9 is turned on. The collector current of is mirror-inverted, the charging current is supplied to the capacitor C ₂ , and the output voltage that follows the maximum value of the AC input signal is output to the output terminal 10. That is, as shown in FIG.
When half (A / 2) of the amplitude A of the input signal input to the base of the transistor 2 of the transistor 2 becomes larger than (V ₂ −V ₁ ), the AC signal increases in accordance with the rise of the DC potential of the output terminal 10. The amplitude of can be detected.

Problems to be Solved by the Invention However, in such a conventional configuration, since the amplitude of half of the AC signal is detected, the error in the detection level becomes large especially when the input signal level is small, and the detection sensitivity deteriorates. Had the problem.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to detect the amplitude of an AC signal and improve the detection sensitivity.

Means for Solving the Problems In order to achieve the above-mentioned object, the amplitude detection circuit of the present invention comprises Darlington-connected first and second transistors and third and fourth transformers. A differential amplifier in which the emitters of the third transistors are commonly connected, and a first bias for applying a bias to the base of the first transistor
Potential point, a second potential point that biases the base of the fourth transistor, a current mirror circuit that mirror-inverts the collector current of the second transistor, and a smoothing output of the current mirror circuit. An output terminal for outputting an output voltage from one end of the first capacitor, an AC input signal is given to the emitter of the first transistor via the second capacitor, and a second input is provided when the AC input signal is not input. The magnitude relationship between the first and second potential points is set so that the transistor is turned off, and the potential difference between them is set to the same level as the desired amplitude of the AC input signal. This is a feature.

Operation With the above configuration, the first transistor peak-clamps the lowest level of the AC input signal waveform, and the lowest level of the AC input signal waveform is changed from the potential of the first DC voltage source to the base-emitter of the first transistor. It is fixed to a potential shifted by the voltage and an input signal higher than the potential is input to the base of the second transistor. Then, when no AC input signal is input, the first transistor and the fourth transistor shift a bias voltage obtained by shifting the first potential and the second potential by the base-emitter voltage by a differential amplifier (second, second). Three
Of the first transistor and the second transistor are connected to each other, so that when an input signal having an amplitude larger than the potential difference between the first potential point and the second potential point is input, the first transistor is turned on by the conduction of the second transistor. The capacitor is charged, and a DC output voltage corresponding to the AC input signal is output to the output terminal.

Embodiment An embodiment of the amplitude detection circuit of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit configuration diagram of one embodiment. In FIG. 1, transistors forming a differential amplifier are shown.
2,3, constant current source 4, transistor forming current mirror circuit
5,9, resistors 6 and 8, the power supply terminal 11, the capacitor C ₂ is similar to the conventional circuit of Figure 3. However, the base of the transistor 20 is connected to the DC voltage source V ₁ , a bias potential is applied to the base of the transistor 2 from its emitter, the base of the transistor 21 is connected to the DC voltage source V ₂ , and its emitter is connected to the transistor 3 A bias potential is applied to the base of the transistors, and the transistors 20 and 2 and the transistors 21 and 3 are in Darlington connection. Further, it is different from the conventional circuit in that the AC input signal is input from the external input terminal 13 to the emitter of the transistor 20 via the capacitor C ₁ and the terminal 12.

The operation of the amplitude detecting circuit of one embodiment configured as described above will be described below with reference to the operation waveform diagram of FIG.

The sine wave AC input signal shown in FIG.
If the voltage of the DC voltage source V ₁ is V ₁ and the threshold voltage between the base and emitter of the transistor 20 is V _BE20 , when the potential of the terminal 12 drops below (V ₁ −V _BE20 ), As the base-emitter voltage V _{BE20 of the} transistor 20 increases, the internal impedance of the emitter becomes low impedance (tens of Ω). Conversely, when the potential of terminal 12 rises above (V ₁ −V _BE20 ), transistor 2
As the base-emitter voltage V _{BE20 of} 0 becomes small, the internal impedance of the emitter becomes high impedance (several KΩ or more). Therefore, even if an AC input signal whose amplitude suddenly rises from a no-signal state, when the lower half wave of the first one cycle is input, it follows the potential change of the lower half wave and the capacitor C _The charge is rapidly charged to ₁ , and the charge accumulated in the capacitor C ₁ is maintained as it is. And when the next cycle is input,
The AC input signal at terminal 20 has a minimum level of (V ₁ −V
_BE20 ) and peak clamp the lowest level of the AC input signal.

Transistor 2 to which the peak-clamped signal is input to the base is input with the AC input signal waveform having the minimum potential or higher. However, while the level of the AC input signal is low, the transistor 2 is in the off state,
When the potential lower than the threshold voltage V _BE21 between the base and emitter of the transistor 21 by the DC voltage source V ₂ , that is, (V ₂ −V _BE21 ), which is higher than the maximum potential of the AC input signal waveform, the transistor 3 is turned off. At the same time, the transistor 2 is turned on for the first time, and a DC output voltage corresponding to the amplitude of the AC input signal is output to the output terminal 10.

In such a _{configuration, V BE20 = V BE21, V} BE2 = V BE3, (V
_BE2 and V _BE3 can be considered to operate in a circuit by approximating the conditions of (the threshold voltage between the base and emitter of transistors 2 and 3).
That is, this embodiment can detect the absolute value of the amplitude of the AC input signal exceeding (V ₂ −V ₁ ), and the level of the AC input voltage that outputs the output voltage can be detected by the DC voltage sources V ₁ and V ₂ . Determined,
The temperature dependency of the detection level of the AC input signal can be made zero. Further, since the absolute value of the amplitude is detected, the detection sensitivity twice as high as that of the conventional example can be obtained.

Such an amplitude detection circuit is suitable for detecting the output voltage amplitude of the AGC circuit, and when the output voltage is used as the gain control voltage, the output amplitude of the AGC circuit can be made constant regardless of the ambient temperature.

The above embodiments, the DC voltage source V ₂ is set greater than V _1, has been described transistor 2,3,20,21 an example using the NPN-type transistors, a DC voltage source V ₂ than V ₁ It goes without saying that the same effect can be obtained even if the PNP transistor is replaced by a small value.

As described in detail above, the amplitude detection circuit of the present invention makes the temperature dependence of the detection level of the AC input signal zero, and
Since the absolute value of the AC input amplitude is detected, detection sensitivity twice as high as that of the conventional example can be obtained.

Also, input the output of the AGC circuit to the input terminal of this circuit,
If the output voltage is used as the control voltage, the output voltage amplitude of the AGC circuit can be made constant regardless of the ambient temperature, which is suitable as an amplitude detection circuit for the AGC circuit.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of an embodiment according to the amplitude detection circuit of the present invention, FIG. 2 is an operation waveform diagram for explaining the operation of FIG. 1, and FIG. 3 is a circuit configuration of a conventional amplitude detection circuit. FIG. 4 and FIG. 4 are operation waveform diagrams for explaining the operation of the conventional example. 1,6,7,8 …… Resistance, 2,3,20,21 …… NPN type transistor,
5,9 PNP transistor, 4 constant current source, 10 output terminal, 11 power supply terminal, 13 external input terminal, C ₁ , C ₂
…… Capacitors, V ₁ , V ₂ …… DC voltage source.

Claims (1)

[Claims] 1. A Darlington-connected first and second transistor and a third and fourth transformer, wherein the second and second transistors are connected.
A differential amplifier in which the emitters of the third transistors are commonly connected, a first potential point that biases the base of the first transistor, and a second potential point that biases the base of the fourth transistor. A current mirror circuit that mirror-inverts the collector current of the second transistor, and an output terminal that outputs an output voltage from one end of the first capacitor that smoothes the output of the current mirror circuit. Is given to the emitter of the first transistor via a second capacitor, and the size of the first and second potential points is set so that the second transistor is turned off when the AC input signal is not input. An amplitude detection circuit, wherein the relationship is set and the potential difference between them is set to the same level as the desired amplitude of the AC input signal.